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1. 发明申请

US20060044031A1 CALIBRATION OF UP AND DOWN CHARGE-PUMP CURRENTS USING A SAMPLE-AND-HOLD CIRCUIT DURING IDLE TIMES 失效
标题翻译：空闲时间使用示波和保持电路校正上下电荷泵电流
公开(公告)号：US20060044031A1
公开(公告)日：2006-03-02
申请号：US10711151
申请日：2004-08-27
申请人： Vincent Sin-Luen Cheung , Gary Wing-Kei Wong
发明人： Vincent Sin-Luen Cheung , Gary Wing-Kei Wong
IPC分类号： H03L7/06
CPC分类号： H03L7/0896
摘要： A charge pump for a phase-locked loop (PLL) has accurate matching of charge and discharge currents applied to the PLL's loop filter. A variable current-sink transistor has its gate-to-source voltage adjusted to match a source current from a fixed current source. An intermediate node in-between series transistors between the current source and sink is sampled by a sampling transistor that connects the intermediate node to a sampling capacitor. The sampling capacitor's voltage is the gate-to-source voltage of the variable current-sink transistor. The variable current-sink transistor has its gate and drain coupled together through the sampling transistor during calibration periods when the charge pump is otherwise idle. When the source current exactly matches the sink current, the gate-to-source voltage stored on the sampling capacitor reaches steady state. Up and down currents are balanced in driver transistors that match the series transistors.
摘要翻译：用于锁相环（PLL）的电荷泵具有对施加到PLL环路滤波器的充电和放电电流的精确匹配。可变电流 - 宿信号晶体管的栅极 - 源极电压被调整以匹配来自固定电流源的源极电流。电流源和吸收器之间的串联晶体管之间的中间节点由将中间节点连接到采样电容器的采样晶体管采样。采样电容器的电压是可变电流 - 宿晶体管的栅极 - 源极电压。当电荷泵空闲时，可变电流 - 宿晶体管的栅极和漏极在校准周期期间通过采样晶体管耦合在一起。当源极电流与吸收电流完全一致时，存储在采样电容器上的栅极 - 源极电压达到稳定状态。在串联晶体管匹配的驱动晶体管中，上下电流是平衡的。

2. 发明授权

US07034588B2 Calibration of up and down charge-pump currents using a sample-and-hold circuit during idle times 失效
标题翻译：在空闲时间内使用采样保持电路校准上下电荷泵电流
公开(公告)号：US07034588B2
公开(公告)日：2006-04-25
申请号：US10711151
申请日：2004-08-27
申请人： Vincent Sin-Luen Cheung , Gary Wing-Kei Wong
发明人： Vincent Sin-Luen Cheung , Gary Wing-Kei Wong
IPC分类号： H03L7/06
CPC分类号： H03L7/0896
摘要： A charge pump for a phase-locked loop (PLL) has accurate matching of charge and discharge currents applied to the PLL's loop filter. A variable current-sink transistor has its gate-to-source voltage adjusted to match a source current from a fixed current source. An intermediate node in-between series transistors between the current source and sink is sampled by a sampling transistor that connects the intermediate node to a sampling capacitor. The sampling capacitor's voltage is the gate-to-source voltage of the variable current-sink transistor. The variable current-sink transistor has its gate and drain coupled together through the sampling transistor during calibration periods when the charge pump is otherwise idle. When the source current exactly matches the sink current, the gate-to-source voltage stored on the sampling capacitor reaches steady state. Up and down currents are balanced in driver transistors that match the series transistors.
摘要翻译：用于锁相环（PLL）的电荷泵具有对施加到PLL环路滤波器的充电和放电电流的精确匹配。可变电流 - 宿信号晶体管的栅极 - 源极电压被调整以匹配来自固定电流源的源极电流。电流源和吸收器之间的串联晶体管之间的中间节点由将中间节点连接到采样电容器的采样晶体管采样。采样电容器的电压是可变电流 - 宿晶体管的栅极 - 源极电压。当电荷泵空闲时，可变电流 - 宿晶体管的栅极和漏极在校准周期期间通过采样晶体管耦合在一起。当源极电流与吸收电流完全一致时，存储在采样电容器上的栅极 - 源极电压达到稳定状态。在串联晶体管匹配的驱动晶体管中，上下电流是平衡的。

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