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    • 7. 发明申请
    • METHODS AND APPARATUS FOR DESKEWING VCAT/LCAS MEMBERS
    • 设计VCAT / LCAS会员的方法和设备
    • WO2007024729A2
    • 2007-03-01
    • PCT/US2006032430
    • 2006-08-21
    • TRANSWITCH CORPGUPTA DINESHMUKHERJEE DEV SHANKARMALIK RAKESH KUMAR
    • GUPTA DINESHMUKHERJEE DEV SHANKARMALIK RAKESH KUMAR
    • H04J3/02
    • H04J3/0623H04J3/1611H04J2203/0094
    • Write logic and read logic are coupled to SDRAM and a frame status table. VCG members are written into SDRAM by the write logic and an entry (based on the MFI and SQ) in the frame status table is maintained by the write logic for each member. The read logic scans the frame status table to identify the earliest frame number for which data is available in SDRAM. Based on the frame status and the address pointer offset, the read logic maintains a state table entry for each VCG member and a state for each VCG. According to the preferred embodiment, the read logic is provided in two parts separated by a temporary buffer. The first pait of the read logic performs the functions described above and writes chunk data into the temporary buffer. The second part of the read logic reads byte data from the temporary buffer according to a selectable leak rate.
    • 写入逻辑和读取逻辑耦合到SDRAM和帧状态表。 VCG成员通过写逻辑写入SDRAM,帧状态表中的条目(基于MFI和SQ)由每个成员的写入逻辑维护。 读逻辑扫描帧状态表以识别SDRAM中数据可用的最早帧号。 基于帧状态和地址指针偏移,读逻辑维护每个VCG成员的状态表条目和每个VCG的状态。 根据优选实施例,读逻辑被提供在由临时缓冲器分开的两个部分中。 读逻辑的第一个执行执行上述功能,并将块数据写入临时缓冲区。 读取逻辑的第二部分根据可选择的泄漏率从临时缓冲器读取字节数据。