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    • 2. 发明申请
    • Bufferless writing of data to memory
    • 将数据缓冲区写入存储器
    • US20060133160A1
    • 2006-06-22
    • US11294467
    • 2005-12-06
    • Fraser DickinWeng Loh
    • Fraser DickinWeng Loh
    • G11C7/10
    • G06F11/1004
    • This invention provides a processor 900 for writing data contained in payload data 1006 of a data packet 1000 to memory, especially for use as the central processing unit of a memory tag 1200. The processor 900 does not include a write buffer. The processor 900 comprises a first register 910 adapted to latch first data corresponding to a segment of the payload data; and a second register 224 adapted to receive second data from the payload data 1006 to enable the validity of the data latched into the first register 910 to be established before data is written to memory. A memory device, a method for writing data contained in payload data 1006, a data packet 1000, a method of writing data into a non-volatile memory and a memory tag are also provided.
    • 本发明提供了一种处理器900,用于将包含在数据分组1000的有效载荷数据1006中的数据写入存储器,特别是用作存储器标签1200的中央处理单元。 处理器900不包括写入缓冲器。 处理器900包括第一寄存器910,其适于锁存对应于有效载荷数据段的第一数据; 以及适于从有效载荷数据1006接收第二数据的第二寄存器224,以使得能够在将数据写入存储器之前建立锁存在第一寄存器910中的数据的有效性。 还提供了存储装置,用于写入有效载荷数据1006中包含的数据的方法,数据分组1000,将数据写入非易失性存储器和存储标签的方法。
    • 3. 发明申请
    • Central processor for memory tag
    • 中央处理器的内存标签
    • US20060123186A1
    • 2006-06-08
    • US11294479
    • 2005-12-06
    • Weng LohFraser DickinThomas Rathbone
    • Weng LohFraser DickinThomas Rathbone
    • G06F12/00
    • G06F9/30101
    • This invention provides a processor 200, especially for use as the central processing unit of a memory tag 1200. The processor 200 has a minimal footprint in Silicon or other suitable material. It also is driven by the data that it receives. The processor includes a plurality 206, 212, 214, 224 of registers configured to receive in parallel data that are input to the processor, and to process in parallel the received data, and a micro sequencer and instruction decoder module 202 adapted to select two or more of the plurality of registers to receive the data that are input to the processor, and to control the processing of the received data by the end or more selected registers. A memory 1200 device utilising such a processor, and a method of processing instructions are also provided
    • 本发明提供一种处理器200,特别是用作存储器标签1200的中央处理单元。 处理器200在硅或其它合适的材料中具有最小的占地面积。 它也由它接收的数据驱动。 处理器包括多个寄存器206,212,214,224,其被配置为并行地接收输入到处理器的数据,并且并行处理接收的数据;以及微定序器和指令解码器模块202,适于选择两个或 多个寄存器中的多个用于接收输入到处理器的数据,并且通过结束或更多选择的寄存器控制接收的数据的处理。 还提供了利用这种处理器的存储器1200设备,以及处理指令的方法
    • 8. 发明申请
    • Memory tag and a reader
    • 记忆标签和阅读器
    • US20050078498A1
    • 2005-04-14
    • US10947171
    • 2004-09-23
    • John WatersWeng LohFraser Dickin
    • John WatersWeng LohFraser Dickin
    • G06K7/00G06K17/00G06K19/07G06K19/073G11C19/08
    • G06K19/0723G06K7/0008
    • A memory tag comprising a resonant circuit part and a non-volatile memory, the resonant circuit part being operable, in response to a reader signal received from a reader, to provide power to the memory, the tag being operable to read the memory and transmit data stored in the memory in response to the signal from the reader, wherein the data is stored in the memory in a plurality of data units, each data unit having an associated sequence number, the tag being operable to store the sequence number of the data unit to be transmitted in a register in the non-volatile memory, and when power is supplied to the memory, the data units are transmitted in sequence, the first data unit to be transmitted depending on the stored sequence number.
    • 一种包括谐振电路部分和非易失性存储器的存储器标签,所述谐振电路部分响应于从读取器接收的读取器信号而可操作以向所述存储器提供电力,所述标签可操作以读取所述存储器并传输 响应于来自读取器的信号存储在存储器中的数据,其中数据以多个数据单元存储在存储器中,每个数据单元具有相关联的序列号,该标签可操作以存储数据的序列号 要在非易失性存储器中的寄存器中发送的单元,并且当向存储器提供电力时,根据存储的序列号依次发送数据单元以发送的第一数据单元。
    • 10. 发明申请
    • Memory tag, method for providing information and enabling the release of stored content, and apparatus therefor
    • 存储器标签,用于提供信息并且能够释放存储的内容的方法及其装置
    • US20060282904A1
    • 2006-12-14
    • US11451556
    • 2006-06-13
    • Richard LawrenceFraser Dickin
    • Richard LawrenceFraser Dickin
    • H04L9/32
    • G06Q20/327G06Q20/123G06Q20/32
    • A method of providing information, the method comprising interrogating a memory tag; receiving content from the memory tag by wireless electromagnetic communication in response to the interrogation, the memory tag comprising a memory and a transponder to enable the wireless electromagnetic communication; storing the content; sending a release request to an authoriser; receiving a release confirmation from the authoriser in response to the release request; and releasing the stored content in response to receipt of the release confirmation. The memory tag may contain encrypted content. A plurality of said release requests may be sent, each release request having an associated cost. An aggregate cost can then be calculated in accordance with the sum of the associated costs.
    • 一种提供信息的方法,所述方法包括询问存储器标签; 响应于询问,通过无线电磁通信从存储器标签接收内容,存储器标签包括存储器和应答器,以实现无线电磁通信; 存储内容; 向授权者发送释放请求; 响应于释放请求从授权者接收发布确认; 以及响应于接收到所述释放确认而释放所存储的内容。 内存标签可能包含加密的内容。 可以发送多个所述释放请求,每个释放请求具有相关联的成本。 然后可以根据相关费用的总和来计算总成本。