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1. 发明授权

US07208326B2 Edge protection process for semiconductor device fabrication 有权
标题翻译：半导体器件制造的边缘保护工艺
公开(公告)号：US07208326B2
公开(公告)日：2007-04-24
申请号：US10967869
申请日：2004-10-18
申请人： Michael Rennie , Jon Davis , Robert Fuller , Franz Hagl
发明人： Michael Rennie , Jon Davis , Robert Fuller , Franz Hagl
IPC分类号： H01L21/00
CPC分类号： H01L21/3083 , H01L21/3065
摘要： An edge protection process for semiconductor device fabrication includes forming a protective layer on the circumferential edge region of a semiconductor substrate. The semiconductor substrate is placed in a plasma atmosphere and trench structures, such as deep trenches and shallow trench isolation structures are etched in the substrate. The protective layer substantially prevents the etching of the circumferential edge region, such that the formation of black silicon is substantially minimized during the etching process.
摘要翻译：用于半导体器件制造的边缘保护工艺包括在半导体衬底的周缘区域上形成保护层。将半导体衬底放置在等离子体气氛中，并且在衬底中蚀刻诸如深沟槽和浅沟槽隔离结构的沟槽结构。保护层基本上防止了周边边缘区域的蚀刻，使得在蚀刻工艺期间黑色硅的形成基本上被最小化。

2. 发明申请

US20050181708A1 Removal of embedded particles during chemical mechanical polishing 审中-公开
标题翻译：在化学机械抛光期间去除嵌入的颗粒
公开(公告)号：US20050181708A1
公开(公告)日：2005-08-18
申请号：US10780409
申请日：2004-02-17
申请人： Kyle Turner , Franz Hagl
发明人： Kyle Turner , Franz Hagl
IPC分类号： B24B37/04 , B24B1/00
CPC分类号： B24B37/042
摘要： A chemical mechanical polishing method and apparatus are introduced that reduce embedded particles during CMP processing. Throughout the CMP process, the wafer-carrier and the polish platen turn or rotate in the same direction. This enables particles to become embedded in the oxide or other film surface. In the disclosed process, during a final polish step, the wafer carrier or polish platen is turned or rotated in the opposite direction. Embedded particles are then pulled out of the oxide or film, creating a much cleaner wafer. This increases manufacturing yield and decreases manufacturing cost while introducing one additional step and a minor modification to conventional equipment.
摘要翻译：引入化学机械抛光方法和装置，其在CMP处理期间减少嵌入的颗粒。在整个CMP过程中，晶片载体和抛光平台在相同的方向转动或旋转。这使得颗粒能够嵌入在氧化物或其它膜表面中。在所公开的方法中，在最终抛光步骤期间，晶片载体或抛光压板在相反方向转动或旋转。然后将嵌入的颗粒从氧化物或膜中拉出，形成更清洁的晶片。这增加了制造产量并降低了制造成本，同时为常规设备引入了一个额外的步骤和一个小的修改。

3. 发明申请

US20060084274A1 Edge protection process for semiconductor device fabrication 有权
标题翻译：半导体器件制造的边缘保护工艺
公开(公告)号：US20060084274A1
公开(公告)日：2006-04-20
申请号：US10967869
申请日：2004-10-18
申请人： Michael Rennie , Jon Davis , Robert Fuller , Franz Hagl
发明人： Michael Rennie , Jon Davis , Robert Fuller , Franz Hagl
IPC分类号： H01L21/311
CPC分类号： H01L21/3083 , H01L21/3065
摘要： An edge protection process for semiconductor device fabrication includes forming a protective layer on the circumferential edge region of a semiconductor substrate. The semiconductor substrate is placed in a plasma atmosphere and trench structures, such as deep trenches and shallow trench isolation structures are etched in the substrate. The protective layer substantially prevents the etching of the circumferential edge region, such that the formation of black silicon is substantially minimized during the etching process.
摘要翻译：用于半导体器件制造的边缘保护工艺包括在半导体衬底的周缘区域上形成保护层。将半导体衬底放置在等离子体气氛中，并且在衬底中蚀刻诸如深沟槽和浅沟槽隔离结构的沟槽结构。保护层基本上防止了周边边缘区域的蚀刻，使得在蚀刻工艺期间黑色硅的形成基本上被最小化。

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