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1. 发明专利

JP2004281212A Ion implanter 审中-公开
公开(公告)号：JP2004281212A
公开(公告)日：2004-10-07
申请号：JP2003070317
申请日：2003-03-14
申请人： Fasl Japan 株式会社 , Fasl Japan Ltd
发明人： SOYA MASAYUKI
IPC分类号： C23C14/08 , H01J37/09 , H01J37/317 , H01L21/265
摘要： PROBLEM TO BE SOLVED: To improve operating efficiency by reducing frequency of exchange of the members constituting a slit in an ion implanter to limit the width of an ion beam.
SOLUTION: The slit part 25 is composed of a pair of carbon plate 31, the slit 40 formed between the pair of carbon plates 31, a support axis 32, an actuator 33, a transfer control means 34, and a rotation control means 38. The pair of the carbon plates 31 are translocated or rotated via the support axis 32 by controlling the actuator 33 by means of the transfer control means 34 or the rotation control means 38.
COPYRIGHT: (C)2005,JPO&NCIPI

2. 发明专利

JP2004165533A Semiconductor device fabricating method 有权
公开(公告)号：JP2004165533A
公开(公告)日：2004-06-10
申请号：JP2002331694
申请日：2002-11-15
申请人： Fasl Japan 株式会社 , Fasl Japan Ltd , Fujitsu Ltd , 富士通株式会社
发明人： NAGAKURA YOSHIMASA , OHASHI HIDEAKI
IPC分类号： C23C16/44 , C23C16/455 , H01L21/316 , H01L21/3205 , H01L21/768 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： C23C16/4408 , C23C16/45557 , H01L21/02129 , H01L21/02271 , H01L21/31612 , H01L21/31625 , H01L21/76801 , H01L21/76829 , H01L21/76834 , H01L21/76837
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device fabricating method capable of forming a sufficiently even insulative film without practicing a reflow process.
SOLUTION: The fabricating method includes a process for growing an insulative film 32a with an inside of a film forming chamber set at a first pressure, a pressure adjusting process for lowering gradually the pressure of the film forming chamber to a second pressure lower than the first pressure, and a process for growing further the insulative film 32b with the inside of the film forming chamber set at the second pressure.
COPYRIGHT: (C)2004,JPO

3. 发明专利

JP2004095918A Semiconductor memory device and its manufacturing method 审中-公开
标题翻译：半导体存储器件及其制造方法
公开(公告)号：JP2004095918A
公开(公告)日：2004-03-25
申请号：JP2002256195
申请日：2002-08-30
申请人： Fasl Japan Ltd , Fasl Japan 株式会社
发明人： NANSEI HIROYUKI , NAKAMURA MANABU , SERA KENTARO , AZUMA MASAHIKO , UTSUNO ITSUHIRO , TAKAGI HIDEO , KAJITA TATSUYA
IPC分类号： H01L21/318 , H01L21/8246 , H01L21/8247 , H01L27/10 , H01L27/105 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11568 , H01L21/3145 , H01L27/105 , H01L27/11526 , H01L27/11546 , Y10S438/954
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable semiconductor memory device in which a high quality multilayer insulating film such as an ON film or an ONO film is formed at low temperatures, and to provide its manufacturing method. SOLUTION: After forming a lower silicon oxide film 102 on a silicon region 101, a silicon film 103 is formed on the lower silicon oxide film 102, for example, by a thermal CVD method. Then, the silicon film 103 is completely nitrified by a plasma nitriding method so as to be substituted with a silicon nitride film 104. And then, the surface layer of the silicon nitride film 104 is oxided by a plasma oxidizing method so as to be substituted with an upper silicon oxide film 105, forming the ONO film 111 which is the multilayer insulating film composed of the lower silicon oxide film 102, the silicon nitride film 104, and the upper silicon film 105. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种高可靠性的半导体存储器件，其中在低温下形成诸如ON膜或ONO膜的高质量多层绝缘膜，并提供其制造方法。解决方案：在硅区域101上形成下部氧化硅膜102之后，例如通过热CVD法在下部氧化硅膜102上形成硅膜103。然后，通过等离子体氮化方法将硅膜103完全硝化以被氮化硅膜104置换。然后，通过等离子体氧化法使氮化硅膜104的表面层氧化以被替代形成作为由下部氧化硅膜102，氮化硅膜104和上部硅膜105构成的多层绝缘膜的ONO膜111的上部氧化硅膜105.权利要求（C）2004 ，JPO

4. 发明专利

JP2004095899A Cleaning method 审中-公开
公开(公告)号：JP2004095899A
公开(公告)日：2004-03-25
申请号：JP2002255707
申请日：2002-08-30
申请人： Fasl Japan Ltd , Fasl Japan 株式会社
发明人： NAGASHIMA TAKASHI , KAJITA TATSUYA , OKAMOTO SHIGERU
IPC分类号： H01L21/308 , H01L21/304
摘要： PROBLEM TO BE SOLVED: To provide a cleaning method which forms a structure having an interlayer insulating film and a reflection preventing film provided on a semiconductor substrate after a heat treatment, and polishes the structure then to clean, wherein foreign matters such as particle grains and metal contaminants can be suppressed from adhering to a cleaning surface.
SOLUTION: The method comprises the steps of: performing a thermal processing in order to electrically activate an impurity diffusion area of transistors formed on a semiconductor substrate; exposing at least a part of a surface of a reflection preventing film by polishing a structure having at least an interlayer insulating film provided on the semiconductor substrate and the reflection preventing film provided on the interlayer insulating film; cleaning the exposed surface by use of ammonia water; and mechanically cleaning the surface by use of chemicals having a fluoric weight concentration of 0.6% or less.
COPYRIGHT: (C)2004,JPO

5. 发明专利

JP2004091825A Thin film growing method 审中-公开
公开(公告)号：JP2004091825A
公开(公告)日：2004-03-25
申请号：JP2002252164
申请日：2002-08-29
申请人： Fasl Japan Ltd , Fasl Japan 株式会社 , Fujitsu Ltd , 富士通株式会社
发明人： HASEGAWA TAKASHI , SATO KAZUO , MUTO MASAKI
IPC分类号： C23C16/44 , H01L21/285
摘要： PROBLEM TO BE SOLVED: To provide a thin film growing method in which the wiring reliability and the via contact are not adversely affected by excessive heat treatment, and dust is prevented from being caused by unreasonably small heat treatment in a growing chamber.
SOLUTION: In a degassing chamber, the heat treatment is performed until the partial pressure of at least one kind of degassing species from a substrate for growth reaches the partial pressure at which particles having a mean grain size of ≥0.2 μm obtained by degassing of the degassing species is produced by ≤0.1 piece/cm
2 , and then, the thin film grows on the substrate for growth in a film deposition chamber.
COPYRIGHT: (C)2004,JPO

6. 发明专利

JP2005026315A Aligner, exposure method, and program 审中-公开
标题翻译：对齐器，曝光方法和程序
公开(公告)号：JP2005026315A
公开(公告)日：2005-01-27
申请号：JP2003187712
申请日：2003-06-30
申请人： Fasl Japan 株式会社 , Fasl Japan Ltd
发明人： ENDO SATOSHI
IPC分类号： G03F9/00 , H01L21/027 , H01L21/68
摘要： PROBLEM TO BE SOLVED: To provide an aligner which is capable of resuming an exposure process without carrying out a pilot process even after repairs or adjustments have been performed. SOLUTION: The aligner carrying out an exposure process by projecting a prescribed pattern of light onto a wafer is equipped with a stage 2 on which the wafer is placed and a light irradiating unit 6. The stage 2 can be moved by a moving mechanism 8. The operation of the moving mechanism 8 is controlled by a control unit 10. The control unit 10 calculates an alignment correction for correcting a relative positional shift of the stage 2 from the light irradiating unit 6 when the aligner is adjusted, and the aligner carries out an exposure process controlling the position of the stage 2 on the basis of the calculated alignment correction. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：即使在进行了修理或调整之后，也可以提供能够恢复曝光过程而不执行先导过程的对准器。
解决方案：通过将规定的光线投射到晶片上进行曝光处理的对准器装备有放置晶片的阶段2和照射单元6.舞台2可以通过移动机构8.移动机构8的操作由控制单元10控制。控制单元10计算对准校正，用于在调整对准器时校正来自光照射单元6的平台2的相对位置偏移，并且对准器根据计算出的对准校正进行控制台2的位置的曝光处理。版权所有（C）2005，JPO＆NCIPI

7. 发明专利

JP2004324723A Pipe connection structure, and seal member with built-in heater 审中-公开
标题翻译：管道连接结构和密封件与内置加热器
公开(公告)号：JP2004324723A
公开(公告)日：2004-11-18
申请号：JP2003118221
申请日：2003-04-23
申请人： Fasl Japan 株式会社 , Fasl Japan Ltd
发明人： KAMATA YOSHIKATSU
IPC分类号： F16L23/04 , F16J15/10 , F16L23/16 , F16L53/00 , H01L21/205
摘要： PROBLEM TO BE SOLVED: To provide a piping connection structure in which deposition of products due to reaction gas can be prevented by efficiently heating a piping connection part in spite of provision of a flange and a seal member on it, and a seal member usable for the piping connection structure. SOLUTION: Between the flanges 4b of piping members 4a, an O-ring 30 for keeping the piping connection part gas-tight is provided. Inside the O-ring 30, an electric heater 34 is embedded, and a lead 32 is extended from an outer circumference of the O-ring 30. By energizing the electric heater 34 in the O-ring from the lead 32, the O-ring 30 and around can be heated and kept at prescribed temperature. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种管道连接结构，其中尽管在其上设置了凸缘和密封构件，但是通过有效地加热管道连接部分可以防止由于反应气体而产生的沉积，并且密封件可用于管道连接结构的构件。解决方案：在管道构件4a的凸缘4b之间设置用于保持管道连接部分气密的O形环30。在O形环30的内部嵌入电加热器34，引线32从O形环30的外周延伸。通过从引线32向O形环中的电加热器34通电，环30及周围可以加热并保持在规定的温度。版权所有（C）2005，JPO＆NCIPI

8. 发明专利

JP2004303835A Substrate storing device 审中-公开
公开(公告)号：JP2004303835A
公开(公告)日：2004-10-28
申请号：JP2003092870
申请日：2003-03-28
申请人： Fasl Japan 株式会社 , Fasl Japan Ltd
发明人： SONE KAZUHIDE , SAITO YOSHITAKA
IPC分类号： B65G1/00 , B65G1/133 , B65G1/137 , H01L21/673 , H01L21/677 , H01L21/68
摘要： PROBLEM TO BE SOLVED: To provide a substrate storing device which is capable of storing substrates efficiently and protecting them against contamination. SOLUTION: The substrate storing device 20 comprises a load port 24 which mounts and positions carriers 22 containing substrates 21 and opens or closes the front doors 23 of the carriers 22, a robot 26 which takes out the substrates 21 from the carriers 22 and moves and arranges them on a substrate storing shelf 25, and the substrate storing shelf 25 where the substrates 21 are arranged and stored in layers sheet by sheet. A space within the movable range of the robot 26 and the substrate storing shelf 25 are filled up with clean nitrogen gas through a gas inlet 28A and kept in a clean nitrogen gas atmosphere. COPYRIGHT: (C)2005,JPO&NCIPI

9. 发明专利

JP2004111737A Method of manufacturing semiconductor device 有权
公开(公告)号：JP2004111737A
公开(公告)日：2004-04-08
申请号：JP2002273625
申请日：2002-09-19
申请人： Fasl Japan Ltd , Fasl Japan 株式会社
发明人： NAKAMURA MANABU , NANSEI HIROYUKI , SERA KENTARO , AZUMA MASAHIKO , UTSUNO ITSUHIRO , TAKAGI HIDEO , KAJITA TATSUYA
IPC分类号： H01L21/8234 , H01L21/314 , H01L21/316 , H01L21/336 , H01L21/8238 , H01L21/8239 , H01L21/8246 , H01L21/8247 , H01L27/088 , H01L27/10 , H01L27/105 , H01L27/115 , H01L29/78 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11568 , H01J37/32192 , H01L21/3144 , H01L21/31654 , H01L21/823857 , H01L21/823892 , H01L27/105 , H01L27/1052 , H01L27/115 , H01L27/11573
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a reliable semiconductor device which can reduce the amount of impurities, when forming an insulating film (second insulating film), such as a gate insulation film and a tunnel insulating film.
SOLUTION: A chemical oxide film 100 formed on a semiconductor substrate 1 by wet cleaning, using a strong oxidizing solution to reduce the attachment of impurities to the chemical oxide film 100 between the wet cleaning process and an insulating film forming process. Consequently, when forming the gate insulating film 200, including the chemical oxide film 100 in the insulating film forming process, wherein low-temperature processings are carried out, insulation deterioration of the gate insulating film can be prevented.
COPYRIGHT: (C)2004,JPO

10. 发明专利

JP2004047609A Recording medium, recording method, device and program of inspection result in manufacturing process of semiconductor device, and manufacture of semiconductor device 审中-公开
公开(公告)号：JP2004047609A
公开(公告)日：2004-02-12
申请号：JP2002201135
申请日：2002-07-10
申请人： Fasl Japan Ltd , Fasl Japan 株式会社
发明人： SASE TOUKO , DEGUCHI YUICHI
IPC分类号： G01R31/28 , H01L21/02 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To provide the analyzing method of result of inspection in the manufacturing process of the semiconductor device, which predicts quality of chips with high accuracy, based on the result of inspection of a defect, an analyzing device, an analyzing program, a recording medium for recording the analyzing program and the manufacturing method of the semiconductor device.
SOLUTION: The value (c) of b/a (Killer Rate) in each address is obtained from the total number (a) of addresses (×) wherein the defects exist among 9 pieces of sub regions provided with the addresses and the total number (b) of (F), wherein defects exist among 9 pieces of the sub regions provided with the addresses. Then, the value (f) (Non Killer Rate) of e/d in each addresses are obtained from a total number (d) of the addresses wherein defects do not exist among 9 pieces of sub regions, provided with addresses and the total number (e) of (P) of addresses, wherein no defect exists among 9 pieces of sub regions provided with the addresses. Thereafter, the value of (cxf) (Site Killer Rate) in each addresses is obtained, whereby the inspection of defect is correlated to the inspection of function.
COPYRIGHT: (C)2004,JPO

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