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1. 发明申请

US20070292987A1 Method Of Fabricating Strained Thin Film Semiconductor Layer 审中-公开
标题翻译：制造应变薄膜半导体层的方法
公开(公告)号：US20070292987A1
公开(公告)日：2007-12-20
申请号：US11659485
申请日：2005-03-22
申请人： Eui-Joon Yoon , Suk-Won Hong , Hyun-Ho Shin
发明人： Eui-Joon Yoon , Suk-Won Hong , Hyun-Ho Shin
IPC分类号： H01L21/20
CPC分类号： C30B25/18 , H01L21/0237 , H01L21/02381 , H01L21/0243 , H01L21/02439 , H01L21/0245 , H01L21/02494 , H01L21/02521 , H01L21/02532 , H01L21/02639
摘要： A method of fabricating a strained thin film semiconductor layer having less dislocation and less defects than conventional methods, or no dislocation and no defects by controlling a stress distribution in a semiconductor substrate is provided. The method includes forming a trench in a semiconductor substrate, and epitaxially growing a first hetero thin film inside the trench, the first hetero thin film having a lattice constant different from that of the semiconductor substrate, thereby forming a stressor thereinside. Then, a second hetero thin film is made to be epitaxially grown on the semiconductor substrate having the stressor formed therein, in which the second hetero thin film, thereby forming a strained thin film semiconductor layer by a stress field of the stressor.
摘要翻译：提供了一种制造具有比常规方法更少的位错和更少缺陷的应变薄膜半导体层的方法，或者通过控制半导体衬底中的应力分布不产生位错和缺陷。所述方法包括在半导体衬底中形成沟槽，并且在所述沟槽内部外延生长第一异质薄膜，所述第一异质薄膜的晶格常数与所述半导体衬底的晶格常数不同，从而在其内形成应力。然后，在其中形成有应力源的半导体衬底上外延生长第二异质薄膜，其中第二异质薄膜，由此通过应力源的应力场形成应变薄膜半导体层。

2. 发明授权

US07148541B2 Vertical channel field effect transistors having insulating layers thereon 有权
标题翻译：其上具有绝缘层的垂直沟道场效应晶体管
公开(公告)号：US07148541B2
公开(公告)日：2006-12-12
申请号：US10780067
申请日：2004-02-17
申请人： Tai-su Park , Eui-Joon Yoon , U-In Chung , Si-Young Choi , Jong-Ho Lee
发明人： Tai-su Park , Eui-Joon Yoon , U-In Chung , Si-Young Choi , Jong-Ho Lee
IPC分类号： H01L27/01
CPC分类号： H01L29/7851 , H01L29/66795 , H01L29/7854
摘要： A field effect transistor can include a vertical channel protruding from a substrate including a source/drain region junction between the vertical channel and the substrate, and an insulating layer extending on a side wall of the vertical channel toward the substrate to beyond the source/drain region junction. The transistor can also include a nitride layer extending on the side wall away from the substrate to beyond the insulating layer, a second insulating layer extending on the side wall that is separated from the channel by the nitride layer, and a gate electrode extending on the side wall toward the substrate to beyond the source/drain region junction. Related methods are also disclosed.
摘要翻译：场效应晶体管可以包括从包括垂直沟道和衬底之间的源极/漏极区域的衬底突出的垂直沟道，以及在垂直沟道的侧壁上朝向衬底延伸到源极/漏极区域交界处晶体管还可以包括在离开衬底的侧壁上延伸超过绝缘层的氮化物层，在侧壁上延伸的第二绝缘层，其通过氮化物层与沟道分离，以及栅电极侧壁朝向衬底以超出源/漏区结。还公开了相关方法。

3. 发明授权

US06312567B1 Method of forming a (200)-oriented platinum layer 失效
标题翻译：形成（200）取向的铂层的方法
公开(公告)号：US06312567B1
公开(公告)日：2001-11-06
申请号：US09320797
申请日：1999-05-27
申请人： Dong Su Lee , Dong Il Chun , Dong Yeon Park , Eui Joon Yoon , Min Hong Kim , Hyun Jung Woo , Tae Soon Park
发明人： Dong Su Lee , Dong Il Chun , Dong Yeon Park , Eui Joon Yoon , Min Hong Kim , Hyun Jung Woo , Tae Soon Park
IPC分类号： C23C1434
CPC分类号： C23C14/5806 , C23C14/185 , C23C14/58 , H01L21/2855 , H01L28/55 , H01L28/60
摘要： A method of depositing a (200)-oriented platinum thin film on a substrate, including the steps of forming a oxygen containing platinum layer on the surface of a silicon wafer heated to a temperature range over room temperature and not exceeding 700° C. under a mixed gaseous atmosphere of oxygen and inert gas and annealing the substrate at a temperature between 400° C. and 1000° C. The platinum thin film formed according to the present invention in (200)-oriented and does not have any conventional defects such as hillocks or voids.
摘要翻译：一种在衬底上沉积（200）取向的铂薄膜的方法，包括在加热至室温且不超过700℃的温度范围的硅晶片的表面上形成含氧铂层的步骤，氧气和惰性气体的混合气体气氛，并在400℃和1000℃之间的温度下退火衬底。根据本发明形成的铂薄膜（200）取向并且不具有任何常规缺陷作为小丘或空洞。

4. 发明授权

US6054331A Apparatus and methods of depositing a platinum film with anti-oxidizing function over a substrate 失效
标题翻译：在衬底上沉积具有抗氧化功能的铂膜的装置和方法
公开(公告)号：US6054331A
公开(公告)日：2000-04-25
申请号：US3058
申请日：1998-01-05
申请人： Hyun Jung Woo , Dong Yeon Park , Dong Su Lee , Dong Il Chun , Eui Joon Yoon
发明人： Hyun Jung Woo , Dong Yeon Park , Dong Su Lee , Dong Il Chun , Eui Joon Yoon
IPC分类号： C23C14/14 , C23C14/16 , C23C14/58 , H01L21/02 , H01L21/285 , H01L21/8242 , H01L21/8246 , H01L27/10 , H01L27/105 , H01L27/108 , H01L21/44
CPC分类号： C23C14/165 , C23C14/5806 , H01L28/65
摘要： A platinum film, which is used as a bottom electrode for a capacitor in a DRAM cell or a non-volatile ferroelectric memory cell, is formed in two separate processes, wherein a first thickness platinum part thereof is deposited under an inert gas atmosphere, and the second thickness platinum part is deposited under an atmosphere containing oxygen, nitrogen and/or a mixture thereof as well as an inert gas. The platinum film is annealed under a vacuum atmosphere to remove the oxygen an/or nitrogen introduced during the deposition of the second thickness platinum part. The annealed platinum film prevents formation of an oxide on a functional intermediate film such as a diffusion barrier layer or an adhesion layer, which is provided below the bottom electrode of platinum film.
摘要翻译：在DRAM单元或非易失性铁电体存储单元中用作电容器的底部电极的铂膜在两个分开的工艺中形成，其中第一厚度的铂部分在惰性气体气氛下沉积，并且在包含氧，氮和/或其混合物的气氛以及惰性气体中沉积第二厚度的铂部分。将铂膜在真空气氛下退火以除去在沉积第二厚度铂部件期间引入的氧气或氮气。退火的铂膜防止在设置在铂膜的底部电极下方的扩散阻挡层或粘合层等功能性中间膜上形成氧化物。

5. 发明授权

US5981390A Method for depositing a platinum layer on a silicon wafer 失效
标题翻译：在硅晶片上沉积铂层的方法
公开(公告)号：US5981390A
公开(公告)日：1999-11-09
申请号：US914397
申请日：1997-08-19
申请人： Dong Su Lee , Dong il Chun , Dong Yeon Park , Jo Woong Ha , Eui Joon Yoon , Min Hong Kim , Hyun Jung Woo
发明人： Dong Su Lee , Dong il Chun , Dong Yeon Park , Jo Woong Ha , Eui Joon Yoon , Min Hong Kim , Hyun Jung Woo
IPC分类号： H01L21/285 , H01L21/203 , H01L21/28 , H01L21/288 , H01L21/316 , H01L21/3205 , H01L41/08 , H01L41/09 , H01L21/283 , H01L21/477
CPC分类号： C23C14/5806 , C23C14/14 , H01L21/32051
摘要： The present invention relates to a method of depositing a platinum thin-film on a silicon wafer. The method includes the steps of depositing a platinum layer on an insulating oxide layer under an oxidation atmosphere to form a mixture film consisted of platinum grains, platinum oxide grains and oxygen adhered to those grains (hereinafter, "the mixture film" to be referred as "oxygen containing platinum thin-film"); depositing an additional platinum thin-film to a desired thickness on the oxygen containing platinum thin-film under a complete inert atmosphere; and annealing the silicon substrate at a temperature of 400 to 1,300.degree. C. in order to remove oxygen present in the independent form or in platinum oxide form within the oxygen containing platinum thin-film and to stabilize the entire platinum thin-film. The oxygen containing platinum thin-film layer serves as a glue layer during the depositing step of additional platinum thin-film layer and is converted into pure platinum condition after the annealing step, whereby the silicon substrate substantially does not have any glue layer between the platinum layer and the insulating layer of the silicon substrate.
摘要翻译：本发明涉及在硅晶片上沉积铂薄膜的方法。该方法包括以下步骤：在氧化气氛下在绝缘氧化物层上沉积铂层，形成由铂颗粒，氧化铂颗粒和附着在这些晶粒上的氧构成的混合膜（以下将“混合膜”称为 “含氧铂金薄膜”）; 在完全惰性气氛下在含氧铂薄膜上沉积另外的铂薄膜至所需厚度; 并在400〜1300℃的温度下退火硅衬底，以便除去含氧铂金薄膜中独立形式或氧化铂形式存在的氧并稳定整个铂薄膜。含铂的铂薄膜层在附加的铂薄膜层的沉积步骤中用作胶层，并且在退火步骤之后转化为纯铂状态，由此硅衬底在铂之间基本上不具有任何胶层层和硅衬底的绝缘层。

6. 发明授权

US07459359B2 Methods of fabricating vertical channel field effect transistors having insulating layers thereon 有权
标题翻译：制造其上具有绝缘层的垂直沟道场效应晶体管的方法
公开(公告)号：US07459359B2
公开(公告)日：2008-12-02
申请号：US11556804
申请日：2006-11-06
申请人： Tai-Su Park , Eui-Joon Yoon , U-In Chung , Si-Young Choi , Jong-Ho Lee
发明人： Tai-Su Park , Eui-Joon Yoon , U-In Chung , Si-Young Choi , Jong-Ho Lee
IPC分类号： H01L21/336 , H01L21/8234
CPC分类号： H01L29/7851 , H01L29/66795 , H01L29/7854
摘要： A method of forming a field effect transistor includes forming a vertical channel protruding from a substrate including a source/drain region junction between the vertical channel and the substrate, and forming an insulating layer extending on a side wall of the vertical channel toward the substrate to beyond the source/drain region junction. The method may also include forming a nitride layer extending on the side wall away from the substrate to beyond the insulating layer, forming a second insulating layer extending on the side wall that is separated from the channel by the nitride layer, and forming a gate electrode extending on the side wall toward the substrate to beyond the source/drain region junction.
摘要翻译：形成场效应晶体管的方法包括形成从包括垂直沟道和衬底之间的源极/漏极区域的衬底突出的垂直沟道，并且形成在垂直沟道的侧壁上朝向衬底延伸的绝缘层，超出源/漏区结。该方法还可以包括在侧壁上形成远离衬底延伸到绝缘层的氮化物层，形成在侧壁上延伸的第二绝缘层，所述第二绝缘层通过氮化物层从沟道分离，并形成栅电极在侧壁上朝向衬底延伸超过源/漏区结。

7. 发明申请

US20070066018A1 METHODS OF FABRICATING VERTICAL CHANNEL FIELD EFFECT TRANSISTORS HAVING INSULATING LAYERS THEREON 有权
标题翻译：制造具有绝缘层的垂直通道场效应晶体管的方法
公开(公告)号：US20070066018A1
公开(公告)日：2007-03-22
申请号：US11556804
申请日：2006-11-06
申请人： Tai-Su Park , Eui-Joon Yoon , U-In Chung , Si-Young Choi , Jong-Ho Lee
发明人： Tai-Su Park , Eui-Joon Yoon , U-In Chung , Si-Young Choi , Jong-Ho Lee
IPC分类号： H01L21/336
CPC分类号： H01L29/7851 , H01L29/66795 , H01L29/7854
摘要： A method of forming a field effect transistor includes forming a vertical channel protruding from a substrate including a source/drain region junction between the vertical channel and the substrate, and forming an insulating layer extending on a side wall of the vertical channel toward the substrate to beyond the source/drain region junction. The method may also include forming a nitride layer extending on the side wall away from the substrate to beyond the insulating layer, forming a second insulating layer extending on the side wall that is separated from the channel by the nitride layer, and forming a gate electrode extending on the side wall toward the substrate to beyond the source/drain region junction.
摘要翻译：形成场效应晶体管的方法包括形成从包括垂直沟道和衬底之间的源极/漏极区域的衬底突出的垂直沟道，并且形成在垂直沟道的侧壁上朝向衬底延伸的绝缘层，超出源/漏区结。该方法还可以包括在侧壁上形成远离衬底延伸到绝缘层的氮化物层，形成在侧壁上延伸的第二绝缘层，所述第二绝缘层通过氮化物层从沟道分离，并形成栅电极在侧壁上朝向衬底延伸超过源/漏区结。

8. 发明授权

US06498097B1 Apparatus and method of forming preferred orientation-controlled platinum film using oxygen 失效
标题翻译：使用氧形成优选的取向控制铂膜的装置和方法
公开(公告)号：US06498097B1
公开(公告)日：2002-12-24
申请号：US09059638
申请日：1998-04-13
申请人： Dong Yeon Park , Dong Su Lee , Hyun Jung Woo , Dong Il Chun , Eui Joon Yoon
发明人： Dong Yeon Park , Dong Su Lee , Hyun Jung Woo , Dong Il Chun , Eui Joon Yoon
IPC分类号： H01L2144
CPC分类号： H01L28/60 , H01L21/2855 , H01L21/28556 , H01L21/32051
摘要： A platinum film orientation-controlled to (111), (200) and/or (220) is provided by depositing the platinum film under an atmosphere containing an oxygen component such as O2, O3, N2O , N2+O2, or mixtures thereof as well as an inert gas (Ar, Ne, Kr, or Xe) on a substrate heated to a temperature ranged from room temperature to 700° C., and annealing to remove the gases introduced into the platinum film during the deposition thereof. The platinum film formed in this process has excellent electrical conductivity (resistivity is lower than 15 &mgr;&OHgr;-cm), good enough adhesion strength to be used for electronic devices, and does not show hillocks, voids or pinholes.
摘要翻译：通过在包含氧组分如O 2，O 3，N 2 O，N 2 + O 2或其混合物的气氛下沉积铂膜来提供控制到（111），（200）和/或（220）的铂膜取向以及惰性气体（Ar，Ne，Kr或Xe）在加热到室温至700℃的温度下进行退火，并且在其沉积期间除去引入到铂膜中的气体。在该方法中形成的铂膜具有优异的导电性（电阻率低于15μOMEGA-cm），具有足够的粘合强度用于电子器件，并且不显示小丘，空隙或针孔。

9. 发明申请

US20080186512A1 Apparatus and Method for Measuring Curvature Using Multiple Beams 审中-公开
标题翻译：使用多个光束测量曲率的装置和方法
公开(公告)号：US20080186512A1
公开(公告)日：2008-08-07
申请号：US11995561
申请日：2006-08-01
申请人： Bong Kee , Eui-Joon Yoon
发明人： Bong Kee , Eui-Joon Yoon
IPC分类号： G01B11/14 , G01B11/24
CPC分类号： G01B11/25
摘要： There is provided a curvature measuring apparatus and method using multiple beams. m×n multiple beams generated by an m×n laser diode (LD) array or an m×n vertical cavity surface emitting laser array having a uniform pitch are converted into multiple divergent or multiple parallel beams. The multiple beams strike and reflect from the surface of a thin film formed on a substrate Then, the multiple beams are detected by an m×n spot array in a detector such as a charge coupled device (CCD) or a CMOS image sensor. The spot spacing between the beams in the array is measured in a direction parallel to the incident plane. The spot spacing between the beams is changed by the curvature of the substrate in the direction parallel to the incident plane and the curvature may be expressed by a function including change in beam spacing, an incident angle, a distance between the surface of the thin film and the detector. These values can be measured and the curvature of the surface of the thin film can be obtained from these values. Since an m×n two-dimensional spot array is used, it is possible to obtain a two-dimensional curvature profile of the surface of the thin film.
摘要翻译：提供了使用多个光束的曲率测量装置和方法。由具有均匀间距的mxn激光二极管（LD）阵列或mxn垂直腔表面发射激光器阵列产生的多个光束被转换成多个发散或多个平行光束。多个光束从形成在基板上的薄膜的表面射出并反射。然后，多个光束通过诸如电荷耦合器件（CCD）或CMOS图像传感器的检测器中的mxn光点阵列检测。在平行于入射平面的方向上测量阵列中的光束之间的光点间隔。光束之间的光斑间隔在平行于入射平面的方向上被基板的曲率改变，并且曲率可以由包括光束间隔的变化，入射角，薄膜表面之间的距离和检测器。可以测量这些值，并且可以从这些值获得薄膜表面的曲率。由于使用了mxn二维光点阵列，所以可以获得薄膜表面的二维曲率轮廓。

10. 发明申请

US20050145932A1 Vertical channel field effect transistors having insulating layers thereon and methods of fabricating the same 有权
标题翻译：具有绝缘层的垂直沟道场效应晶体管及其制造方法
公开(公告)号：US20050145932A1
公开(公告)日：2005-07-07
申请号：US10780067
申请日：2004-02-17
申请人： Tai-su Park , Eui-Joon Yoon , U-In Chung , Si-Young Choi , Jong-Ho Lee
发明人： Tai-su Park , Eui-Joon Yoon , U-In Chung , Si-Young Choi , Jong-Ho Lee
IPC分类号： H01L29/78 , H01L21/336 , H01L29/786 , H01L29/10
CPC分类号： H01L29/7851 , H01L29/66795 , H01L29/7854
摘要： A field effect transistor can include a vertical channel protruding from a substrate including a source/drain region junction between the vertical channel and the substrate, and an insulating layer extending on a side wall of the vertical channel toward the substrate to beyond the source/drain region junction. The transistor can also include a nitride layer extending on the side wall away from the substrate to beyond the insulating layer, a second insulating layer extending on the side wall that is separated from the channel by the nitride layer, and a gate electrode extending on the side wall toward the substrate to beyond the source/drain region junction. Related methods are also disclosed.
摘要翻译：场效应晶体管可以包括从包括垂直沟道和衬底之间的源极/漏极区域的衬底突出的垂直沟道，以及在垂直沟道的侧壁上朝衬底延伸超过源/漏极的绝缘层区域交界处晶体管还可以包括在离开衬底的侧壁上延伸超过绝缘层的氮化物层，在侧壁上延伸的第二绝缘层，其通过氮化物层与沟道分离，以及栅电极侧壁朝向衬底以超出源/漏区结。还公开了相关方法。

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