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1. 发明申请

US20060141808A1 Method for the heat treatment of substrates 失效
标题翻译：基板热处理方法
公开(公告)号：US20060141808A1
公开(公告)日：2006-06-29
申请号：US11356697
申请日：2006-02-17
申请人： Ernst Granneman , Vladimir Kuznetsov , Xavier Pages , Pascal Vermont , Herbert Terhorst , Gert-Jan Snijders
发明人： Ernst Granneman , Vladimir Kuznetsov , Xavier Pages , Pascal Vermont , Herbert Terhorst , Gert-Jan Snijders
IPC分类号： H01L21/26 , H01L21/324 , H01L21/42 , H01L21/477
CPC分类号： H01L21/324 , H01L21/42 , H01L21/477 , H01L21/67109 , H01L21/67248 , H01L21/67784 , H01L21/6838
摘要： A substrate undergoes a semiconductor fabrication process at different temperatures in a reactor without changing the temperature of the reactor. The substrate is held suspended by flowing gas between two heated surfaces of the reactor. Moving the two heated surfaces in close proximity with the substrate for a particular time duration heats the substrate to a desired temperature. The desired temperature is then maintained by distancing the heated surfaces from the substrate and holding the heated surface at the increased distance to minimize further substrate heating.
摘要翻译：衬底在反应器中在不改变反应器温度的情况下在不同温度下进行半导体制造工艺。通过在反应器的两个加热表面之间流动气体将基板保持悬浮。将两个加热的表面紧邻衬底移动特定的持续时间将衬底加热到所需的温度。然后通过将加热的表面与衬底隔开并将加热的表面保持在增加的距离来保持所需的温度，以使进一步的衬底加热最小化。

2. 发明申请

US20050092249A1 Atomic layer deposition reactor 审中-公开
标题翻译：原子层沉积反应器
公开(公告)号：US20050092249A1
公开(公告)日：2005-05-05
申请号：US10991556
申请日：2004-11-18
申请人： Olli Kilpela , Ville Saanila , Wei-Min Li , Kai-Erik Elers , Juhana Kostamo , Ivo Raaijmakers , Ernst Granneman
发明人： Olli Kilpela , Ville Saanila , Wei-Min Li , Kai-Erik Elers , Juhana Kostamo , Ivo Raaijmakers , Ernst Granneman
IPC分类号： C23C16/44 , C23C16/452 , C23C16/455 , C23C16/507 , C23C16/509 , C23C16/00
CPC分类号： C23C16/45544 , C23C16/4412 , C23C16/452 , C23C16/45514 , C23C16/45536 , C23C16/45565 , C23C16/45589 , C23C16/507 , C23C16/509
摘要： Various reactors for growing thin films on a substrate by subjecting the substrate to alternately repeated surface reactions of vapor-phase reactants are disclosed. In one embodiment, the reactor comprises a reaction chamber. A showerhead plate divides the reaction chamber into upper and lower parts. A first precursor is directed towards the lower half of the reaction chamber and a second precursor is directed towards the upper half of the reaction chamber. The substrate is disposed within the lower half of the reaction chamber. The showerhead plate includes plurality passages such that the upper half is in communication with the lower half of the reaction chamber. In another arrangement, the upper half of the reaction chamber defines a plasma cavity in which in-situ radicals are formed. In yet another arrangement, the reaction chamber includes a shutter plate, which is configured to selectively open and close the passages in the showerhead plate. In other arrangements, the showerhead plate is arranged to modify the local flow patterns of the gases flowing through the reaction chamber.
摘要翻译：公开了用于通过使衬底经历气相反应物的交替重复表面反应而在衬底上生长薄膜的各种反应器。在一个实施方案中，反应器包括反应室。喷头板将反应室分成上部和下部。第一前体指向反应室的下半部分，第二前体指向反应室的上半部分。基板设置在反应室的下半部内。喷头板包括多个通道，使得上半部分与反应室的下半部连通。在另一种布置中，反应室的上半部限定了其中形成原位自由基的等离子体腔。在另一种布置中，反应室包括挡板，其被构造成选择性地打开和关闭喷头板中的通道。在其他布置中，喷头板被布置成改变流过反应室的气体的局部流动模式。

3. 发明申请

US20050017310A1 Methods of forming silicide films in semiconductor devices 有权
标题翻译：在半导体器件中形成硅化物膜的方法
公开(公告)号：US20050017310A1
公开(公告)日：2005-01-27
申请号：US10866643
申请日：2004-06-10
申请人： Ernst Granneman , Vladimir Kuznetsov , Xavier Pages , Cornelius van der Jeugd
发明人： Ernst Granneman , Vladimir Kuznetsov , Xavier Pages , Cornelius van der Jeugd
IPC分类号： H01L21/28 , H01L21/24 , H01L21/285 , H01L21/336 , H01L21/8234 , H01L27/088 , H01L29/78 , H01L29/76
CPC分类号： H01L21/28518 , H01L29/665
摘要： A method of self-aligned silicidation involves interruption of the silicidation process prior to complete reaction of the blanket material (e.g., metal) in regions directly overlying patterned and exposed other material (e.g., silicon). Diffusion of excess blanket material from over other regions (e.g., overlying insulators) is thus prevented. Control and uniformity are insured by use of conductive rapid thermal annealing in hot wall reactors, with massive heated plates closely spaced from the substrate surfaces. Interruption is particularly facilitated by forced cooling, preferably also by conductive thermal exchange with closely spaced, massive plates.
摘要翻译：自对准硅化的方法包括在直接覆盖图案化和暴露的其它材料（例如硅）的区域中的覆盖材料（例如金属）完全反应之前中断硅化工艺。从而防止了过量的覆盖材料从其它区域扩散（例如，覆盖绝缘体）。通过在热壁反应器中使用导电快速热退火来保护控制和均匀性，其中大量加热板与基板表面紧密地间隔开。通过强制冷却特别容易地破坏中断，优选也通过与间隔紧密的块状板进行导电热交换。

4. 发明申请

US20070287261A1 TRENCH ISOLATION STRUCTURES FOR INTEGRATED CIRCUITS 审中-公开
标题翻译：用于集成电路的稳压隔离结构
公开(公告)号：US20070287261A1
公开(公告)日：2007-12-13
申请号：US11844227
申请日：2007-08-23
申请人： Ivo Raaijmakers , Pekka Soininen , Ernst Granneman
发明人： Ivo Raaijmakers , Pekka Soininen , Ernst Granneman
IPC分类号： H01L21/762
CPC分类号： H01L21/02164 , H01L21/02145 , H01L21/02178 , H01L21/02216 , H01L21/0228 , H01L21/3141 , H01L21/3144 , H01L21/3145 , H01L21/31612 , H01L21/3162 , H01L21/76224
摘要： A dielectric film is formed by atomic layer deposition to conformally fill a narrow, deep trench for device isolation. The method of the illustrated embodiments includes alternately pulsing vapor-phase reactants in a string of cycles, where each cycle deposits no more than about a monolayer of material, capable of completely filling high aspect ratio trenches. Additionally, the trench-fill material composition can be tailored by processes described herein, particularly to match the coefficient of thermal expansion (CTE) to that of the surrounding substrate within which the trench is formed. Mixed phases of mullite and silica have been found to meet the goals of device isolation and matched CTE. The described process includes mixing atomic layer deposition cycles of aluminum oxide and silicon oxide in ratios selected to achieve the desired composition of the isolation material, namely on the order of 30% alumina and 70% silicon oxide by weight.
摘要翻译：通过原子层沉积形成电介质膜，以保形地填充狭窄的深沟槽，用于器件隔离。所示实施方案的方法包括交替地以一系列循环脉冲气相反应物，其中每个循环不超过约单层材料，能够完全填充高纵横比沟槽。此外，沟槽填充材料组合物可以通过本文所述的方法来定制，特别是使热膨胀系数（CTE）与其中形成沟槽的周围基底的热膨胀系数相匹配。已经发现莫来石和二氧化硅的混合相达到器件隔离和匹配CTE的目标。所描述的方法包括以选择的比例混合氧化铝和氧化硅的原子层沉积循环，以达到分离材料的所需组成，即按重量计30％氧化铝和70％氧化硅。

5. 发明申请

US20070059932A1 Methods of forming films in semiconductor devices with solid state reactants 有权
标题翻译：在具有固态反应物的半导体器件中形成膜的方法
公开(公告)号：US20070059932A1
公开(公告)日：2007-03-15
申请号：US11595441
申请日：2006-11-09
申请人： Ernst Granneman , Vladimir Kuznetsov , Xavier Pages , Cornelius van der Jeugd
发明人： Ernst Granneman , Vladimir Kuznetsov , Xavier Pages , Cornelius van der Jeugd
IPC分类号： H01L21/44
CPC分类号： H01L21/28518 , H01L29/665
摘要： A method of self-aligned silicidation involves interruption of the silicidation process prior to complete reaction of the blanket material (e.g., metal) in regions directly overlying patterned and exposed other material (e.g., silicon). Diffusion of excess blanket material from over other regions (e.g., overlying insulators) is thus prevented. Control and uniformity are insured by use of conductive rapid thermal annealing in hot wall reactors, with massive heated plates closely spaced from the substrate surfaces. Interruption is particularly facilitated by forced cooling, preferably also by conductive thermal exchange with closely spaced, massive plates.
摘要翻译：自对准硅化的方法包括在直接覆盖图案化和暴露的其它材料（例如硅）的区域中的覆盖材料（例如金属）完全反应之前中断硅化工艺。从而防止了过量的覆盖材料从其它区域扩散（例如，覆盖绝缘体）。通过在热壁反应器中使用导电快速热退火来保护控制和均匀性，其中大量加热板与基板表面紧密地间隔开。通过强制冷却特别容易地破坏中断，优选也通过与间隔紧密的块状板进行导电热交换。

6. 发明申请

US20050095873A1 Method for the heat treatment of substrates 失效
标题翻译：基板热处理方法
公开(公告)号：US20050095873A1
公开(公告)日：2005-05-05
申请号：US10700298
申请日：2003-10-31
申请人： Ernst Granneman , Vladimir Kuznetsov , Xavier Pages , Pascal Vermont
发明人： Ernst Granneman , Vladimir Kuznetsov , Xavier Pages , Pascal Vermont
IPC分类号： H01L21/00 , H01L21/26 , H01L21/324 , H01L21/42 , H01L21/477 , H01L21/683
CPC分类号： H01L21/67109 , H01L21/324 , H01L21/6838
摘要： A substrate undergoes a semiconductor fabrication process at different temperatures in a reactor without changing the temperature of the reactor. The substrate is held suspended by flowing gas between two heated surfaces of the reactor. Moving the two heated surfaces in close proximity with the substrate for a particular time duration heats the substrate to a desired temperature. The desired temperature is then maintained by distancing the heated surfaces from the substrate and holding the heated surface at the increased distance to minimize further substrate heating.
摘要翻译：衬底在反应器中在不改变反应器温度的情况下在不同温度下进行半导体制造工艺。通过在反应器的两个加热表面之间流动气体将基板保持悬浮。将两个加热的表面紧邻衬底移动特定的持续时间将衬底加热到所需的温度。然后通过将加热的表面与衬底隔开并将加热的表面保持在增加的距离来保持所需的温度，以使进一步的衬底加热最小化。

7. 发明授权

US06843201B2 Temperature control for single substrate semiconductor processing reactor 有权
标题翻译：单基板半导体处理反应器的温度控制
公开(公告)号：US06843201B2
公开(公告)日：2005-01-18
申请号：US10141517
申请日：2002-05-08
申请人： Vladimir Kuznetsov , Ruud Grisel , Ernst Granneman
发明人： Vladimir Kuznetsov , Ruud Grisel , Ernst Granneman
IPC分类号： C23C16/458 , C23C16/46 , C23C16/52 , C30B33/02 , H01L21/00 , C23C16/00
CPC分类号： H01L21/67248 , C23C16/4583 , C23C16/46 , C23C16/52 , C30B33/02
摘要： A reactor for heat treatment of a substrate having a process chamber within a substrate enclosing structure, and a support structure configured to position a substrate at a predetermined spacing between the upper part and the bottom part within the process chamber during processing. Streams of gas may lift the substrate from the support structure so that the substrate floats. A plurality of heating elements is associated with at least one of the upper part and the bottom part and are arranged to define heating zones. A controller controls the heating elements individually so that each heating zone is configured to have a predetermined temperature determined by the controller. The heating zones provide for a non-uniform heating laterally across the substrate.
摘要翻译：一种用于热处理在衬底封闭结构内具有处理室的衬底的反应器，以及支撑结构，其被配置为在处理期间将衬底定位在处理室内的上部和底部之间的预定间隔处。气流可以从支撑结构提起衬底，使得衬底漂浮。多个加热元件与上部和底部中的至少一个相关联并且被布置成限定加热区。控制器分别控制加热元件，使得每个加热区被配置成具有由控制器确定的预定温度。加热区域横跨衬底提供不均匀的加热。

8. 发明申请

US20070096321A1 Conformal lining layers for damascene metallization 有权
标题翻译：用于镶嵌金属化的保形衬层
公开(公告)号：US20070096321A1
公开(公告)日：2007-05-03
申请号：US11511877
申请日：2006-08-28
申请人： Ivo Raaijmakers , Suvi Haukka , Ville Saanila , Pekka Soininen , Kai-Erik Elers , Ernst Granneman
发明人： Ivo Raaijmakers , Suvi Haukka , Ville Saanila , Pekka Soininen , Kai-Erik Elers , Ernst Granneman
IPC分类号： H01L23/52 , H01L23/48 , H01L29/40
CPC分类号： C23C16/45525 , C23C16/0272 , C23C16/045 , C23C16/08 , C23C16/14 , C23C16/32 , C23C16/34 , C23C16/44 , C23C16/45534 , C23C16/45536 , C30B25/02 , C30B29/02 , C30B29/36 , H01L21/28562 , H01L21/7681 , H01L21/76814 , H01L21/76843 , H01L21/76846 , H01L21/76873 , H01L23/5226 , H01L23/53223 , H01L23/53238 , H01L23/53242 , H01L23/53252 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Method and structures are provided for conformal lining of dual damascene structures in integrated circuits. Trenches and contact vias are formed in insulating layers. The trenches and vias are exposed to alternating chemistries to form monolayers of a desired lining material. Exemplary process flows include alternately pulsed metal halide and ammonia gases injected into a constant carrier flow. Self-terminated metal layers are thus reacted with nitrogen. Near perfect step coverage allows minimal thickness for a diffusion barrier function, thereby maximizing the volume of a subsequent filling metal for any given trench and via dimensions.
摘要翻译：提供了集成电路中双镶嵌结构的保形衬里的方法和结构。沟槽和接触通孔形成在绝缘层中。沟槽和通孔暴露于交替的化学物质以形成所需衬里材料的单层。示例性工艺流程包括交替脉冲的金属卤化物和注入恒定载流子的氨气。自身端接的金属层因此与氮气反应。接近完美的台阶覆盖允许扩散阻挡功能的最小厚度，从而使任何给定沟槽和通孔尺寸的后续填充金属的体积最大化。

9. 发明申请

US20070015374A1 Apparatus and method for atomic layer deposition on substrates 有权
标题翻译：用于原子层沉积在衬底上的装置和方法
公开(公告)号：US20070015374A1
公开(公告)日：2007-01-18
申请号：US11527080
申请日：2006-09-25
申请人： Ernst Granneman
发明人： Ernst Granneman
IPC分类号： C23C16/00 , H01L21/31
CPC分类号： C30B25/14 , C23C16/4411 , C23C16/45544 , C23C16/45565 , C23C16/4586 , C23C16/46 , C30B25/10
摘要： A deposition station allows atomic layer deposition (ALD) of films onto a substrate. The station comprises an upper and a lower substantially flat part between which a substrate is accommodated. The parts are positioned opposite each other and parallel to the substrate during processing. At least one of the parts is provided with a plurality of gas channels that allow at least two mutually reactive reactants to be discharged out of that part to the substrate. The discharge is configured to occur in a sequence of alternating, separated pulses for ALD. In addition, each part is preferably configured to be about 1 mm or less from the substrate to minimize the volume of the reaction chamber to increase the efficiency with which gases are purged from the chamber. Also, for each reactant, the upper and lower parts are preferably kept at a temperature outside of the window in which optimal ALD of that reactant occurs, thereby minimizing deposition of that reactant on deposition station surfaces.
摘要翻译：沉积站允许膜的原子层沉积（ALD）到基底上。该工位包括上部和下部基本上平坦的部分，在其之间容纳衬底。这些部件在加工过程中彼此相对定位并平行于基板。至少一个部件设置有多个气体通道，其允许至少两个相互反应的反应物从该部分排出到基底。放电配置为以ALD的交替的分离脉冲的顺序发生。此外，每个部分优选地被配置为距离基板约1mm或更小，以最小化反应室的体积，以提高气体从腔室中清除的效率。此外，对于每种反应物，上部和下部优选保持在窗口外的温度，在该温度下发生该反应物的最佳ALD，从而使该反应物沉积在沉积站表面上。

10. 发明授权

US06759325B2 Sealing porous structures 有权
标题翻译：密封多孔结构
公开(公告)号：US06759325B2
公开(公告)日：2004-07-06
申请号：US10303293
申请日：2002-11-22
申请人： Ivo Raaijmakers , Pekka T. Soininen , Ernst Granneman , Suvi Haukka , Kai-Erik Elers , Marko Tuominen , Hessel Sprey , Herbert Terhorst , Menso Hendriks
发明人： Ivo Raaijmakers , Pekka T. Soininen , Ernst Granneman , Suvi Haukka , Kai-Erik Elers , Marko Tuominen , Hessel Sprey , Herbert Terhorst , Menso Hendriks
IPC分类号： H01L214763
CPC分类号： H01L21/76843 , H01L21/28556 , H01L21/28562 , H01L21/7681 , H01L21/76814 , H01L21/7682 , H01L21/76825 , H01L21/76828 , H01L21/76831 , H01L21/76844 , H01L21/76864 , H01L21/76873 , H01L23/5226 , H01L23/53238 , H01L2221/1047 , H01L2924/0002 , H01L2924/00
摘要： Method and structures are provided for conformal lining of dual damascene structures in integrated circuits, and particularly of openings formed in porous materials. Trenches and contact vias are formed in insulating layers. The pores on the sidewalls of the trenches and vias are blocked, and then the structure is exposed to alternating chemistries to form monolayers of a desired lining material. In exemplary process flows chemical or physical vapor deposition (CVD or PVD) of a sealing layer blocks the pores due to imperfect conformality. An alternating process can also be arranged by selection of pulse separation and/or pulse duration to achieve reduced conformality relative to a self-saturating, self-limiting atomic layer deposition (ALD) process. In still another arrangement, layers with anisotropic pore structures can be sealed by selectively melting upper surfaces. Blocking is followed by a self-limiting, self-saturating atomic layer deposition (ALD) reactions without significantly filling the pores.
摘要翻译：提供了用于集成电路中的双镶嵌结构的保形衬里的方法和结构，特别是在多孔材料中形成的开口。沟槽和接触通孔形成在绝缘层中。沟槽和通孔的侧壁上的孔堵塞，然后将结构暴露于交替的化学物质以形成所需衬里材料的单层。在示例性工艺流程中，密封层的化学或物理气相沉积（CVD或PVD）由于不完美的共形性而堵塞孔。也可以通过选择脉冲分离和/或脉冲持续时间来布置交替过程，以相对于自饱和的自限制性原子层沉积（ALD）工艺实现降低的共形。在另一种布置中，可以通过选择性地熔化上表面来密封具有各向异性孔结构的层。之后是自限制的，自饱和的原子层沉积（ALD）反应而没有显着填充孔隙。

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