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1. 发明授权

US5751060A Electronic package 失效
公开(公告)号：US5751060A
公开(公告)日：1998-05-12
申请号：US795181
申请日：1997-02-04
申请人： Eric Herman Laine , James Warren Wilson
发明人： Eric Herman Laine , James Warren Wilson
IPC分类号： H01L21/56 , H01L23/14 , H01L23/29 , H01L23/31 , H01L23/498 , H01L23/538 , H01L33/62 , H01L23/34 , H01L23/48 , H01L23/495
CPC分类号： H01L24/32 , H01L21/563 , H01L23/142 , H01L23/293 , H01L23/3121 , H01L23/49816 , H01L23/49822 , H01L23/5385 , H01L2224/16225 , H01L2224/27013 , H01L2224/32225 , H01L2224/32245 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/83051 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/1532 , H01L2924/15787 , H01L2924/181 , H01L33/62
摘要： An electronic package which includes a thermally conductive, e.g., copper, member having a thin layer of dielectric material, e.g., polyimide, on at least one surface thereof. On the polyimide is provided the desired high density circuit pattern which is electrically connected, e.g., using solder or wirebonds, to the respective contact sites of a semiconductor chip. If wirebonds are used, the copper member preferably includes an indentation therein and the chip is secured, e.g., using adhesive, within this indentation. If solder is used to couple the chip, a plurality of small diameter solder elements are connected to respective contact sites of the chip and to respective ones of the pads and/or lines of the provided circuit pattern. Significantly, the pattern possesses lines and/or pads in one portion which are of high density and lines and/or pads in another portion which are of lesser density. The chip is coupled to the higher density portion of the circuitry which then may "fan out" to the lesser (and larger) density lines and/or pads of the other portion of the circuitry. The resulting package is also of a thin profile configuration and particularly adapted for being positioned on and electrically coupled to a PCB or the like substrate having conductors thereon.

2. 发明授权

US5939783A Electronic package 失效
标题翻译：电子包装
公开(公告)号：US5939783A
公开(公告)日：1999-08-17
申请号：US72625
申请日：1998-05-05
申请人： Eric Herman Laine , James Warren Wilson
发明人： Eric Herman Laine , James Warren Wilson
IPC分类号： H01L23/13 , H01L23/14 , H01L23/36 , H01L23/498 , H01L23/48 , H01L23/52 , H05K1/18
CPC分类号： H01L23/13 , H01L23/142 , H01L23/36 , H01L23/49816 , H01L2224/16 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/73204 , H01L2224/85471 , H01L24/45 , H01L24/48 , H01L2924/01039 , H01L2924/01079 , H01L2924/12042 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/1532 , H01L2924/181
摘要： An electronic package which includes a thermally conductive, e.g., copper, member having a thin layer of dielectric material, e.g., polyimide, on at least one surface thereof. On the polyimide is provided the desired high density circuit pattern which is electrically connected, e.g., using solder or wirebonds, to the respective contact sites of a semiconductor chip. If wirebonds are used, the copper member preferably includes an indentation therein and the chip is secured, e.g., using adhesive, within this indentation. If solder is used to couple the chip, a plurality of small diameter solder elements are connected to respective contact sites of the chip and to respective ones of the pads and/or lines of the provided circuit pattern. Significantly, the pattern possesses lines and/or pads in one portion which are of high density and lines and/or pads in another portion which are of lesser density. The chip is coupled to the higher density portion of the circuitry which then may "fan out" to the lesser (and larger) density lines and/or pads of the other portion of the circuitry. The resulting package is also of a thin profile configuration and particularly adapted for being positioned on and electrically coupled to a PCB or the like substrate having conductors thereon.
摘要翻译：一种电子封装，其包括在其至少一个表面上具有例如聚酰亚胺的薄层的导热例如铜构件。在聚酰亚胺上提供了期望的高密度电路图案，其电连接到例如使用焊料或引线键合到半导体芯片的相应接触部位。如果使用了引线键，则铜构件优选地包括其中的凹陷，并且该芯片例如使用粘合剂固定在该凹口内。如果使用焊料来耦合芯片，则多个小直径焊料元件连接到芯片的相应接触位置以及所提供的电路图案的相应焊盘和/或线路中的相应的一个。重要的是，该图案具有一部分中具有高密度的线和/或焊盘，另一部分具有较小密度的线和/或焊盘。芯片耦合到电路的较高密度部分，然后该电路可以“扇出”到电路的另一部分的较小（以及更大）的密度线和/或焊盘。所得到的封装也是薄型构造，并且特别适于被定位在具有导体的PCB或类似基板上并电耦合到其上。

3. 发明授权

US5728606A Electronic Package 失效
标题翻译：电子封装
公开(公告)号：US5728606A
公开(公告)日：1998-03-17
申请号：US611299
申请日：1996-03-05
申请人： Eric Herman Laine , James Warren Wilson
发明人： Eric Herman Laine , James Warren Wilson
IPC分类号： H01L21/56 , H01L23/14 , H01L23/29 , H01L23/31 , H01L23/498 , H01L23/538 , H01L33/62 , H01L21/60 , H01L21/44
CPC分类号： H01L24/32 , H01L21/563 , H01L23/142 , H01L23/293 , H01L23/3121 , H01L23/49816 , H01L23/49822 , H01L23/5385 , H01L2224/16225 , H01L2224/27013 , H01L2224/32225 , H01L2224/32245 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/83051 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/1532 , H01L2924/15787 , H01L2924/181 , H01L33/62
摘要： An electronic package which includes a thermally conductive, e.g., copper, member having a thin layer of dielectric material, e.g., polyimide, on at least one surface thereof. On the polyimide is provided the desired high density circuit pattern which is electrically connected, e.g., using solder or wirebonds, to the respective contact sites of a semiconductor chip. If wirebonds are used, the copper member preferably includes an indentation therein and the chip is secured, e.g., using adhesive, within this indentation. If solder is used to couple the chip, a plurality of small diameter solder elements are connected to respective contact sites of the chip and to respective ones of the pads and/or lines of the provided circuit pattern. Significantly, the pattern possesses lines and/or pads in one portion which are of high density and lines and/or pads in another portion which are of lesser density. The chip is coupled to the higher density portion of the circuitry which then may "fan out" to the lesser (and larger) density lines and/or pads of the other portion of the circuitry. The resulting package is also of a thin profile configuration and particularly adapted for being positioned on and electrically coupled to a PCB or the like substrate having conductors thereon.
摘要翻译：一种电子封装，其包括在其至少一个表面上具有例如聚酰亚胺的薄层的导热例如铜构件。在聚酰亚胺上提供了期望的高密度电路图案，其电连接到例如使用焊料或引线键合到半导体芯片的相应接触部位。如果使用了引线键，则铜构件优选地包括其中的凹陷，并且该芯片例如使用粘合剂固定在该凹口内。如果使用焊料来耦合芯片，则多个小直径焊料元件连接到芯片的相应接触位置以及所提供的电路图案的相应焊盘和/或线路中的相应的一个。重要的是，该图案具有一部分中具有较高密度的线和/或焊盘，另一部分具有较小密度的线和/或焊盘。芯片耦合到电路的较高密度部分，然后该电路可以“扇出”到电路的另一部分的较小（以及更大）的密度线和/或焊盘。所得到的封装也是薄型构造，并且特别适于被定位在具有导体的PCB或类似基板上并电耦合到其上。

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