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1. 发明申请

WO2012058852A1 MINIATURE SURFACE MOUNT DEVICE WITH LARGE PIN PADS 审中-公开
标题翻译：微型表面安装装置，具有大的PIN PADS
公开(公告)号：WO2012058852A1
公开(公告)日：2012-05-10
申请号：PCT/CN2011/000335
申请日：2011-03-02
申请人： CREE HUIZHOU SOLID STATE LIGHTING COMPANY LIMITED , CHAN, Chi Keung , PANG, Chak Hau , LI, Feihong , LAU, Yue Kwong Victor , ZHANG, Jun , EMERSON, David Todd
发明人： CHAN, Chi Keung , PANG, Chak Hau , LI, Feihong , LAU, Yue Kwong Victor , ZHANG, Jun , EMERSON, David Todd
IPC分类号： H01L33/62 , H01L33/54 , H01L33/48 , H01L23/495 , H01L23/48
CPC分类号： H01L25/0753 , H01L33/486 , H01L33/62 , H01L2224/48091 , H01L2224/73265 , H01L2924/09701 , H01L2924/00014 , H01L2924/00
摘要： One embodiment of the surface mount light emitting diode (LED) package (10) includes a lead frame and a plastic casing (12) at least partially encasing the lead frame. The lead frame includes a plurality of electrically conductive chip carriers. There is an LED (44, 46, 48) disposed on each one of the plurality of electrically conductive chip carriers. A profile height of the surface mount LED package (10) is less than about 1.0 mm.
摘要翻译：表面贴装发光二极管（LED）封装（10）的一个实施例包括引线框架和至少部分地封装引线框架的塑料外壳（12）。引线框架包括多个导电芯片载体。设置在多个导电芯片载体的每一个上的LED（44,46,48）。表面贴装LED封装（10）的外形高度小于约1.0mm。

2. 发明申请

WO2006060134A8 RESTRICTED RADIATED HEATING ASSEMBLY FOR HIGH TEMPERATURE PROCESSING 审中-公开
标题翻译：用于高温加工的限制性辐射加热组件
公开(公告)号：WO2006060134A8
公开(公告)日：2007-05-24
申请号：PCT/US2005040786
申请日：2005-11-14
申请人： CREE INC , EMERSON DAVID TODD , GARNER ROBERT ALLEN , BERGMANN MICHAEL JOHN , BROWN KEENAN CARLYLE , PENNINGTON MICHAEL ALLEN , COLEMAN THOMAS GOLDTHWAITE
发明人： EMERSON DAVID TODD , GARNER ROBERT ALLEN , BERGMANN MICHAEL JOHN , BROWN KEENAN CARLYLE , PENNINGTON MICHAEL ALLEN , COLEMAN THOMAS GOLDTHWAITE
IPC分类号： C23C16/46 , H01L21/00 , H05B3/68
CPC分类号： C23C16/46 , C30B25/105 , H01L21/67103
摘要： A vapor deposition reactor and associated method are disclosed that increase the lifetime and productivity of a filament-based resistive-heated vapor deposition system. The reactor and method provide for heating the filament while permitting the filament to move as it expands under the effect of increasing temperature while limiting the expanding movement of the filament to an amount that prevents the expanding movement of the filament from creating undesired contact with any portions of the reactor.
摘要翻译：公开了气相沉积反应器和相关方法，其增加了基于长丝的电阻加热气相沉积系统的寿命和生产率。该反应器和方法用于加热细丝，同时允许细丝随着其在温度升高的作用下膨胀而移动，同时将细丝的扩张运动限制到防止细丝的扩张运动与任何部分产生不希望的接触的反应堆。

3. 发明申请

WO2006011936A3 LIGHT EMITTING DEVICES HAVING CURRENT BLOCKING STRUCTURES AND METHODS OF FABRICATING LIGHT EMITTING DEVICES HAVING CURRENT BLOCKING STRUCTURES 审中-公开
标题翻译：具有电流阻塞结构的发光装置和制造具有电流阻塞结构的发光装置的方法
公开(公告)号：WO2006011936A3
公开(公告)日：2006-12-07
申请号：PCT/US2005010868
申请日：2005-03-30
申请人： CREE INC , HABERERN KEVIN , BERGMANN MICHAEL JOHN , MIECZKOWSKI VAN , EMERSON DAVID TODD
发明人： HABERERN KEVIN , BERGMANN MICHAEL JOHN , MIECZKOWSKI VAN , EMERSON DAVID TODD
IPC分类号： H01L33/14
CPC分类号： H01L33/145 , H01S5/0421 , H01S5/2063 , H01S5/2068 , H01S5/32341
摘要： Light emitting devices and methods of fabricating light emitting devices having a current blocking mechanism below the wire bond pad (22) are provided. The current blocking mechanism may be a reduced conduction region (30) in an active region (14) of the device. The current blocking mechanism could be a damage region of a layer on which a contact (18) is formed. The current blocking mechanism could be a Schottky contact between an ohmic contact (18) and the active region (14) of the device. A semiconductor junction, such as a PN junction could also be provided between the ohmic contact (18) and the active region (14).
摘要翻译：提供了在引线接合焊盘（22）下方制造具有电流阻挡机构的发光器件的发光器件和方法。电流阻塞机构可以是器件的有源区域（14）中的减小的导电区域（30）。电流阻挡机构可以是其上形成有触点（18）的层的损伤区域。电流阻塞机构可以是欧姆接触件（18）和器件的有源区域（14）之间的肖特基接触。也可以在欧姆接触件（18）和有源区域（14）之间提供诸如PN结的半导体结。

4. 发明申请

WO2006023060A3 GROUP III NITRIDE BASED QUANTUM WELL LIGHT EMITTING DEVICE STRUCTURES WITH AN INDIUM CONTAINING CAPPING STRUCTURE 审中-公开
公开(公告)号：WO2006023060A3
公开(公告)日：2006-03-02
申请号：PCT/US2005/022597
申请日：2005-06-24
申请人： CREE, INC. , BERGMANN, Michael John , EMERSON, David Todd
发明人： BERGMANN, Michael John , EMERSON, David Todd
IPC分类号： H01L33/00
摘要： Group III nitride based light emitting devices and methods of fabricating Group III nitride based light emitting devices are provided. The emitting devices include an n-type Group III nitride layer, a Group III nitride based active region on the n-type Group III nitride layer and comprising at least one quantum well structure, a Group III nitride layer including indium on the active region, a p-type Group III nitride layer including aluminum on the Group III nitride layer including indium, a first contact on the n-type Group III nitride layer and a second contact on the p-type Group III nitride layer. The Group III nitride layer including indium may also include aluminum.

5. 发明申请

WO2002103814A1 GAN BASED LED FORMED ON A SIC SUBSTRATE 审中-公开
标题翻译：基于SIC基板的GAN基LED
公开(公告)号：WO2002103814A1
公开(公告)日：2002-12-27
申请号：PCT/US2002/019013
申请日：2002-06-12
申请人： CREE, INC. , EMERSON, David, Todd , ABARE, Amber, Christine , BERGMANN, Michael, John
发明人： EMERSON, David, Todd , ABARE, Amber, Christine , BERGMANN, Michael, John
IPC分类号： H01L33/00
CPC分类号： H01L33/04 , H01L33/007 , H01L33/12 , H01L33/32 , Y10S438/93
摘要： A light emitting diode is disclosed. The diode includes a silicon carbide substrate (21) having a first conductivity type, a first gallium nitride layer (25) above the SiC substrate having the same conductivity type as the substrate, a superlattice on the GaN layer (27) formed of a plurality of repeating sets of alternating layers selected from among GaN, InGaN, and AlInGaN, a second GaN layer (30) on the superlattice having the same conductivity type as the first GaN layer, a multiple quantum well (31) on the second GaN layer, a third GaN layer on the multiple quantum well, a contact structure on the third GaN layer (32) having the opposite conductivity type from the substrate and the first GaN layer, an ohmic contact to the SiC substrate, and an ohmic contact to the contact structure.
摘要翻译：公开了一种发光二极管。二极管包括具有第一导电类型的碳化硅衬底（21），具有与衬底相同导电类型的SiC衬底之上的第一氮化镓层（25），在由多个衬底形成的GaN层（27）上的超晶格重复选自GaN，InGaN和AlInGaN中的一组交替层，在具有与第一GaN层相同的导电类型的超晶格上的第二GaN层（30），第二GaN层上的多量子阱（31）在多量子阱上的第三GaN层，具有与衬底和第一GaN层相反的导电类型的第三GaN层（32）上的接触结构，与SiC衬底的欧姆接触以及与触点的欧姆接触结构体。

6. 发明申请

WO0127980A9 SINGLE STEP PENDEO- AND LATERAL EPITAXIAL OVERGROWTH OF GROUP III-NITRIDE LAYERS 审中-公开
标题翻译：第III组氮化物层的单步和侧向外延生长
公开(公告)号：WO0127980A9
公开(公告)日：2002-09-26
申请号：PCT/US0028056
申请日：2000-10-11
申请人： CREE INC , KONG HUA-SHUANG , EDMOND JOHN ADAM , HABERERN KEVIN WARD , EMERSON DAVID TODD
发明人： KONG HUA-SHUANG , EDMOND JOHN ADAM , HABERERN KEVIN WARD , EMERSON DAVID TODD
IPC分类号： H01L21/20 , H01L21/205 , H01S5/02
CPC分类号： H01L21/0265 , H01L21/0237 , H01L21/02458 , H01L21/0254 , H01L21/02639 , H01L21/02647 , H01S5/32341 , H01S2304/12
摘要： A method of fabricating a gallium nitride-based semiconductor structure on a substrate includes the steps of forming a mask (14) having at least one opening (6) therein directly on the substrate (18), growing a buffer layer (12) through the opening, and growing a layer of gallium nitride (20) upwardly from the buffer layer and laterally across the mask. During growth of the gallium nitride from the mask, the vertical and horizontal growth rates of the gallium nitride layer are maintained at rates sufficient to prevent polycrystalline material (30) nucleating on said mask from interrupting the lateral growth of the gallium nitride layer. In an alternative embodiment, the method includes forming at least one raised portion (15) defining adjacent trenches (18) in the substrate and forming a mask (14) on the substrate (10), the mask having at least one opening (16) over the upper surface of the raised portion. A buffer layer (12) may be grown from the upper surface of the raised portion. The gallium nitride layer (26) is then grown laterally by pendeoepitaxy over the trenches.
摘要翻译：在衬底上制造氮化镓基半导体结构的方法包括以下步骤：在衬底（18）上直接形成具有至少一个开口（6）的掩模（14），通过该衬底生长缓冲层（12）打开并从缓冲层向上生长一层氮化镓（20）并横向穿过掩模。在从掩模生长氮化镓期间，氮化镓层的垂直和水平生长速率保持在足以防止在所述掩模上成核的多晶材料（30）中断氮化镓层的横向生长的速率。在替代实施例中，该方法包括形成在衬底中限定相邻沟槽（18）的至少一个凸起部分（15），并在衬底（10）上形成掩模（14），所述掩模具有至少一个开口（16）在凸起部分的上表面上。缓冲层（12）可以从凸起部分的上表面生长。然后通过在沟槽上的外延生长横向生长氮化镓层（26）。

7. 发明申请

WO2012116470A1 MINIATURE SURFACE MOUNT DEVICE 审中-公开
标题翻译：微型表面安装装置
公开(公告)号：WO2012116470A1
公开(公告)日：2012-09-07
申请号：PCT/CN2011/000334
申请日：2011-03-02
申请人： CREE HUIZHOU SOLID STATE LIGHTING COMPANY LIMITED , CHAN, Chi Keung , PANG, Chak Hau , LI, Feihong , EMERSON, David Todd
发明人： CHAN, Chi Keung , PANG, Chak Hau , LI, Feihong , EMERSON, David Todd
IPC分类号： H01L25/075 , H01L23/495 , H01L23/48
CPC分类号： H01L33/62 , H01L24/48 , H01L24/85 , H01L24/97 , H01L25/0753 , H01L33/486 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/85 , H01L2224/97 , H01L2924/00014 , H01L2924/09701 , H01L2924/12041 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： A surface mount LED package includes a lead frame carrying a plurality of LEDs and a plastic casing at least partially encasing the lead frame. The lead frame includes an electrically conductive chip carrier and a first, a second, and a third electrically conductive connection parts which separate from the electrically conductive chip carrier. Each of the first, second and third electrically conductive connection parts has an upper surface, a lower surface, and a connection pad on the upper surface. The plurality of the LEDs are disposed on an upper surface of the electrically conductive chip carrier. Each LED has a first electrical terminal electrically coupled to the electrically conductive chip carrier. Each LED has a second electrical terminal electrically coupled to the connection pad of a corresponding one of the first, second, and third electrically conductive connection parts. The lead frame has a thickness of about 0.42mm to about 0.48mm and the surface mount LED package has a thickness of about 0.85mm to about 0.95mm.
摘要翻译：表面贴装LED封装包括承载多个LED的引线框架和至少部分地封装引线框架的塑料外壳。引线框架包括导电芯片载体和与导电芯片载体分离的第一，第二和第三导电连接部件。第一，第二和第三导电连接部分中的每一个具有上表面，下表面和上表面上的连接垫。多个LED设置在导电芯片载体的上表面上。每个LED具有电耦合到导电芯片载体的第一电端子。每个LED具有电耦合到第一，第二和第三导电连接部分中对应的一个的连接焊盘的第二电端子。引线框架具有约0.42mm至约0.48mm的厚度，并且表面贴装LED封装具有约0.85mm至约0.95mm的厚度。

8. 发明申请

WO2012026966A1 EMITTER PACKAGE WITH ANGLED OR VERTICAL LED 审中-公开
标题翻译：带有直角或垂直LED的发光二极管
公开(公告)号：WO2012026966A1
公开(公告)日：2012-03-01
申请号：PCT/US2011/001457
申请日：2011-08-18
申请人： CREE, INC. , CREE HONG KONG LIMITED , EMERSON, David, Todd , CHAN, Alex Chi, Keung
发明人： EMERSON, David, Todd , CHAN, Alex Chi, Keung
IPC分类号： H01L33/48
CPC分类号： H01L33/48 , C09K11/7731 , C09K11/7734 , C09K11/7774 , G02B6/0023 , G02B6/0068 , G02B6/0073 , H01L33/486 , H01L33/50 , H01L33/52 , H01L2224/32245 , H01L2224/32257 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/181 , H01L2933/0091 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： The present invention is directed to LED packages and LED displays utilizing the LED packages, wherein the LED chips within the packages are arranged in unique orientations to provide the desired package or display FFP. One LED package according to the present invention comprises a reflective cup and an LED chip mounted in the reflective cup. The reflective cup has a first axis and a second axis orthogonal to the first axis, wherein the LED chip is rotated within the reflective cup so that the LED chip is out of alignment with said first axis. Some of the LED packages can comprise a rectangular LED chip having a chip longitudinal axis and an oval shaped reflective cup having a cup longitudinal axis. The LED chip is mounted within the reflective cup with the chip longitudinal axis angled from the cup longitudinal axis. LED displays according to the present invention comprise a plurality of LED packages, at least some of which have an LED chip mounted in a reflective cup at different angles to achieve the desired display FFP.
摘要翻译：本发明涉及使用LED封装的LED封装和LED显示器，其中封装内的LED芯片以独特的取向布置以提供所需的封装或显示器FFP。根据本发明的一个LED封装包括安装在反射杯中的反射杯和LED芯片。反射杯具有与第一轴正交的第一轴和第二轴，其中LED芯片在反射杯内旋转，使得LED芯片与所述第一轴线不对准。一些LED封装可以包括具有芯片纵向轴线的矩形LED芯片和具有杯纵向轴线的椭圆形反射杯。 LED芯片安装在反射杯内，其芯片纵向轴线从杯纵向轴线成角度。根据本发明的LED显示器包括多个LED封装，其至少其中一些具有以不同角度安装在反射杯中的LED芯片以实现期望的显示器FFP。

9. 发明申请

WO2010096288A1 METHODS FOR COMBINING LIGHT EMITTING DEVICES IN A PACKAGE AND PACKAGES INCLUDING COMBINED LIGHT EMITTING DEVICES 审中-公开
标题翻译：用于将发光装置组合在包装中的方法和包括组合的发光装置的包装
公开(公告)号：WO2010096288A1
公开(公告)日：2010-08-26
申请号：PCT/US2010/023327
申请日：2010-02-05
申请人： CREE, INC. , EMERSON, David, Todd
发明人： EMERSON, David, Todd
IPC分类号： F21K99/00
CPC分类号： H01L25/0753 , F21K9/00 , F21K9/90 , H01L2924/0002 , H01L2924/00
摘要： Methods of forming a light emitting device package assembly include defining a chromaticity region in a two dimensional chromaticity space, and subdividing the defined chromaticity region into at least three chromaticity subregions, providing a plurality of light emitting devices that emit light having a chromaticity that falls within at least one of the defined chromaticity subregions, selecting at least three of the plurality of light emitting devices, each of the three light emitting devices emits light from a different one of the chromaticity subregions, and mounting the selected light emitting devices on a light emitting device package body.
摘要翻译：形成发光器件封装组件的方法包括限定二维色度空间中的色度区域，并将限定的色度区域细分为至少三个色度区域，提供发射具有落入其中的色度的光的多个发光器件定义的色度子区域中的至少一个，选择多个发光器件中的至少三个，三个发光器件中的每一个发光器件从不同的色度子区域发射光，并将所选择的发光器件安装在发光器件封装体。

10. 发明申请

WO2008112064A3 LIGHT EMITTING DEVICES HAVING CURRENT REDUCING STRUCTURES AND METHODS OF FORMING LIGHT EMITTING DEVICES HAVING CURRENT REDUCING STRUCTURES 审中-公开
标题翻译：具有电流减少结构的发光装置和形成具有减少电流结构的发光装置的方法
公开(公告)号：WO2008112064A3
公开(公告)日：2009-02-12
申请号：PCT/US2008002140
申请日：2008-02-19
申请人： CREE INC , EMERSON DAVID TODD , HABERERN KEVIN , BERGMANN MICHAEL JOHN , SLATER DAVID , DONOFRIO MATTHEW , EDMOND JOHN
发明人： EMERSON DAVID TODD , HABERERN KEVIN , BERGMANN MICHAEL JOHN , SLATER DAVID , DONOFRIO MATTHEW , EDMOND JOHN
IPC分类号： H01L33/14 , H01L33/38
CPC分类号： H01L33/145 , H01L24/05 , H01L33/14 , H01L33/38 , H01L2224/49107 , H01L2933/0016
摘要： A light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, and an active region between the n-type semiconductor layer and the p-type semiconductor layer. A non-transparent feature, such as a wire bond pad, is on the p-type semiconductor layer or on the n-type semiconductor layer opposite the p-type semiconductor layer, and a reduced conductivity region is in the p-type semiconductor layer or the n-type semiconductor layer and is aligned with the non-transparent feature. The reduced conductivity region may extend from a surface of the p-type semiconductor layer opposite the n-type semiconductor layer towards the active region and/or from a surface of the n-type semiconductor layer opposite the p-type semiconductor layer towards the active region.
摘要翻译：发光器件包括p型半导体层，n型半导体层和n型半导体层和p型半导体层之间的有源区。 p型半导体层或与p型半导体层相对的n型半导体层上的非透明特性，例如引线接合焊盘，在p型半导体层中具有导电性降低的区域或n型半导体层并且与非透明特征对准。导电性降低区域可以从与n型半导体层相对的p型半导体层的表面朝向有源区域和/或从与p型半导体层相对的n型半导体层的表面朝向有源区域地区。

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