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1. 发明申请

US20060261415A1 Method to chemically remove metal impurities from polycide gate sidewalls 审中-公开
公开(公告)号：US20060261415A1
公开(公告)日：2006-11-23
申请号：US11494063
申请日：2006-07-27
申请人： Fernando Gonzalez , Don Powell
发明人： Fernando Gonzalez , Don Powell
IPC分类号： H01L29/94 , H01L29/00
CPC分类号： H01L29/4941 , H01L21/02071 , H01L21/28061 , H01L21/28247 , H01L21/3185 , H01L21/3205 , H01L21/32051 , H01L21/32136 , H01L21/32137 , H01L21/32139 , H01L2924/0002 , H01L2924/00
摘要： An embodiment includes a process of forming a gate stack that acts to resist the redeposition to the semiconductive substrate of mobilized metal such as from a metal gate electrode. An embodiment also relates to a system that achieves the process. An embodiment also relates to a gate stack structure that provides a composition that resists the redeposition of metal during processing and field use.

2. 发明申请

US20060246658A1 A CAPACITOR ELECTRODE HAVING AN INTERFACE LAYER OF DIFFERENT CHEMICAL COMPOSITION FORMED ON A BULK LAYER 审中-公开
标题翻译：具有形成在大块层上的不同化学成分的界面层的电容器电极
公开(公告)号：US20060246658A1
公开(公告)日：2006-11-02
申请号：US11456435
申请日：2006-07-10
申请人： Scott DeBoer , Don Powell
发明人： Scott DeBoer , Don Powell
IPC分类号： H01L21/8242
CPC分类号： H01L28/60 , H01L21/7687 , H01L27/10852 , H01L28/91
摘要： An improved capacitor that is less susceptible to the depletion effect and methods for providing the same. The capacitor comprises a first and second electrode and an insulating layer interposed therebetween. The first electrode includes a bulk layer comprising n-doped polysilicon. The first electrode also includes an interface layer extending from a first surface of the bulk layer to the insulating layer. The interface layer is heavily doped with phosphorus so that the depletion region of the first electrode is confined substantially within the interface layer. The method of forming the interface layer comprises depositing a layer of hexamethldisilazane (HMDS) material over the first surface of the bulk layer so that HMDS molecules of the HMDS material chemically bond to the first surface of the bulk layer. The method further comprises annealing the layer of HMDS material in a phosphine ambient so as to replace CH3 methyl groups with PH3 molecules. The interface layer is then passivated in a nitrogen ambient having a reduced temperature so as to reduce the number of dangling silicon bonds of the lower electrode in a manner that results in reduced thermal damage to neighboring circuit elements.
摘要翻译：对消耗效应不太敏感的改进的电容器及其提供方法。电容器包括第一和第二电极以及介于它们之间的绝缘层。第一电极包括包含n掺杂多晶硅的体层。第一电极还包括从主体层的第一表面延伸到绝缘层的界面层。界面层用磷重掺杂，使得第一电极的耗尽区基本上被限制在界面层内。形成界面层的方法包括在本体层的第一表面上沉积一层六甲基二硅氮烷（HMDS）材料，使得HMDS材料的HMDS分子化学键合到本体层的第一表面。该方法还包括在磷化氢环境中退火HMDS材料层，以便用PH 3分子取代CH 3 3甲基。然后在具有降低的温度的氮气环境中钝化界面层，以便以导致对相邻电路元件的热损伤降低的方式减少下电极的悬挂硅键的数量。

3. 发明申请

US20060166460A1 Use of selective oxidation to form asymmetrical oxide features during the manufacture of a semiconductor device 有权
标题翻译：在制造半导体器件期间使用选择性氧化形成不对称的氧化物特征
公开(公告)号：US20060166460A1
公开(公告)日：2006-07-27
申请号：US11386157
申请日：2006-03-21
申请人： Paul Rudeck , Don Powell
发明人： Paul Rudeck , Don Powell
IPC分类号： H01L21/76
CPC分类号： H01L27/11521 , H01L21/02238 , H01L21/02255 , H01L21/31662 , H01L21/32105 , H01L27/115 , Y10S438/981
摘要： A sidewall oxidation process for use during the formation of a transistor such as a flash memory cell allows for improved control of a gate oxide profile. The method comprises doping transistor source and drain regions to different doping levels, then performing a transistor sidewall oxidation using a particular process to modify the gate oxide thickness. The oxide forms at a faster rate along the source sidewall than along the drain sidewall. By using ranges within the oxidation environment described, a source side gate oxide having a variable and selectable thickness may be formed, while forming a drain-side oxide which has a single thickness where a thinner layer is desirable. This leads to improved optimization of key competing requirements of a flash memory cell, such as program and erase performance, while maintaining sufficient long-term data retention. The process may allow improved cell scalability, shortened design time, and decreased manufacturing costs.
摘要翻译：在形成诸如快闪存储器单元的晶体管期间使用的侧壁氧化工艺允许改善对栅极氧化物轮廓的控制。该方法包括将晶体管源极和漏极区域掺杂到不同的掺杂水平，然后使用特定工艺来执行晶体管侧壁氧化以改变栅极氧化物厚度。氧化物沿着源侧壁比沿着排出侧壁以更快的速率形成。通过使用所描述的氧化环境中的范围，可以形成具有可变和可选厚度的源极侧栅极氧化物，同时形成具有单层厚度的漏极侧氧化物，其中需要更薄的层。这导致闪存单元的关键竞争需求的改进的优化，例如编程和擦除性能，同时保持足够的长期数据保留。该过程可以允许改进的细胞可扩展性，缩短的设计时间和降低的制造成本。

4. 发明授权

US08429765B2 Breatheable padding for cycling gloves 有权
标题翻译：用于骑自行车手套的呼吸垫
公开(公告)号：US08429765B2
公开(公告)日：2013-04-30
申请号：US11070582
申请日：2005-03-01
申请人： Robert Africa , Don Powell , Paul Fair
发明人： Robert Africa , Don Powell , Paul Fair
IPC分类号： A41D19/00
CPC分类号： A63B71/141 , A41D19/01523 , A41D27/28 , A63B71/143 , A63B71/146
摘要： An athletic glove having at least one padded insert is provided. The padded insert comprises reticulated or open cell form, or a rubber formed into a matrix that allows ventilation paths.
摘要翻译：提供具有至少一个填充插入物的运动手套。填充的嵌入物包括网状或开孔形式，或形成为允许通气路径的基质的橡胶。

5. 发明申请

US20060007631A1 Capacitor electrode having an interface layer of different chemical composition formed on a bulk layer 失效
标题翻译：在本体层上形成具有不同化学组成的界面层的电容器电极
公开(公告)号：US20060007631A1
公开(公告)日：2006-01-12
申请号：US11216411
申请日：2005-08-31
申请人： Scott DeBoer , Don Powell
发明人： Scott DeBoer , Don Powell
IPC分类号： H01G4/005
CPC分类号： H01L28/60 , H01L21/7687 , H01L27/10852 , H01L28/91
摘要： An improved capacitor that is less susceptible to the depletion effect and methods for providing the same. The capacitor comprises a first and second electrode and an insulating layer interposed therebetween. The first electrode includes a bulk layer comprising n-doped polysilicon. The first electrode also includes an interface layer extending from a first surface of the bulk layer to the insulating layer. The interface layer is heavily doped with phosphorus so that the depletion region of the first electrode is confined substantially within the interface layer. The method of forming the interface layer comprises depositing a layer of hexamethldisilazane (HMDS) material over the first surface of the bulk layer so that HMDS molecules of the HMDS material chemically bond to the first surface of the bulk layer. The method further comprises annealing the layer of HMDS material in a phosphine ambient so as to replace CH3 methyl groups with PH3 molecules. The interface layer is then passivated in a nitrogen ambient having a reduced temperature so as to reduce the number of dangling silicon bonds of the lower electrode in a manner that results in reduced thermal damage to neighboring circuit elements.
摘要翻译：对消耗效应不太敏感的改进的电容器及其提供方法。电容器包括第一和第二电极以及介于它们之间的绝缘层。第一电极包括包含n掺杂多晶硅的体层。第一电极还包括从主体层的第一表面延伸到绝缘层的界面层。界面层用磷重掺杂，使得第一电极的耗尽区基本上被限制在界面层内。形成界面层的方法包括在本体层的第一表面上沉积一层六甲基二硅氮烷（HMDS）材料，使得HMDS材料的HMDS分子化学键合到本体层的第一表面。该方法还包括在磷化氢环境中退火HMDS材料层，以便用PH 3分子取代CH 3 3甲基。然后在具有降低的温度的氮气环境中钝化界面层，以便以导致对相邻电路元件的热损伤降低的方式减少下电极的悬挂硅键的数量。

6. 发明申请

US20060000414A1 Semiconductor processing equipment for forming films of uniform properties on semiconductor substrates 审中-公开
标题翻译：用于在半导体衬底上形成均匀性质的膜的半导体加工设备
公开(公告)号：US20060000414A1
公开(公告)日：2006-01-05
申请号：US11214608
申请日：2005-08-29
申请人： Garry Mercaldi , Don Powell
发明人： Garry Mercaldi , Don Powell
IPC分类号： C23C16/00
CPC分类号： H01L21/02164 , C23C16/46 , H01L21/0217 , H01L21/02216 , H01L21/31612 , Y10T428/12389 , Y10T428/12528 , Y10T428/2495 , Y10T428/31678
摘要： Processing equipment for forming films exhibiting at least one substantially uniform property on an active surface of a semiconductor substrate includes a component for continuously varying a reaction chamber temperature. The temperature variation component may operate under control of a feedback control system or a temperature regulator, which may be associated with one or more temperature sensors.
摘要翻译：在半导体衬底的有源表面上形成至少一个基本上均匀性质的膜的加工设备包括用于连续改变反应室温度的组分。温度变化部件可以在可以与一个或多个温度传感器相关联的反馈控制系统或温度调节器的控制下操作。

7. 发明申请

US20050028930A1 System and method for selectively increasing surface temperature of an object 失效
公开(公告)号：US20050028930A1
公开(公告)日：2005-02-10
申请号：US10931592
申请日：2004-08-31
申请人： Don Powell
发明人： Don Powell
IPC分类号： H01L21/00 , H01L21/324 , C23F1/00
CPC分类号： H01L21/324 , H01L21/67115
摘要： A system and method for selectively increasing the thermal effect of a radiant energy source to the surface of an object relative to the substrate is described in the context of rapid thermal processing of semiconductor wafers, and apparatus produced therefrom. A radiation-absorptive atmosphere is introduced between the radiant energy source and the object to increase conductive heat transfer to the surface of the object and reduce the available radiant heat transfer to the substrate, thereby increasing the thermal effect to the surface relative to the substrate.

8. 发明申请

US20060261500A1 Method to chemically remove metal impurities from polycide gate sidewalls 有权
公开(公告)号：US20060261500A1
公开(公告)日：2006-11-23
申请号：US11494844
申请日：2006-07-28
申请人： Fernando Gonzalez , Don Powell
发明人： Fernando Gonzalez , Don Powell
IPC分类号： H01L21/4763 , H01L21/31
CPC分类号： H01L29/4941 , H01L21/02071 , H01L21/28061 , H01L21/28247 , H01L21/3185 , H01L21/3205 , H01L21/32051 , H01L21/32136 , H01L21/32137 , H01L21/32139 , H01L2924/0002 , H01L2924/00
摘要： An embodiment includes a process of forming a gate stack that acts to resist the redeposition to the semiconductive substrate of mobilized metal such as from a metal gate electrode. An embodiment also relates to a system that achieves the process. An embodiment also relates to a gate stack structure that provides a composition that resists the redeposition of metal during processing and field use.

9. 发明申请

US20060258171A1 Selective oxidation methods and transistor fabrication methods 失效
标题翻译：选择性氧化法和晶体管制造方法
公开(公告)号：US20060258171A1
公开(公告)日：2006-11-16
申请号：US11489051
申请日：2006-07-18
申请人： Don Powell
发明人： Don Powell
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/32105 , H01L21/28061 , H01L21/28247
摘要： The invention includes selective oxidation methods and transistor fabrication methods. In one implementation, a selective oxidation method includes positioning a substrate within a chamber. The substrate has first and second different oxidizable materials. The substrate is therein exposed to a gas mixture comprising an oxidizer and a reducer under conditions effective to selectively grow an oxide layer on the first material relative to the second material. The oxidizer oxidizes the first and second materials under the conditions. The reducer reduces oxidized second material under the conditions back to the second material. After selectively growing the oxide layer on the first material relative to the second material, partial pressure of the oxidizer and the reducer is reduced within the chamber by flowing an inert gas to the chamber while chamber pressure and chamber temperature are at or above those of the conditions during the exposing. Other aspects and implementations are contemplated.
摘要翻译：本发明包括选择性氧化方法和晶体管制造方法。在一个实施方案中，选择性氧化方法包括将衬底定位在室内。衬底具有第一和第二不同的可氧化材料。在有效地相对于第二材料选择性地生长第一材料上的氧化物层的条件下，将衬底暴露于包含氧化剂和还原剂的气体混合物。氧化剂在条件下氧化第一和第二种材料。还原剂在回到第二种材料的条件下还原氧化的第二种材料。在相对于第二材料选择性地生长第一材料上的氧化物层之后，通过使惰性气体流入室而在室内减少氧化剂和还原剂的分压，同时室压力和室温度等于或高于暴露条件。考虑了其他方面和实现。

10. 发明申请

US20060199395A1 TRANSISTOR FABRICATION METHODS 失效
标题翻译：晶体管制造方法
公开(公告)号：US20060199395A1
公开(公告)日：2006-09-07
申请号：US11386062
申请日：2006-03-20
申请人： Don Powell
发明人： Don Powell
IPC分类号： H01L21/31
CPC分类号： H01L21/28176 , H01L21/28044 , H01L21/324 , H01L29/4966 , H01L29/66575 , H01L29/78
摘要： A transistor gate is formed which comprises semiconductive material and conductive metal. Source/drain regions are formed proximate the transistor gate. In one implementation, the transistor gate and source/drain regions are exposed to a gas mixture comprising H2O, H2, a noble gas and N2 under conditions effective to oxidize outer surfaces of the source/drain regions. The N2 is present in the gas mixture at greater than 0% and less than or equal to 20.0% by volume. In one implementation, the. transistor gate and source/drain regions are exposed to a gas mixture comprising H2O, H2, and an inert gas under conditions effective to oxidize outer surfaces of the source/drain regions. The conditions comprise a pressure of greater than room ambient pressure. Other aspects and implementations are contemplated.
摘要翻译：形成了包括半导体材料和导电金属的晶体管栅极。源极/漏极区域形成在晶体管栅极附近。在一个实施方案中，晶体管栅极和源极/漏极区域暴露于包含H 2 O 2 H 2 H 2，H 2 N 2，惰性气体和N 2 O 2的气体混合物， / SUB>在有效氧化源极/漏极区域的外表面的条件下。 N 2 O 2以大于0％且小于或等于20.0体积％存在于气体混合物中。在一个实现中，晶体管栅极和源极/漏极区域在有效氧化源极/漏极区域的外表面的条件下暴露于包含H 2 O 2 H 2气体和惰性气体的气体混合物中，漏区。条件包括大于室内环境压力的压力。考虑了其他方面和实现。

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