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1. 发明授权

US5276888A Computer system with interrupts transparent to its operating system and application programs 失效
标题翻译：具有中断的计算机系统对其操作系统和应用程序是透明的
公开(公告)号：US5276888A
公开(公告)日：1994-01-04
申请号：US964788
申请日：1992-10-22
申请人： James Kardach , Gregory Mathews , Cau Nguyen , Sung S. Cho , Kameswaran Sivamani , David Vannier , Shing Wong , Edward Zager
发明人： James Kardach , Gregory Mathews , Cau Nguyen , Sung S. Cho , Kameswaran Sivamani , David Vannier , Shing Wong , Edward Zager
IPC分类号： G06F9/48 , G06F11/14 , G06F9/46 , G06F12/00
CPC分类号： G06F9/4812
摘要： A transparent system interrupt is invoked by the assertion of an electrical signal at an external pin of a microprocessor CPU chip. Upon assertion of this interrupt, the CPU begins program execution in a dedicated RAM area that is inaccessible both to the operating system and all application programs. A set of instructions, which may be unique to the system in which the CPU chip is installed, services the interrupt. Typically, the state of the CPU and associated components in the system immediately prior to assertion of the interrupt will be saved into the dedicated RAM area by the interrupt service routine. Recovery from the interrupt is accomplished upon recognition of an external event that invokes a RESUME instruction causing the CPU and associated components to be restored to exactly the same state that existed prior to the interrupt and in a manner entirely transparent to any program executing at the time of the interrupt.
摘要翻译：通过在微处理器CPU芯片的外部引脚处的电信号的断言来调用透明系统中断。一旦断言这个中断，CPU就会在专用的RAM区域开始程序的执行，这个操作系统和所有应用程序无法访问。一组指令，可能是安装了CPU芯片的系统所特有的，可以为中断提供服务。通常，中断服务程序之前立即断定中断的CPU和相关组件的状态将被保存到专用的RAM区域。从中断恢复是在识别到调用RESUME指令的外部事件时完成的，该指令使CPU和相关组件恢复到与中断之前存在的完全相同的状态，并且以对该时间执行的任何程序完全透明的方式的中断。

2. 发明授权

US5175853A Transparent system interrupt 失效
标题翻译：透明系统中断
公开(公告)号：US5175853A
公开(公告)日：1992-12-29
申请号：US787762
申请日：1991-11-06
申请人： James Kardach , Gregory Mathews , Cau Nguyen , Sung S. Cho , Kameswaran Sivamani , David Vannier , Shing Wong , Edward Zager
发明人： James Kardach , Gregory Mathews , Cau Nguyen , Sung S. Cho , Kameswaran Sivamani , David Vannier , Shing Wong , Edward Zager
IPC分类号： G06F9/48 , G06F11/14
CPC分类号： G06F9/4812
摘要： A transparent system interrupt is invoked by the assertion of an electrical signal at an external pin of a microprocessor CPU chip. Upon assertion of this interrupt, the CPU begins program execution in a dedicated RAM area that is inaccessible both to the operating system and all application programs. A set of instructions, which may be unique to the system in which the CPU chip is installed, services the interrupt. Typically, the state of the CPU and associated components in the system immediately prior to assertion of the interrupt will be saved into the dedicated RAM area by the interrupt service routine. Recovery from the interrupt is accomplished upon recognition of an external event that invokes a RESUME instruction causing the CPU and associated components to be restored to exactly the same state that existed prior to the interrupt and in a manner entirely transparent to any program executing at the time of the interrupt.
摘要翻译：通过在微处理器CPU芯片的外部引脚处的电信号的断言来调用透明系统中断。一旦断言这个中断，CPU就会在专用的RAM区域开始程序的执行，这个操作系统和所有应用程序无法访问。一组指令，可能是安装了CPU芯片的系统所特有的，可以为中断提供服务。通常，中断服务程序之前立即断定中断的CPU和相关组件的状态将被保存到专用的RAM区域。从中断恢复是在识别到调用RESUME指令的外部事件时完成的，该指令使CPU和相关组件恢复到与中断之前存在的完全相同的状态，并且以对该时间执行的任何程序完全透明的方式的中断。

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