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1. 发明授权

US5793796A Apparatus for use in equipment providing a digital radio link between a fixed and a mobile radio unit 失效
标题翻译：用于在固定和移动无线电单元之间提供数字无线电链路的设备中的装置
公开(公告)号：US5793796A
公开(公告)日：1998-08-11
申请号：US362483
申请日：1995-02-16
申请人： Anthony Peter Hulbert , David Peter Chandler
发明人： Anthony Peter Hulbert , David Peter Chandler
IPC分类号： H04L27/01 , H04B1/707 , H04B7/005 , H04B7/26
CPC分类号： H04B1/709 , H04B1/7115 , H04B1/7117
摘要： Conventional Rake receivers for spread spectrum signals are typically restricted in the number of multipath components they can usefully combine. The present apparatus for combines all the useful multipatlh components in a received signal with modest complexity. Digital correlators are provided over the multipath delay spread of the signal at predetermined intervals and their outputs are maximal ratio combined. With close to rectangular transmission received filters, almost all the entire signal energy can be recovered at the output of the combiner even though no attempt is made to accurately to align any of the correlators onto a specific multipath component.
摘要翻译： PCT No.PCT / GB94 / 00585 Sec。 371日期1995年2月16日 102（e）日期1995年2月16日PCT 1994年3月22日PCT公布。公开号WO94 / 28640 日期1994年12月8日用于扩频信号的常规耙式接收机通常限制在可以有效组合的多路径分量的数量。本装置用于将接收到的信号中的所有有用的多分量组件与适度的复杂性组合。数字相关器以预定间隔提供在信号的多径延迟扩展上，并且其输出是最大比率组合。利用接近矩形传输的接收滤波器，即使没有尝试精确地将任何相关器对准到特定的多路径分量上，几乎所有的整个信号能量都可以在组合器的输出端恢复。

2. 发明授权

US06330273B1 Apparatus for code tracking in a direct sequence spread spectrum receiver 失效
标题翻译：用于直接序列扩频接收机中的码跟踪的装置
公开(公告)号：US06330273B1
公开(公告)日：2001-12-11
申请号：US09155394
申请日：1999-08-23
申请人： Anthony Peter Hulbert , David Peter Chandler
发明人： Anthony Peter Hulbert , David Peter Chandler
IPC分类号： A61F206
CPC分类号： H04B1/7085 , H04B1/709
摘要： A direct sequence spread spectrum receiver includes correlators for handling prompt, late and early signals. An estimator is used to provide an estimate of the prompt signal and this used in a multiplication process with the late and early signals. The resultant signals are further processed to generate control signals.
摘要翻译：直接序列扩频接收机包括用于处理提示，迟发和早期信号的相关器。估计器用于提供对于晚期和早期信号的乘法过程中使用的提示信号的估计。所得到的信号被进一步处理以产生控制信号。

3. 发明授权

US5740208A Interference cancellation apparatus for mitigating the effects of poor affiliation between a base station and a mobile unit 失效
标题翻译：干扰消除装置，用于减轻基站与移动单元之间不良隶属关系的影响
公开(公告)号：US5740208A
公开(公告)日：1998-04-14
申请号：US695674
申请日：1996-08-08
申请人： Anthony Peter Hulbert , David Peter Chandler
发明人： Anthony Peter Hulbert , David Peter Chandler
IPC分类号： H04B7/02 , H04W36/18 , H04B1/10
CPC分类号： H04B7/022 , H04W36/18
摘要： The apparatus includes circuitry for determining which base station a mobile unit should be affiliated to for best reception, and circuitry for maintaining affiliation with the base station to which the mobile is currently connected. Cancellation circuitry is provided for cancelling the interference caused as a result of the mobile unit being affiliated to the base station giving non-optimum reception.
摘要翻译：该装置包括用于确定移动单元应该附属于哪个基站以获得最佳接收的电路，以及用于维持与移动台当前连接到的基站的归属的电路。提供取消电路用于消除由于移动单元隶属于给予非最佳接收的基站而导致的干扰。

4. 发明授权

US6104322A Apparatus for acquiring code phase lock in direct sequence spread spectrum systems 有权
标题翻译：用于在直接序列扩频系统中获取码相锁的装置
公开(公告)号：US6104322A
公开(公告)日：2000-08-15
申请号：US155393
申请日：1999-08-24
申请人： Anthony Peter Hulbert , David Peter Chandler
发明人： Anthony Peter Hulbert , David Peter Chandler
IPC分类号： H04B1/707 , H03M7/00
CPC分类号： H04B1/70757 , H04B1/7075 , H04B1/709
摘要： The apparatus receives an input signal via an antenna or cable 2, and the signal is applied to a frequency converter 4. Frequency converter generates complex I Q baseband signals which are applied to a respective correlator comprising a multiplier 6 and an accumulator 12 in respect of the inphase signal and the multiplier 8 and an accumulator 14 in respect of the quadrature phase signal. The output of the correlators are subjected to a modulus squaring function which comprises multipliers 16, 18 and an adder 20. The output of the adder 20 is applied to a store 22, and the inputs and outputs to the store are arranged to be added together in an adder 24, the output of which is compared in a comparator 26. The correlators and store are controlled by a controller 28 which is arranged to control the setting and resetting of the accumulators 12 and 14. For a fixed interval of time a local code generator is held constant, the output of which is applied to an input of the multiplier 6, 8, and at the start of the interval the accumulators 12, 14 are reset to zero and allowed to accumulate. At the end of the period the comparison is performed and thereafter the codes generated are shifted by one chip and the accumulators 12, 14 are set to zero and the output of the adder 20 is clocked into the storage means 22. This process is repeated until such time as the threshold values exceeded as determined by the comparator 26.
摘要翻译： PCT No.PCT / GB96 / 00745 Sec。 371日期1999年8月24日第 102（e）日期1999年8月24日PCT提交1996年3月28日PCT公布。公开号WO97 / 37436 日期1997年10月9日该装置通过天线或电缆2接收输入信号，并将信号施加到变频器4.变频器产生复合IQ基带信号，其被施加到包括乘法器6和累加器的相应相关器 12相对于同相信号和乘法器8以及积分器14相对于正交相位信号。相关器的输出经受包括乘法器16,18和加法器20的模数平方函数。加法器20的输出被施加到存储器22，并且将存储器的输入和输出设置成相加在一起在加法器24中，其输出在比较器26中进行比较。相关器和存储由控制器28控制，控制器28被布置成控制累加器12和14的设置和复位。在固定的时间间隔内，局部代码发生器保持恒定，其输出被施加到乘法器6,8的输入，并且在间隔开始时，累加器12,14被复位为零并被允许累加。在周期结束时，执行比较，此后产生的代码被移位一个码片，并且累加器12,14被设置为零并且加法器20的输出被计时到存储装置22中。该过程被重复直到超过由比较器26确定的阈值的时间。

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