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1. 发明授权

US5038366A Frequency multiplexed full duplex 4800 BPS modem 失效
标题翻译：频率复用全双工4800 BPS调制解调器
公开(公告)号：US5038366A
公开(公告)日：1991-08-06
申请号：US472367
申请日：1990-01-29
申请人： David M. Motley , John F. Stockman
发明人： David M. Motley , John F. Stockman
IPC分类号： H04L5/14
CPC分类号： H04L5/143
摘要： 4800 B/S full duplex operation of a frequency-multiplexing modem over the switched telephone network without cancellation is made possible by combining 900-baud, 32-state operation with a combination of analog filtering and raised cosine digital filtering and stop bit robbing.
摘要翻译：通过将900波特率，32态操作与模拟滤波和升余弦数字滤波和停止位抢占的组合相结合，可以实现通过交换电话网络进行频率复用调制解调器的4800 B / S全双工操作。

2. 发明授权

US4731800A Raised-cosine filtering for modems 失效
标题翻译：用于调制解调器的升余弦滤波
公开(公告)号：US4731800A
公开(公告)日：1988-03-15
申请号：US914886
申请日：1986-10-03
申请人： David M. Motley , John F. Stockman
发明人： David M. Motley , John F. Stockman
IPC分类号： H04L27/01 , H04B15/00 , H04L25/08
CPC分类号： H04L27/01
摘要： Filter quality is substantially improved (or complexity substantially reduced) in a digital PSK modem requiring an overall filter characteristic of the percent raised cosine type by using, in both the transmitter and the receiver, a filter having the same percent raised cosine response but at a higher cutoff frequency which satisfies the formula ##EQU1## where f.sub.f is the cutoff frequency (6 db) of the new filter, f.sub.o is one-half the baud rate of the modem, and .alpha. is the percent raised cosine expressed in decimal form.
摘要翻译：在数字PSK调制解调器中，通过在发射机和接收机中都使用具有相同百分比升余弦响应的滤波器，但是在一个更高的截止频率满足公式，其中ff是新滤波器的截止频率（6分贝），fo是调制解调器的波特率的一半，alpha是以十进制形式表示的升余弦百分比。

3. 发明授权

US3979685A Frequency shift key demodulator 失效
标题翻译：频移键解调器
公开(公告)号：US3979685A
公开(公告)日：1976-09-07
申请号：US506209
申请日：1974-09-16
申请人： David M. Motley , King Y. Cheng , Richard W. Middlestead
发明人： David M. Motley , King Y. Cheng , Richard W. Middlestead
IPC分类号： H04L27/156 , H03D3/00 , H04L27/14
CPC分类号： H04L27/1563
摘要： A demodulator for detecting first and second frequencies in an analog input signal includes a limiter providing first pulses having a short duration in response to the first frequency and having a long duration in response to the second frequency. A first counter provides a first reference signal including second pulses, and a second counter provides a second reference signal including third pulses. Logic means responsive to the second and third pulses provide a signal including fourth pulses during periods corresponding to the first frequency and a signal including fifth pulses during periods corresponding to the second frequency. An up-down counter is responsive to the fourth pulses to provide a first output signal and responsive to the fifth pulses to provide a second output signal. The fourth and fifth pulses have frequencies and durations providing the counter with substantially equal counting rates during the periods corresponding to the first and second frequencies of the analog signal.
摘要翻译：用于检测模拟输入信号中的第一和第二频率的解调器包括限制器，其响应于第一频率提供具有短持续时间的第一脉冲并响应于第二频率具有长持续时间。第一计数器提供包括第二脉冲的第一参考信号，并且第二计数器提供包括第三脉冲的第二参考信号。响应于第二和第三脉冲的逻辑装置在对应于第一频率的周期期间提供包括第四脉冲的信号，以及在对应于第二频率的周期期间包括第五脉冲的信号。升降计数器响应于第四脉冲以提供第一输出信号并且响应于第五脉冲以提供第二输出信号。第四和第五脉冲具有在对应于模拟信号的第一和第二频率的周期期间为计数器提供基本相等的计数率的频率和持续时间。

4. 发明授权

US4458355A Adaptive phase lock loop 失效
标题翻译：自适应锁相环
公开(公告)号：US4458355A
公开(公告)日：1984-07-03
申请号：US272707
申请日：1981-06-11
申请人： David M. Motley , Naif D. Salman
发明人： David M. Motley , Naif D. Salman
IPC分类号： H04L27/227 , H03G3/20 , H03L7/08 , H04L27/38 , H03K13/32
CPC分类号： H03G3/20 , H03L7/08
摘要： An apparatus for processing an information signal representative of information and containing phase error. The apparatus includes a detector for detecting the information in the signal and an error signal generator for generating an error signal representative of the error. A phase lock loop makes corrections which tend to reduce the phase error. The gain of the phase lock loop is adjusted in accordance with the error signal to optimize system performance.
摘要翻译：一种用于处理表示信息并包含相位误差的信息信号的装置。该装置包括用于检测信号中的信息的检测器和用于产生代表该误差的误差信号的误差信号发生器。锁相环进行校正，从而降低相位误差。根据误差信号调整锁相环的增益，以优化系统性能。

5. 发明授权

US4028626A Digital data receiver with automatic timing recovery and control 失效
标题翻译：数字数据接收机具有自动定时恢复和控制
公开(公告)号：US4028626A
公开(公告)日：1977-06-07
申请号：US561038
申请日：1975-03-24
申请人： David M. Motley , King Y. Cheng
发明人： David M. Motley , King Y. Cheng
IPC分类号： H04L7/033 , H04L27/01 , H04B1/10
CPC分类号： H04L27/01 , H04L7/0331
摘要： A data transmission system is provided with a double sideband suppressed carrier transmitter and receiver for transferring data between data processing apparatuses. The transmitter and receiver communicate over a telephone line which has physical characteristics which produce delay and attenuation distortion and phase jitter in the transmitted signal. The receiver includes a sampler for converting the transmitted signal into a digital signal, an automatic equalization network for correcting the delay and attenuation distortion, and a phase correction network compensating for frequency offset, phase offset, and phase jitter. The phase corrected and equalized signal is then detected and introduced to the data processing apparatus.An error signal calculator is responsive to the phase corrected signal and the detected signal to provide a system error signal for automatically updating the functions of the equalization and phase correction networks in accordance with the characteristics of the incoming signal. A timing control network which is also responsive to the system error signal, provides a timing error signal for correcting the sampling rate of the sampler.Filters in the transmitter and receiver provide the system with partial response signaling so the bandwidth of the system can be minimized, and even telephone lines of poor quality can accommodate a full duplex secondary channel for system control.
摘要翻译：数据传输系统具有双边带抑制载波发射机和接收机，用于在数据处理设备之间传输数据。发射机和接收机通过具有在发射信号中产生延迟和衰减失真和相位抖动的物理特性的电话线进行通信。接收机包括用于将发送的信号转换为数字信号的采样器，用于校正延迟和衰减失真的自动均衡网络，以及补偿频偏，相位偏移和相位抖动的相位校正网络。然后检测相位校正和均衡信号并将其引入数据处理装置。

6. 发明授权

US3943448A Apparatus and method for synchronizing a digital modem using a random multilevel data signal 失效
标题翻译：一种使用随机多电平数据信号同步数字调制解调器的装置和方法
公开(公告)号：US3943448A
公开(公告)日：1976-03-09
申请号：US504860
申请日：1974-09-11
申请人： David M. Motley , King Y. Cheng
发明人： David M. Motley , King Y. Cheng
IPC分类号： H04L27/22 , H03H17/00 , H03M5/20 , H04L7/00 , H04L25/49 , H04L27/06 , H04L27/38 , H03K9/00
CPC分类号： H04L27/066
摘要： An automatic digital modem receiving an input analog signal samples the input signal to provide a random multilevel data signal. This multilevel signal is equalized and phase corrected so that the characteristics of the modem are substantially synchronized with the characteristics of the input analog signal. A system error signal which is responsive to the random multilevel data signal is averaged to provide a synchronization quality signal. When the synchronization quality signal degrades to a predetermined magnitude, a restart signal adjusts the sampling, the equalization, and the phase correction of the modem to reduce the magnitude of the synchronization quality signal. The associated method includes the steps of adjusting only the phase correction of the modem for a particular interval of time and then jumping the sampling of the modem if the synchronization quality signal has not been reduced below the first predetermined magnitude.
摘要翻译：接收输入模拟信号的自动数字调制解调器对输入信号进行采样以提供随机多电平数据信号。该多电平信号被均衡和相位校正，使得调制解调器的特性基本上与输入模拟信号的特性同步。对随机多电平数据信号进行响应的系统误差信号被平均以提供同步质量信号。当同步质量信号降至预定幅度时，重启信号调整调制解调器的采样，均衡和相位校正，以减小同步质量信号的幅度。相关联的方法包括以下步骤：仅在特定时间间隔内仅调整调制解调器的相位校正，然后如果同步质量信号尚未降低到低于第一预定幅度，则跳转调制解调器的采样。

7. 发明授权

US3935535A Fast equalization acquisition for automatic adaptive digital modem 失效
标题翻译：自动适应数字调制解调器的快速均衡采集
公开(公告)号：US3935535A
公开(公告)日：1976-01-27
申请号：US504440
申请日：1974-09-09
申请人： David M. Motley , King Y. Cheng
发明人： David M. Motley , King Y. Cheng
IPC分类号： H04M11/06 , H03H15/00 , H03H17/00 , H03H21/00 , H04B3/06 , H04L25/03 , H04M11/00 , H04B1/10
CPC分类号： H04L25/03133
摘要： A transmitter transmits data through a communication channel to a receiver and the communication channel provides the data with delay and attenuation distortion. The receiver includes an equalization network having taps with multiplying coefficients for correcting the delay and attenuation distortion of the data. In response to a special sequence of the data, either specially generated by the transmitter or detected in random data, the receiver generates signals for updating the multiplying coefficients of the taps and these signals are introduced to the equalization network through a gate enabled by a special sequence detection network. This apparatus provides for the adjustment of the equalization taps in an extremely short period of time such as 5.83 milliseconds.
摘要翻译：发射机通过通信信道向接收机发送数据，通信信道为数据提供延迟和衰减失真。接收机包括具有用于校正数据的延迟和衰减失真的乘法系数的抽头的均衡网络。响应于数据的特殊序列，由发射机专门产生或以随机数据检测，接收机产生用于更新抽头的乘法系数的信号，并且这些信号通过特殊功能的门被引入均衡网络序列检测网络。该装置在非常短的时间段（例如5.83毫秒）中提供均衡抽头的调整。

8. 发明授权

US4726029A Error-correcting modem 失效
标题翻译：纠错调制解调器
公开(公告)号：US4726029A
公开(公告)日：1988-02-16
申请号：US774298
申请日：1985-09-10
申请人： David M. Motley , John F. Stockman
发明人： David M. Motley , John F. Stockman
IPC分类号： H03M13/00 , H03M13/25 , H04L1/00 , H04L7/04 , H04L27/22 , H04L27/34 , G08C25/00
CPC分类号： H04L1/0059 , H03M13/25 , H04L27/3433 , H04L7/048
摘要： Error multiplication in the differential decoder and descrambler of V.22 bis modems is avoided by replacing the differential coding with forward error correction and single symbol coding. The error syndrome bit of the error corrector is used in establishing phase and timing synchronization by causing the receiver to try all possible combinations of phase and timing, and to lock onto the combination which produces a minimum of error syndrome bits. The descrambler receives the error-free corrected bit stream, whereby the descrambler's inherent error multiplication becomes moot.
摘要翻译：通过用前向纠错和单符号编码代替差分编码，避免了V.22双调制解调器的差分解码器和解扰器中的误差乘法。错误校正器的误差校正位用于通过使接收机尝试相位和定时的所有可能组合来建立相位和定时同步，并锁定到产生最小误差校正位的组合上。解扰器接收无错误的校正比特流，由此解扰器的固有误差乘法变得不成立。

9. 发明授权

US4597089A Single pulse fast learn modem 失效
标题翻译：单脉冲快速学习调制解调器
公开(公告)号：US4597089A
公开(公告)日：1986-06-24
申请号：US512332
申请日：1983-07-11
申请人： David M. Motley , Andrew Kameya
发明人： David M. Motley , Andrew Kameya
IPC分类号： H04L7/02 , H04L7/04 , H04L25/03 , H04L27/06 , H04B3/04
CPC分类号： H04L7/007 , H04L25/03133 , H04L25/03146 , H04L27/066 , H04L7/044
摘要： A fast learn modem comprising a transmitter for generating a fast learn preamble and applying the preamble to a communication channel and a receiver for receiving the fast learn preamble from the communication channel. The fast learn preamble includes a single impulse and the timing, phase and equalization characteristics of the receiver are adjusted in response to the single impulse so that the receiver can receive and process data.
摘要翻译：一种快速学习调制解调器，包括用于生成快速学习前导码并将前导码应用于通信信道的发射机和用于从通信信道接收快速学习前导码的接收机。快速学习前导码包括单个脉冲，并且响应于单个脉冲调整接收机的定时，相位和均衡特性，使得接收机可以接收和处理数据。

10. 发明授权

US3988539A Data transmission system using optimal eight-vector signaling scheme 失效
标题翻译：数据传输系统采用最优八向量信令方案
公开(公告)号：US3988539A
公开(公告)日：1976-10-26
申请号：US506208
申请日：1974-09-16
申请人： David M. Motley , King Y. Cheng
发明人： David M. Motley , King Y. Cheng
IPC分类号： H04L27/34 , H04L27/18
CPC分类号： H04L27/3405
摘要： In a system for transmitting information between first and second data processing apparatuses, a signaling scheme provides a digital data signal with in-phase components and quadrature components which define a plurality of vectors. The vectors, when plotted on a graph having an abscissa and an ordinate, each have a minimum separation distance defined by the radius of a circle having its center at the tip of the associated vector. The circles of the vectors, which are aligned in rows substantially parallel to the abscissa or the ordinate of the graph, are tangential to the adjacent circles. Boundary areas associated with the respective vectors are defined by boundary lines extensions of which pass through points defined by the vector components. This signaling scheme minimizes vector magnitude, associated with minimum power, while maximizing vector separation distance, associated with reduced detection error.
摘要翻译：在用于在第一和第二数据处理装置之间发送信息的系统中，信令方案为数字数据信号提供定义多个向量的同相分量和正交分量。当在具有横坐标和纵坐标的曲线图上绘制时，矢量各自具有由其在相关联矢量的尖端处的中心的圆的半径限定的最小间隔距离。以基本上平行于横坐标或曲线图的纵坐标的行对齐的向量的圆与相邻圆相切。与各向量相关联的边界区域由其通过由矢量分量定义的点的边界线延伸来定义。该信令方案使与最小功率相关联的矢量幅度最小化，同时最大化矢量分离距离，与减少的检测误差相关联。

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