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1. 发明专利

GB140108A Electrically-driven gramophones 未知
公开(公告)号：GB140108A
公开(公告)日：1920-03-25
申请号：GB1237317
申请日：1917-08-29
申请人： DAVID BRANSON
IPC分类号： G11B19/28
摘要： 140,108. Branson, D. Aug. 29, 1917. Supplying low-voltage apparatus from highvoltago mains.-The voltage supplied to a motor for driving a gramophone is reduced by connecting in series therewith one or more lamps designed for the same voltage as the supply, and to consume the same watts as the motor. In the example described, the motor 1 is designed for 100 volts 1 ampere, and if the motor is connected to 250-volt mains, the lamps should be designed for 250 volts, and to consume 100 watts. The lamp-holders 5 are of the ordinary type., and are connected in parallel with each other.

2. 发明授权

US07112937B1 Device and method for driving a motor 有权
标题翻译：用于驱动电机的装置和方法
公开(公告)号：US07112937B1
公开(公告)日：2006-09-26
申请号：US11263323
申请日：2005-10-31
申请人： Steve P. Stemple , Paul D. Bliley , David Branson
发明人： Steve P. Stemple , Paul D. Bliley , David Branson
IPC分类号： H02P7/29
CPC分类号： H02P7/29 , H02P7/04
摘要： A motor control device having memory for storing data indicative of a control mode and a pulse width modulation (PWM) value and logic that applies the pulse width modulation value to a voltage provided to a motor if the data indicative of the control mode indicates voltage mode. The logic further controls the voltage applied to the motor based upon a motor set point value representative of the data indicative of the pulse width modulation value when the data indicative of the control mode indicates current mode.
摘要翻译：一种电动机控制装置，具有存储器，用于存储表示控制模式的数据和脉冲宽度调制（PWM）值和逻辑，如果表示控制模式的数据表示电压模式，则将脉宽调制值应用于提供给电动机的电压。当指示控制模式的数据指示当前模式时，逻辑还基于表示表示脉宽调制值的数据的电动机设定点值，控制施加到电动机的电压。

3. 发明授权

US09171344B2 Methods, systems, and devices for managing medical images and records 有权
标题翻译：用于管理医学图像和记录的方法，系统和设备
公开(公告)号：US09171344B2
公开(公告)日：2015-10-27
申请号：US13560934
申请日：2012-07-27
申请人： Jeffrey N. Yu , David Branson
发明人： Jeffrey N. Yu , David Branson
IPC分类号： G06Q10/00 , G06Q50/00 , G06Q50/24 , G06F21/31 , G06Q10/06 , G06Q10/10 , G06Q50/22
CPC分类号： G06F19/321 , G06F19/00 , G06F21/31 , G06Q10/06 , G06Q10/10 , G06Q50/22 , G06Q50/24 , G16H10/60 , H04L63/06 , H04L63/08 , H04L63/10 , H04L67/42
摘要： The disclosure herein provides methods, systems, and devices for managing, transferring, modifying, converting and/or tracking medical files and/or medical system messages. In certain embodiments, the foregoing may generally be based on requesting medical files at a first medical facility, identifying the requested medical files at a second medical facility, initiating a secure network connection between the first and second medical facility, modifying a header portion of the medical files based on patient identification information created by the first medical facility, and other processing steps.
摘要翻译：本文的公开内容提供了用于管理，转移，修改，转换和/或跟踪医疗文件和/或医疗系统消息的方法，系统和设备。在某些实施例中，前述可以通常基于在第一医疗设施处请求医疗文件，在第二医疗设施处识别所请求的医疗文件，发起第一和第二医疗设施之间的安全网络连接，修改第基于由第一医疗机构创建的患者识别信息的医疗文件和其他处理步骤。

4. 发明申请

US20130060579A1 METHODS, SYSTEMS, AND DEVICES FOR MANAGING MEDICAL IMAGES AND RECORDS 有权
公开(公告)号：US20130060579A1
公开(公告)日：2013-03-07
申请号：US13560934
申请日：2012-07-27
申请人： Jeffrey N. Yu , David Branson
发明人： Jeffrey N. Yu , David Branson
IPC分类号： G06Q50/24
CPC分类号： G06F19/321 , G06F19/00 , G06F21/31 , G06Q10/06 , G06Q10/10 , G06Q50/22 , G06Q50/24 , G16H10/60 , H04L63/06 , H04L63/08 , H04L63/10 , H04L67/42
摘要： The disclosure herein provides methods, systems, and devices for managing, transferring, modifying, converting and/or tracking medical files and/or medical system messages. In certain embodiments, the foregoing may generally be based on requesting medical files at a first medical facility, identifying the requested medical files at a second medical facility, initiating a secure network connection between the first and second medical facility, modifying a header portion of the medical files based on patient identification information created by the first medical facility, and other processing steps.

5. 发明申请

US20070098387A1 Systems and methods of generating Z-Buffers in cameras 有权
标题翻译：在相机中生成Z-Buffers的系统和方法
公开(公告)号：US20070098387A1
公开(公告)日：2007-05-03
申请号：US11261109
申请日：2005-10-28
申请人： Richard Turley , David Branson , Andrew Goris , David Lawson , Donald Stavely
发明人： Richard Turley , David Branson , Andrew Goris , David Lawson , Donald Stavely
IPC分类号： G03B13/00
CPC分类号： H04N5/2256 , H04N5/2226 , H04N5/2353
摘要： Systems and methods for implementing Z-buffer generation in a camera are disclosed. In an exemplary embodiment the method may comprise actuating a light sensor after various delays to receive a plurality of modulated light signals reflected from different regions of a scene adjacent a camera. The method may also include determining distance information for the different regions of the scene based on brightness values for the plurality of modulated light signals reflected from the scene for the various delays. The method may also include storing the distance information in a Z-buffer at the camera.
摘要翻译：公开了在相机中实现Z缓冲器生成的系统和方法。在一个示例性实施例中，该方法可以包括在各种延迟之后致动光传感器以接收从邻近相机的场景的不同区域反射的多个调制光信号。该方法还可以包括基于针对各种延迟从场景反射的多个调制光信号的亮度值来确定场景的不同区域的距离信息。该方法还可以包括将距离信息存储在相机的Z缓冲器中。

6. 发明授权

US07983548B2 Systems and methods of generating Z-buffers in cameras 有权
标题翻译：在相机中生成Z缓冲器的系统和方法
公开(公告)号：US07983548B2
公开(公告)日：2011-07-19
申请号：US11261109
申请日：2005-10-28
申请人： Richard Turley , David Branson , Andrew C. Goris , David R. Lawson , Donald J. Stavely
发明人： Richard Turley , David Branson , Andrew C. Goris , David R. Lawson , Donald J. Stavely
IPC分类号： G03B15/03
CPC分类号： H04N5/2256 , H04N5/2226 , H04N5/2353
摘要： Systems and methods for implementing Z-buffer generation in a camera are disclosed. In an exemplary embodiment the method may comprise actuating a light sensor after various delays to receive a plurality of modulated light signals reflected from different regions of a scene adjacent a camera. The method may also include determining distance information for the different regions of the scene based on brightness values for the plurality of modulated light signals reflected from the scene for the various delays. The method may also include storing the distance information in a Z-buffer at the camera.
摘要翻译：公开了在相机中实现Z缓冲器生成的系统和方法。在一个示例性实施例中，该方法可以包括在各种延迟之后致动光传感器以接收从邻近相机的场景的不同区域反射的多个调制光信号。该方法还可以包括基于针对各种延迟从场景反射的多个调制光信号的亮度值来确定场景的不同区域的距离信息。该方法还可以包括将距离信息存储在相机的Z缓冲器中。

7. 发明申请

US20070098388A1 Systems and methods of generating Z-buffers for an image capture device of a camera 有权
标题翻译：为相机的图像捕获设备生成Z缓冲器的系统和方法
公开(公告)号：US20070098388A1
公开(公告)日：2007-05-03
申请号：US11261276
申请日：2005-10-28
申请人： Richard Turley , Andrew Goris , David Branson , David Lawson , Donald Stavely , David Campbell
发明人： Richard Turley , Andrew Goris , David Branson , David Lawson , Donald Stavely , David Campbell
IPC分类号： G03B13/00
CPC分类号： H04N5/2256 , G03B15/00 , H04N5/2226 , H04N5/2353
摘要： Systems and methods for implementing Z-buffer generation in a camera are disclosed. In an exemplary embodiment the method may comprise exposing a plurality of pixels on an image capture device to a modulated light signal reflected from different regions of a scene adjacent a camera after different delays. The method may also comprise correlating intensity of the modulated light signal received by the image capture device for each the different delays to determine a flight time of the modulated light signal. The method may also comprise generating a Z-buffer corresponding to the different regions of the scene based on the correlation.
摘要翻译：公开了在相机中实现Z缓冲器生成的系统和方法。在示例性实施例中，该方法可以包括将图像捕获装置上的多个像素暴露于在不同延迟之后从邻近相机的场景的不同区域反射的调制光信号。该方法还可以包括对由每个不同延迟对图像捕获装置接收的调制光信号的强度进行相关，以确定调制光信号的飞行时间。该方法还可以包括基于相关性来生成对应于场景的不同区域的Z缓冲器。

8. 发明授权

US5668972A Method and system for efficient miss sequence cache line allocation utilizing an allocation control cell state to enable a selected match line 失效
标题翻译：用于利用分配控制单元状态来启用所选择的匹配行的有效未命中序列高速缓存行分配的方法和系统
公开(公告)号：US5668972A
公开(公告)日：1997-09-16
申请号：US319202
申请日：1994-10-05
申请人： Peichun Peter Liu , Brian David Branson
发明人： Peichun Peter Liu , Brian David Branson
IPC分类号： G06F12/08 , G06F12/12
CPC分类号： G06F12/0893 , G06F12/123
摘要： A data cache array which includes a plurality of cache lines wherein each cache line includes a selected block of data, a parity field, a content addressable field containing at least a portion of an address for that block of information and a data status field for providing an indication of data validity within that cache line. An allocation control cell is associated with each cache line and a pseudo least recently utilized (PLRU) logic circuit is provided within the data cache array for each group of cache lines. The pseudo least recently utilized (PLRU) logic circuit is then utilized to select and set a particular allocation control cell within each group of cache lines in response to utilization of those cache lines. The cache line allocation process is then utilized to select a particular cache line within a group of cache lines for replacement in response to either an indication of invalidity of the block of information within that cache line or in response to the state of the pseudo least recently utilized (PLRU) logic circuit for that group of cache lines, if the block of information within every cache line within the group is indicated as valid.
摘要翻译：一种数据高速缓存阵列，其包括多条高速缓存行，其中每条高速缓存行包括所选择的数据块，奇偶校验字段，内容可寻址字段，其包含用于该信息块的地址的至少一部分，以及数据状态字段，用于提供该缓存行内的数据有效性的指示。分配控制单元与每个高速缓存行相关联，并且在数据高速缓存阵列内为每组高速缓存行提供伪最近最少利用的（PLRU）逻辑电路。然后利用伪最近最少使用的（PLRU）逻辑电路来响应于这些高速缓存行的使用来选择并设置每组高速缓存行内的特定分配控制单元。然后，高速缓存行分配过程用于响应于该高速缓存行内的信息块的无效指示或响应于伪最近的状态来选择一组高速缓存行中的特定高速缓存行进行替换如果组内的每个高速缓存行内的信息块被表示为有效，则对该组高速缓存行使用（PLRU）逻辑电路。

9. 发明授权

US08054021B2 Programmable motor drive 有权
标题翻译：可编程电机驱动
公开(公告)号：US08054021B2
公开(公告)日：2011-11-08
申请号：US12255028
申请日：2008-10-21
申请人： Paul D. Bliley , Steve P. Stemple , David Branson
发明人： Paul D. Bliley , Steve P. Stemple , David Branson
IPC分类号： H02P6/00
CPC分类号： H02P7/29
摘要： A system comprises host logic and a programmable motor drive coupled to the host logic and configured to drive a motor. The programmable motor drive comprises a plurality of H-bridge circuits and the programmable motor drive is programmable to cause any two or more H-bridge circuits to be operated in parallel.
摘要翻译：系统包括主机逻辑和耦合到主机逻辑并被配置为驱动电动机的可编程电机驱动器。可编程电动机驱动器包括多个H桥电路，并且可编程电动机驱动器可编程以使任何两个或更多个H桥电路并联操作。

10. 发明授权

US5890221A Method and system for offset miss sequence handling in a data cache array having multiple content addressable field per cache line utilizing an MRU bit 失效
标题翻译：利用MRU位，每个高速缓存线具有多个内容可寻址字段的数据高速缓存阵列中的偏移未命中序列处理方法和系统
公开(公告)号：US5890221A
公开(公告)日：1999-03-30
申请号：US319201
申请日：1994-10-05
申请人： Peichun Peter Liu , Brian David Branson
发明人： Peichun Peter Liu , Brian David Branson
IPC分类号： G06F12/10 , G06F12/08
CPC分类号： G06F12/1045
摘要： An interleaved data cache array which is divided into two sub arrays is provided for utilization within a data processing system. Each subarray includes a plurality of cache lines wherein each cache line includes a selected block of data, a parity field, a first content addressable field containing a portion of an effective address for the selected block of data, a second content addressable field contains a portion of the real address for the selected block of data and a data status field. By utilizing two separate content addresssable fields for the effective address and real address offset and alias problems may be efficiently resolved. A virtual address aliasing condition is identified by searching each cache line for a match between a portion of a desired effective address and the content of the first content addressable field. The desired effective address is translated into a desired real address and a portion of the desired real address is then utilized to search each cache line for a match with the content of the second content addressable field if no match was found within the first content addressable field during the previous cycle. An offset condition is identified by comparing the translated real address to the content of the second content addressable field in a cache line when a match has occurred between the desired effective address and the content of the first content addressable field within that cache line.
摘要翻译：提供分割成两个子阵列的交错数据高速缓存阵列用于数据处理系统内的利用。每个子阵列包括多条高速缓存线，其中每条高速缓存线包括所选择的数据块，奇偶校验字段，包含所选择的数据块的有效地址的一部分的第一内容可寻址字段，第二内容可寻址字段包含部分的所选数据块的真实地址和数据状态字段。通过利用两个单独的内容可寻址字段来实现有效地址和实际地址偏移，并且可以有效地解决别名问题。通过搜索每个高速缓存行来确定虚拟地址混叠条件，以获得期望的有效地址的一部分与第一内容可寻址字段的内容之间的匹配。将期望的有效地址转换成所需的实际地址，然后如果在第一内容可寻址字段内没有找到匹配，则利用所需实际地址的一部分来搜索每个高速缓存线与第二内容可寻址字段的内容的匹配在上一个周期。当在期望的有效地址与该高速缓存行内的第一内容可寻址字段的内容之间发生匹配时，通过比较翻译的实际地址与高速缓存行中的第二内容可寻址字段的内容来识别偏移条件。

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