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1. 发明授权

US07107551B1 Optimization of circuit designs using a continuous spectrum of library cells 有权
标题翻译：使用连续光谱库细胞优化电路设计
公开(公告)号：US07107551B1
公开(公告)日：2006-09-12
申请号：US10447396
申请日：2003-05-30
申请人： Paul de Dood , Brian Lee , Daniel Albers
发明人： Paul de Dood , Brian Lee , Daniel Albers
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F2217/08
摘要： A method and apparatus for optimizing a circuit design using a library of cells in which a continuous spectrum of cells are provided. A library containing real and virtual cells is used so that cells can be selected across a wide spectrum of a design parameter, such as drive strength. The cells are provided in discrete steps small enough that the effect of having a continuous spectrum of cells is achieved. After optimization, only the cells finally selected need be actually synthesized, and when these constitute a small percentage of the total number of cells, the impact to library size and final placement and routing is minimized. Thus the ability to optimize across a continuous spectrum is achieved while preserving a cell library based design flow.
摘要翻译：一种用于使用其中提供有连续细胞谱的单元库优化电路设计的方法和装置。使用包含真实和虚拟单元格的库，以便可以在设计参数的广泛范围（如驱动强度）中选择单元格。以足够小的离散步骤提供细胞，以实现具有细胞连续光谱的效果。优化后，只有最终选择的单元需要实际合成，当这些单元构成单元总数的一小部分时，对库大小和最终布局和路由的影响最小化。因此，在保持基于细胞库的设计流程的同时，实现了连续光谱优化的能力。

2. 发明授权

US07594203B2 Parallel optimization using independent cell instances 有权
标题翻译：使用独立单元实例的并行优化
公开(公告)号：US07594203B2
公开(公告)日：2009-09-22
申请号：US11657367
申请日：2007-01-24
申请人： Paul de Dood , Brian Lee , Daniel Albers
发明人： Paul de Dood , Brian Lee , Daniel Albers
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： The present invention provides a method for parallel optimization of an integrated circuit design based on the use of sets of cell instances that are independent from each other. Multiple changes to a design are analyzed in parallel by ensuring that no two cell instances that are being changed are in the same fan-in and fan-out cones. This property allows full timing analysis to be performed on a design such that multiple alternatives are explored in parallel and accurate results are obtained. By ordering the choice of cell instances to change and by ordering the alternatives to try, a greater degree of optimization is found earlier in the process.
摘要翻译：本发明提供了一种基于使用彼此独立的小区实例的集合来并行优化集成电路设计的方法。通过确保没有两个更改的单元格实例位于相同的扇出和扇出锥中，并行分析设计的多项更改。该属性允许在设计上执行完整的时序分析，使得并行探索多个替代方案并获得准确的结果。通过排序选择要更改的单元格实例，并通过对替代方法进行排序，在此过程中可以更早地找到较大程度的优化。

3. 发明申请

US20060259880A1 Optimization of circuit designs using a continuous spectrum of library cells 有权
公开(公告)号：US20060259880A1
公开(公告)日：2006-11-16
申请号：US11490362
申请日：2006-07-20
申请人： Paul Dood , Brian Lee , Daniel Albers
发明人： Paul Dood , Brian Lee , Daniel Albers
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F2217/08
摘要： The present invention comprises a method of optimizing a circuit design having a plurality of library cells. In one embodiment, the method includes the steps of providing a plurality of logically equivalent cells that vary in at least one design parameter, the plurality of logically equivalent cells having a relatively continuous spectrum of values of one of the design parameters, evaluating a selected characteristic of the circuit design; and replacing a cell in the circuit design with a cell an equivalent cell.

4. 发明授权

US07594202B2 Optimization of circuit designs using a continuous spectrum of library cells 有权
标题翻译：使用连续光谱库细胞优化电路设计
公开(公告)号：US07594202B2
公开(公告)日：2009-09-22
申请号：US11490362
申请日：2006-07-20
申请人： Paul de Dood , Brian Lee , Daniel Albers
发明人： Paul de Dood , Brian Lee , Daniel Albers
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F2217/08
摘要： The present invention comprises a method of optimizing a circuit design having a plurality of library cells. In one embodiment, the method includes the steps of providing a plurality of logically equivalent cells that vary in at least one design parameter, the plurality of logically equivalent cells having a relatively continuous spectrum of values of one of the design parameters, evaluating a selected characteristic of the circuit design; and replacing a cell in the circuit design with a cell an equivalent cell.
摘要翻译：本发明包括一种优化具有多个库单元的电路设计的方法。在一个实施例中，该方法包括以下步骤：提供在至少一个设计参数中变化的多个逻辑上等效的单元，所述多个逻辑上等效的单元具有设计参数之一的相对连续的频谱谱，评估所选择的特性的电路设计; 并用电池等效电池替代电路设计中的电池。

5. 发明申请

US20080178128A1 Parallel optimization using independent cell instances 有权
标题翻译：使用独立单元实例的并行优化
公开(公告)号：US20080178128A1
公开(公告)日：2008-07-24
申请号：US11657367
申请日：2007-01-24
申请人： Paul de Dood , Brian Lee , Daniel Albers
发明人： Paul de Dood , Brian Lee , Daniel Albers
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： The present invention provides a method for parallel optimization of an integrated circuit design based on the use of sets of cell instances that are independent from each other. Multiple changes to a design are analyzed in parallel by ensuring that no two cell instances that are being changed are in the same fan-in and fan-out cones. This property allows full timing analysis to be performed on a design such that multiple alternatives are explored in parallel and accurate results are obtained. By ordering the choice of cell instances to change and by ordering the alternatives to try, a greater degree of optimization is found earlier in the process.
摘要翻译：本发明提供了一种基于使用彼此独立的小区实例的集合来并行优化集成电路设计的方法。通过确保没有两个更改的单元格实例位于相同的扇出和扇出锥中，并行分析设计的多项更改。该属性允许在设计上执行完整的时序分析，使得并行探索多个替代方案并获得准确的结果。通过排序选择要更改的单元格实例，并通过对替代方法进行排序，在此过程中可以更早地找到较大程度的优化。

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