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1. 发明授权

US07881129B2 High voltage regulator for non-volatile memory device 有权
标题翻译：用于非易失性存储器件的高压稳压器
公开(公告)号：US07881129B2
公开(公告)日：2011-02-01
申请号：US12010247
申请日：2008-01-23
申请人： Sang-kug Park , Dae-han Kim
发明人： Sang-kug Park , Dae-han Kim
IPC分类号： G11C5/14
CPC分类号： G11C16/12 , G11C5/145 , G11C11/5628 , G11C16/30 , G11C16/3454
摘要： A high voltage regulator may include a first regulating unit, a second regulating unit, and an output node. The first regulating unit regulates the program voltage in a voltage-level-up interval of a program voltage of a memory cell. The second regulating unit regulates the program voltage in a voltage-level-down interval of the program voltage. The output node outputs the regulated program voltage.
摘要翻译：高压调节器可以包括第一调节单元，第二调节单元和输出节点。第一调节单元在存储器单元的编程电压的电压升高间隔中调节编程电压。第二调节单元在编程电压的电压降低间隔中调节编程电压。输出节点输出调节编程电压。

2. 发明授权

US07738309B2 Semiconductor memory device having fuse circuits and method of controlling the same 有权
标题翻译：具有熔丝电路的半导体存储器件及其控制方法
公开(公告)号：US07738309B2
公开(公告)日：2010-06-15
申请号：US11946359
申请日：2007-11-28
申请人： Hong-Soo Jeon , Dae-Han Kim
发明人： Hong-Soo Jeon , Dae-Han Kim
IPC分类号： G11C17/18
CPC分类号： G11C16/28
摘要： A non-volatile semiconductor memory device includes a read voltage generating circuit, a flash cell fuse circuit and a row decoder. The read voltage generating circuit generates a read voltage in response to a read enable signal and a trim code. The flash cell fuse circuit generates the trim code in response to a cell selection signal and a fuse word-line enable signal, the fuse word-line enable signal being activated after the read enable signal by a first delay time. The row decoder decodes the read voltage in response to a row address signal to generate a decoded read voltage, and to provide the decoded read voltage to a memory cell array.
摘要翻译：非易失性半导体存储器件包括读电压产生电路，闪存单元熔丝电路和行解码器。读取电压产生电路响应于读取使能信号和修剪码产生读取电压。闪存单元熔丝电路响应于单元选择信号和熔丝字线使能信号而生成修整代码，保险丝字线使能信号在读使能信号之后被激活第一延迟时间。行解码器响应于行地址信号解码读取电压以产生解码的读取电压，并将解码的读取电压提供给存储器单元阵列。

3. 发明申请

US20090251961A1 FLASH MEMORY DEVICE AND VOLTAGE GENERATING CIRCUIT FOR THE SAME 失效
标题翻译：闪存存储器件及其电压发生电路
公开(公告)号：US20090251961A1
公开(公告)日：2009-10-08
申请号：US12401784
申请日：2009-03-11
申请人： Sang-Wan NAM , Dae-Han KIM
发明人： Sang-Wan NAM , Dae-Han KIM
IPC分类号： G11C16/06 , G11C7/00 , G05F1/10
CPC分类号： G11C16/30 , G11C5/145
摘要： Disclosed is a flash memory device which includes a memory core, a high voltage generating circuit and a reference voltage generating circuit. The high voltage generating circuit is configured to generate a high voltage to be supplied to the memory core. The reference voltage generating circuit is configured to generate at least one reference voltage to be supplied to the high voltage generating circuit. The reference voltage generating circuit includes a first reference voltage generator configured to generate a first reference voltage in response to a supply voltage, and a second reference voltage generator configured to generate a second reference voltage in response to the first reference voltage. The at least one reference voltage supplied to the high voltage generating circuit includes the second reference voltage.
摘要翻译：公开了一种闪速存储器件，其包括存储器芯，高电压产生电路和参考电压产生电路。高电压产生电路被配置为产生要提供给存储器芯的高电压。参考电压产生电路被配置为产生要提供给高电压发生电路的至少一个参考电压。参考电压产生电路包括被配置为响应于电源电压产生第一参考电压的第一参考电压发生器和被配置为响应于第一参考电压产生第二参考电压的第二参考电压发生器。提供给高电压产生电路的至少一个参考电压包括第二参考电压。

4. 发明授权

US07486573B2 Flash memory device and voltage generating circuit for the same 有权
标题翻译：闪存器件和电压发生电路相同
公开(公告)号：US07486573B2
公开(公告)日：2009-02-03
申请号：US11520803
申请日：2006-09-14
申请人： Hong-Soo Jeon , Dae-Han Kim
发明人： Hong-Soo Jeon , Dae-Han Kim
IPC分类号： G11C5/14
CPC分类号： G11C16/30 , G11C11/5642
摘要： A flash memory device may include a memory cell array. The memory cell array may include a plurality of memory cells. The flash memory device may also include a voltage generator which generates a plurality of constant voltages. The voltage generator may comprise of a plurality of voltage regulators, wherein each voltage regulator is configured to divide a high voltage generated from a charge pump to generate at least two constant voltages having a constant voltage difference therebetween. The plurality of voltage regulators may have independent voltage dividing paths, wherein each path is configured to generate a separate constant voltage.
摘要翻译：闪存器件可以包括存储器单元阵列。存储单元阵列可以包括多个存储单元。闪存器件还可以包括产生多个恒定电压的电压发生器。电压发生器可以包括多个电压调节器，其中每个电压调节器被配置为分离从电荷泵产生的高电压以产生其间具有恒定电压差的至少两个恒定电压。多个电压调节器可以具有独立的分压路径，其中每个路径被配置为产生单独的恒定电压。

5. 发明申请

US20080151635A1 Semiconductor memory devices and a method thereof 有权
标题翻译：半导体存储器件及其方法
公开(公告)号：US20080151635A1
公开(公告)日：2008-06-26
申请号：US11892461
申请日：2007-08-23
申请人： Sang-Kug Park , Dae-Han Kim
发明人： Sang-Kug Park , Dae-Han Kim
IPC分类号： G11C16/06
CPC分类号： G11C16/28 , G11C7/08 , G11C7/14
摘要： Semiconductor memory devices and a method thereof are provided. An example semiconductor memory device may include a control signal generation unit configured to generate a plurality of control signals in response to a bias current, a reference current generation unit configured to generate a reference current in response to the plurality of control signals and a sense amplifier configured to sense and amplify data stored in a given memory cell based on the reference current and a current on a bit line connected to the memory cell. Another example semiconductor memory device may include a memory bank including a plurality of memory cells and a sense amplifier bank including a plurality of sense amplifier units sharing a common line, each of the sense amplifier units including a current source configured to form a current path between the common line and a first voltage supply in response to an enable signal and a gating signal and a sense amplifier configured to sense and amplify data stored in a corresponding memory cell among the plurality of memory cells based on a signal on a bit line connected with the corresponding memory cell and a signal on the common line.
摘要翻译：提供半导体存储器件及其方法。示例性半导体存储器件可以包括：控制信号生成单元，被配置为响应于偏置电流产生多个控制信号;参考电流产生单元，被配置为响应于所述多个控制信号产生参考电流;以及读出放大器被配置为基于所述参考电流和连接到所述存储器单元的位线上的电流来感测和放大存储在给定存储器单元中的数据。另一示例性半导体存储器件可以包括存储器组，其包括多个存储器单元和包括共享公共线的多个读出放大器单元的读出放大器组，每个读出放大器单元包括被配置为形成电流源所述公共线路和第一电压电源响应于使能信号和门控信号，以及读出放大器，被配置为基于与所述多个存储器单元中的位线相关联的信号来感测和放大存储在所述多个存储器单元中的相应存储器单元中的数据相应的存储单元和公共线上的信号。

6. 发明申请

US20080150499A1 VOLTAGE REGULATOR FOR USE IN NONVOLATILE SEMICONDUCTOR MEMORY 有权
标题翻译：用于非线性半导体存储器的电压调节器
公开(公告)号：US20080150499A1
公开(公告)日：2008-06-26
申请号：US11844508
申请日：2007-08-24
申请人： Sang-Kug PARK , Dae-Han KIM
发明人： Sang-Kug PARK , Dae-Han KIM
IPC分类号： G05F1/44 , G05F1/00
CPC分类号： G11C16/30 , G11C5/147
摘要： The invention relates to a voltage regulator for operation of a semiconductor memory device. In embodiments, the voltage regulator includes a standby regulator unit and an active regulating unit. Embodiments of the invention decouple the operation of the standby regulating unit and the active regulating unit of a voltage regulator so that both can operate simultaneously, for example during a read operation. In embodiments of the invention, the standby regulating unit includes a short pulse generator and a feedback loop to disable the standby regulating unit for a predetermined amount of time.
摘要翻译：本发明涉及用于半导体存储器件操作的电压调节器。在实施例中，电压调节器包括备用调节器单元和主动调节单元。本发明的实施例解除了电压调节器的待机调节单元和有源调节单元的操作，使得两者可以同时操作，例如在读取操作期间。在本发明的实施例中，待机调节单元包括短脉冲发生器和反馈回路，以使待机调节单元停止预定的时间量。

7. 发明申请

US20070171723A1 NOR flash memory and related read method 有权
标题翻译： NOR闪存及相关读取方式
公开(公告)号：US20070171723A1
公开(公告)日：2007-07-26
申请号：US11606029
申请日：2006-11-30
申请人： Sang-wan Nam , Dae-han Kim
发明人： Sang-wan Nam , Dae-han Kim
IPC分类号： G11C16/06
CPC分类号： G11C16/26
摘要： A NOR flash memory is disclosed including a memory cell, sense amplifier output driver, and control circuit. A sense period for a sense operation performed by the sense amplifier is made synchronous with a clock signal so as to avoid power supply or ground signal noise generated by operation of the output driver.
摘要翻译：公开了一种NOR闪存，其包括存储单元，读出放大器输出驱动器和控制电路。由读出放大器执行的感测操作的感测周期与时钟信号同步，以避免由输出驱动器的操作产生的电源或接地信号噪声。

8. 发明申请

US20070081392A1 Flash memory device and voltage generating circuit for the same 有权
标题翻译：闪存器件和电压发生电路相同
公开(公告)号：US20070081392A1
公开(公告)日：2007-04-12
申请号：US11521479
申请日：2006-09-15
申请人： Sung-Kug Park , Dae-Han Kim
发明人： Sung-Kug Park , Dae-Han Kim
IPC分类号： G11C11/34
CPC分类号： G11C8/08 , G11C11/5621 , G11C16/30
摘要： A flash memory device includes a memory cell array including a plurality of memory cells. The flash memory device also includes a voltage generating circuit which generates a plurality of constant voltages to be applied to the memory cell array, the voltage generating circuit including a plurality of voltage regulators which generate at least two constant voltages, each having a constant voltage difference.
摘要翻译：闪存器件包括包括多个存储单元的存储单元阵列。闪速存储装置还包括产生要施加到存储单元阵列的多个恒定电压的电压产生电路，该电压产生电路包括产生至少两个恒定电压的多个电压调节器，每个恒定电压具有恒定的电压差。

9. 发明授权

US06639419B2 Supply voltage level detector 有权
公开(公告)号：US06639419B2
公开(公告)日：2003-10-28
申请号：US10026673
申请日：2001-12-27
申请人： Dae Han Kim
发明人： Dae Han Kim
IPC分类号： G01R3126
CPC分类号： G01R19/16538
摘要： The present invention relates to a supply voltage level detector. The supply voltage level detector includes a reference voltage generator for generating the reference voltage of a constant level depending on a control signal, a compare voltage generator for generating a compare voltage the variation ratio of which is higher than the supply voltage supplied from the outside depending on the control signal, and a comparator for comparing the reference voltage and the compare voltage depending on the control signal to output a given signal. The present invention constructs the compare voltage generator in the supply voltage level detector so that the variation of the compare voltage depending on the variation of the supply voltage becomes great. Therefore, the present invention can improve the sensing margin of the comparator for sensing the difference between the reference voltage and the compare voltage. Also, the present invention can prevent erroneous operation by a noise to accomplish a stable operation.

10. 发明申请

US20150332770A1 NONVOLATILE MEMORY DEVICE, STORAGE DEVICE INCLUDING THE NONVOLATILE MEMORY DEVICE, AND OPERATING METHOD OF THE STORAGE DEVICE 有权
标题翻译：非易失性存储器件，包括非易失性存储器件的存储器件和存储器件的操作方法
公开(公告)号：US20150332770A1
公开(公告)日：2015-11-19
申请号：US14596677
申请日：2015-01-14
申请人： Dae han KIM
发明人： Dae han KIM
IPC分类号： G11C16/10 , G11C16/34
CPC分类号： G11C16/10 , G11C16/0483 , G11C16/20 , G11C16/22 , G11C16/3459
摘要： A storage device includes a nonvolatile memory device and a memory controller is provided. The nonvolatile memory device includes a plurality of blocks. The memory controller is configured to detect, upon receiving a power-on signal, a partial block among the plurality of blocks. The partial block includes a first page incompletely programmed due to sudden power-off occurred to the storage device. The memory controller determines whether or not to perform a dummy program operation on the partial block, and programs a second page of the partial bock with dummy data. The first page is different from the second page.
摘要翻译：存储装置包括非易失性存储装置和存储器控制器。非易失性存储器件包括多个块。存储器控制器被配置为在接收到通电信号时检测多个块中的部分块。部分块包括由于存储设备发生突然断电而不完全编程的第一页。存储器控制器确定是否对部分块执行虚拟程序操作，并且用伪数据对部分块的第二页进行编程。第一页与第二页不同。

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