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1. 发明授权

US08344918B2 Process for dithering a time to digital converter and circuits for performing said process 有权
标题翻译：将时间抖动到数字转换器和用于执行所述处理的电路的处理
公开(公告)号：US08344918B2
公开(公告)日：2013-01-01
申请号：US12027696
申请日：2008-02-07
申请人： Pierre Baudin , Cyril Joubert
发明人： Pierre Baudin , Cyril Joubert
IPC分类号： H03M1/48
CPC分类号： H03L7/091 , G04F10/005
摘要： A process inserts a random noise in a Time to Digital Converter (TDC) designed for calculating the phase error between a first high frequency signal FDCO with respect to a second reference signal, switching at a lower frequency. The process involves: processing of the first signal FDCO by using a chain of delays having a set of n elementary delays which number is chosen so as to extend over a full period of the first signal; storing the outputs of the chain of delays in a set of latches and generation of a thermometer code presenting a stream of “1” separated from a stream of “0” by a border corresponding to the transition of the first signal with respect to the second reference signal; reducing the thermometer code by a random number PN of bits; processing of the result in an edge detecting and thermometer code decoding so as to generate two variables Δtr and Δtf which are representative of the difference between the rise and fall time of the first signal with respect to the second reference signal; computing the normalized gain so as to generate an average value of 1/TDCO; adding to the value Δtr a binary value corresponding to the number of bits PN; multiplying the preceding result by the average value of 1/TDCO and computing the phase error between the signals. The delay chain may be arranged with inverters. The process is particularly but not exclusively useful for carrying out a TDC convertor for the purpose of synthesizing of frequencies.
摘要翻译：一个过程在随时间数字转换器（TDC）中插入随机噪声，该数字转换器设计用于计算相对于第二参考信号的第一高频信号FDCO之间的相位误差，以较低频率切换。该过程涉及：通过使用具有一组n个基本延迟的延迟链来处理第一信号FDCO，该数目被选择为在第一信号的整个周期上延伸; 将所述延迟链的输出存储在一组锁存器中，以及生成温度计代码，其呈现与0的流分离的流，所述流与相对于所述第二参考信号的所述第一信号的转变相对应的边界; 通过比特的随机数PN减少温度计代码; 处理边缘检测和温度计码解码中的结果，以便产生代表第一信号相对于第二参考信号的上升和下降时间之差的变量Dgr; tr和＆Dgr; tf; 计算归一化增益以产生1 / TDCO的平均值; 添加值Dgr; tr对应于位数PN的二进制值; 将前面的结果乘以1 / TDCO的平均值，并计算信号之间的相位误差。延迟链可以配置有逆变器。为了合成频率，该过程特别但非完全有用于执行TDC转换器。

2. 发明申请

US20080297208A1 PROCESS FOR DITHERING A TIME TO DIGITAL CONVERTER AND CIRCUITS FOR PERFORMING SAID PROCESS 有权
标题翻译：数字转换器的时间过程和执行过程的电路
公开(公告)号：US20080297208A1
公开(公告)日：2008-12-04
申请号：US12027696
申请日：2008-02-07
申请人： Pierre Baudin , Cyril Joubert
发明人： Pierre Baudin , Cyril Joubert
IPC分类号： H03B21/00
CPC分类号： H03L7/091 , G04F10/005
摘要： A process inserts a random noise in a Time to Digital Converter (TDC) designed for calculating the phase error between a first high frequency signal FDCO with respect to a second reference signal, switching at a lower frequency. The process involves: processing of the first signal FDCO by using a chain of delays having a set of n elementary delays which number is chosen so as to extend over a full period of the first signal; storing the outputs of the chain of delays in a set of latches and generation of a thermometer code presenting a stream of “1” separated from a stream of “0” by a border corresponding to the transition of the first signal with respect to the second reference signal; reducing the thermometer code by a random number PN of bits; processing of the result in an edge detecting and thermometer code decoding so as to generate two variables Δtr and Δtf which are representative of the difference between the rise and fall time of the first signal with respect to the second reference signal; computing the normalized gain so as to generate an average value of 1/TDCO; adding to the value Δtr a binary value corresponding to the number of bits PN; multiplying the preceding result by the average value of 1/TDCO and computing the phase error between the signals. The delay chain may be arranged with inverters. The process is particularly but not exclusively useful for carrying out a TDC convertor for the purpose of synthesizing of frequencies.
摘要翻译：一个过程在随时间数字转换器（TDC）中插入随机噪声，该数字转换器设计用于计算相对于第二参考信号的第一高频信号FDCO之间的相位误差，以较低频率切换。该过程涉及：通过使用具有一组n个基本延迟的延迟链来处理第一信号FDCO，该数目被选择为在第一信号的整个周期上延伸; 将延迟链的输出存储在一组锁存器中，并生成呈现与“0”流分离的“1”流的温度计代码相对于第二信号相对于第二信号的转变的边界参考信号; 通过比特的随机数PN减少温度计代码; 处理结果在边缘检测和温度计码解码中，以产生代表第一信号相对于第二参考信号的上升和下降时间之差的变量Deltatr和Deltatf; 计算归一化增益以产生1 / TDCO的平均值; 向值Deltatr添加与位数PN对应的二进制值; 将前面的结果乘以1 / TDCO的平均值，并计算信号之间的相位误差。延迟链可以配置有逆变器。为了合成频率，该过程特别但非完全有用于执行TDC转换器。

3. 发明授权

US08531245B2 Temperature compensation in a PLL 有权
标题翻译： PLL中的温度补偿
公开(公告)号：US08531245B2
公开(公告)日：2013-09-10
申请号：US13283843
申请日：2011-10-28
申请人： Cyril Joubert , Sebastien Rieubon
发明人： Cyril Joubert , Sebastien Rieubon
IPC分类号： H03L7/097 , H03L7/085
CPC分类号： H03L1/00 , H03J2200/10 , H03L1/023 , H03L1/025 , H03L7/099 , H03L2207/06
摘要： A method and apparatus for compensating for temperature variation in a phase locked loop (PLL) includes receiving an error signal by a controller in which the error signal representative of an instantaneous frequency difference between a reference frequency signal and an output frequency signal of a voltage controlled oscillator of the PLL, and determining when a voltage of the error signal is outside of a predetermined voltage range. When the voltage is outside the predetermined voltage range, the method includes generating a new digital compensation signal based upon a previous digital compensation signal, and converting the new digital compensation signal to be an analog compensation signal. The method further includes filtering the analog compensation signal by a filter to produce a filtered analog compensation signal, and adjusting the output frequency of the voltage controlled oscillator in accordance with the filtered analog compensation signal.
摘要翻译：用于补偿锁相环（PLL）中的温度变化的方法和装置包括通过控制器接收误差信号，其中，该误差信号表示参考频率信号和电压控制的输出频率信号之间的瞬时频率差 PLL的振荡器，并且确定误差信号的电压何时超出预定电压范围。当电压超出预定电压范围时，该方法包括基于先前的数字补偿信号产生新的数字补偿信号，并将新的数字补偿信号转换为模拟补偿信号。该方法还包括通过滤波器对模拟补偿信号进行滤波以产生经滤波的模拟补偿信号，以及根据经滤波的模拟补偿信号调整压控振荡器的输出频率。

4. 发明申请

US20130106476A1 TEMPERATURE COMPENSATION IN A PLL 有权
标题翻译： PLL中的温度补偿
公开(公告)号：US20130106476A1
公开(公告)日：2013-05-02
申请号：US13283843
申请日：2011-10-28
申请人： CYRIL JOUBERT , SEBASTIEN RIEUBON
发明人： CYRIL JOUBERT , SEBASTIEN RIEUBON
IPC分类号： H03L7/06
CPC分类号： H03L1/00 , H03J2200/10 , H03L1/023 , H03L1/025 , H03L7/099 , H03L2207/06
摘要： A method and apparatus for compensating for temperature variation in a phase locked loop (PLL) includes receiving an error signal by a controller in which the error signal representative of an instantaneous frequency difference between a reference frequency signal and an output frequency signal of a voltage controlled oscillator of the PLL, and determining when a voltage of the error signal is outside of a predetermined voltage range. When the voltage is outside the predetermined voltage range, the method includes generating a new digital compensation signal based upon a previous digital compensation signal, and converting the new digital compensation signal to be an analog compensation signal. The method further includes filtering the analog compensation signal by a filter to produce a filtered analog compensation signal, and adjusting the output frequency of the voltage controlled oscillator in accordance with the filtered analog compensation signal.
摘要翻译：用于补偿锁相环（PLL）中的温度变化的方法和装置包括通过控制器接收误差信号，其中，该误差信号表示参考频率信号和电压控制的输出频率信号之间的瞬时频率差 PLL的振荡器，并且确定误差信号的电压何时超出预定电压范围。当电压超出预定电压范围时，该方法包括基于先前的数字补偿信号产生新的数字补偿信号，并将新的数字补偿信号转换为模拟补偿信号。该方法还包括通过滤波器对模拟补偿信号进行滤波以产生经滤波的模拟补偿信号，以及根据经滤波的模拟补偿信号调整压控振荡器的输出频率。

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