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1. 发明申请

US20100042772A1 Method and apparatus for high reliability data storage and retrieval operations in multi-level flash cells 失效
标题翻译：用于多级闪存单元中高可靠性数据存储和检索操作的方法和装置
公开(公告)号：US20100042772A1
公开(公告)日：2010-02-18
申请号：US12228795
申请日：2008-08-14
申请人： Randy M. Bonella , Daniel J. Allen , Thomas J. Holman , Chung W. Lam , Hiroyuki Sakamoto
发明人： Randy M. Bonella , Daniel J. Allen , Thomas J. Holman , Chung W. Lam , Hiroyuki Sakamoto
IPC分类号： G06F12/12 , G11C16/00 , G11C16/06 , G06F12/08
CPC分类号： G11C11/5628 , G11C2211/5641
摘要： One or more multi-level NAND flash cells are operated so as to store only single-level data, and these operations achieve an increased level of charge separation between the data states of the single-level operation by requiring a write to both the upper and lower pages, even though only one bit of data is being stored. That is, the second write operation increases the difference in floating gate charge between the erased state and the programmed state of the first write operation without changing the data in the flash memory cell. In one embodiment, a controller instructs the flash memory to perform two write operations for storing a single bit of data in an MLC flash cell. In another embodiment, the flash memory recognizes that a single write operation is directed a high reliability memory area and internally generates the required plurality of programming steps to place at least a predetermined amount of charge on the specified floating gate.
摘要翻译：操作一个或多个多电平NAND闪存单元以仅存储单级数据，并且这些操作通过要求写入上层和第二级的单级操作来实现单级操作的数据状态之间的电荷分离水平的提高即使只有一位数据被存储，也是较低的页面。也就是说，第二写入操作增加擦除状态和第一写操作的编程状态之间的浮栅电荷的差异，而不改变闪存单元中的数据。在一个实施例中，控制器指示闪速存储器执行用于在MLC闪存单元中存储单个数据位的两个写入操作。在另一个实施例中，闪速存储器识别出单个写入操作被引导到高可靠性存储区域，并且在内部产生所需的多个编程步骤以将至少预定量的电荷放置在指定的浮动栅极上。

2. 发明授权

US07941592B2 Method and apparatus for high reliability data storage and retrieval operations in multi-level flash cells 失效
标题翻译：用于多级闪存单元中高可靠性数据存储和检索操作的方法和装置
公开(公告)号：US07941592B2
公开(公告)日：2011-05-10
申请号：US12228795
申请日：2008-08-14
申请人： Randy M. Bonella , Daniel J. Allen , Thomas J. Holman , Chung W. Lam , Hiroyuki Sakamoto
发明人： Randy M. Bonella , Daniel J. Allen , Thomas J. Holman , Chung W. Lam , Hiroyuki Sakamoto
IPC分类号： G06F12/00
CPC分类号： G11C11/5628 , G11C2211/5641
摘要： One or more multi-level NAND flash cells are operated so as to store only single-level data, and these operations achieve an increased level of charge separation between the data states of the single-level operation by requiring a write to both the upper and lower pages, even though only one bit of data is being stored. That is, the second write operation increases the difference in floating gate charge between the erased state and the programmed state of the first write operation without changing the data in the flash memory cell. In one embodiment, a controller instructs the flash memory to perform two write operations for storing a single bit of data in an MLC flash cell. In another embodiment, the flash memory recognizes that a single write operation is directed a high reliability memory area and internally generates the required plurality of programming steps to place at least a predetermined amount of charge on the specified floating gate.
摘要翻译：操作一个或多个多电平NAND闪存单元以仅存储单级数据，并且这些操作通过要求写入上层和第二级的单级操作来实现单级操作的数据状态之间的电荷分离水平的提高即使只有一位数据被存储，也是较低的页面。也就是说，第二写入操作增加擦除状态和第一写操作的编程状态之间的浮栅电荷的差异，而不改变闪存单元中的数据。在一个实施例中，控制器指示闪速存储器执行用于在MLC闪存单元中存储单个数据位的两个写入操作。在另一个实施例中，闪速存储器识别出单个写入操作被引导到高可靠性存储区域，并且在内部产生所需的多个编程步骤以将至少预定量的电荷放置在指定的浮动栅极上。

3. 发明申请

US20100223422A1 Advanced Dynamic Disk Memory Module 审中-公开
标题翻译：高级动态磁盘内存模块
公开(公告)号：US20100223422A1
公开(公告)日：2010-09-02
申请号：US12697243
申请日：2010-01-30
申请人： Randy M. Bonella , Chung W. Lam
发明人： Randy M. Bonella , Chung W. Lam
IPC分类号： G06F12/02 , G06F12/00 , G06F13/14
CPC分类号： G06F13/405
摘要： Memory modules address the growing gap between main memory performance and disk drive performance in computational apparatus such as personal computers. Memory modules disclosed herein fill the need for substantially higher storage capacity in end-user add-in memory modules. Such memory modules accelerate the availability of applications, and data for those applications. An exemplary application of such memory modules is as a high capacity consumer memory product that can be used in Hi-Definition video recorders. In various embodiments, memory modules include a volatile memory, a non-volatile memory, and a command interpreter that includes interfaces to the memories and to various busses. The first memory acts as an accelerating buffer for the second memory, and the second memory provides non-volatile backup for the first memory. In some embodiments data transfer from the first memory to the second memory may be interrupted to provide read access to the second memory.
摘要翻译：存储器模块解决了诸如个人计算机之类的计算设备中主存储器性能和磁盘驱动器性能之间日益增长的差距。本文公开的存储器模块填补了在最终用户加载存储器模块中的显着更高的存储容量的需求。这些内存模块可加速应用程序的可用性以及这些应用程序的数据。这种存储器模块的示例性应用是可用于高清晰度录像机的高容量消费者存储产品。在各种实施例中，存储器模块包括易失性存储器，非易失性存储器和包括到存储器和各种总线的接口的命令解释器。第一存储器用作第二存储器的加速缓冲器，并且第二存储器为第一存储器提供非易失性备份。在一些实施例中，可以中断从第一存储器到第二存储器的数据传输，以提供对第二存储器的读取访问。

4. 发明授权

US07681004B2 Advanced dynamic disk memory module 失效
标题翻译：高级动态磁盘内存模块
公开(公告)号：US07681004B2
公开(公告)日：2010-03-16
申请号：US11453293
申请日：2006-06-13
申请人： Randy M. Bonella , Chung W. Lam
发明人： Randy M. Bonella , Chung W. Lam
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G06F13/405
摘要： Memory modules address the growing gap between main memory performance and disk drive performance in computational apparatus such as personal computers. Memory modules disclosed herein fill the need for substantially higher storage capacity in end-user add-in memory modules. Such memory modules accelerate the availability of applications, and data for those applications. An exemplary application of such memory modules is as a high capacity consumer memory product that can be used in Hi-Definition video recorders. In various embodiments, memory modules include a volatile memory, a non-volatile memory, and a command interpreter that includes interfaces to the memories and to various busses. The first memory acts as an accelerating buffer for the second memory, and the second memory provides non-volatile backup for the first memory. In some embodiments data transfer from the first memory to the second memory may be interrupted to provide read access to the second memory.
摘要翻译：存储器模块解决了诸如个人计算机之类的计算设备中主存储器性能和磁盘驱动器性能之间日益增长的差距。本文公开的存储器模块填补了在最终用户加载存储器模块中的显着更高的存储容量的需求。这些内存模块可加速应用程序的可用性以及这些应用程序的数据。这种存储器模块的示例性应用是可用于高清晰度录像机的高容量消费者存储产品。在各种实施例中，存储器模块包括易失性存储器，非易失性存储器和包括到存储器和各种总线的接口的命令解释器。第一存储器用作第二存储器的加速缓冲器，并且第二存储器为第一存储器提供非易失性备份。在一些实施例中，可以中断从第一存储器到第二存储器的数据传输，以提供对第二存储器的读取访问。

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