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    • 2. 发明授权
    • Method of reducing current leakage in a device and a device thereby formed
    • 减少装置和由此形成的装置中的电流泄漏的方法
    • US08843870B2
    • 2014-09-23
    • US13535835
    • 2012-06-28
    • Bruce ScatchardChunfang XieScott BarrickKenneth D. Wagner
    • Bruce ScatchardChunfang XieScott BarrickKenneth D. Wagner
    • G06F17/50
    • H01L21/823807H01L21/26513H01L21/823412H01L21/823418
    • A method of reducing current leakage in unused circuits performed during semiconductor fabrication and a semiconductor device or integrated circuit thereby formed. The method involves modifying a characteristic of at least one idle circuit that is unused in a product variant, to inhibit the circuit and reduce current leakage therefrom upon powering as well as during operation. The method can substantially increase the Vt (threshold voltage) of all transistors of a given type, such as all N-type transistors or all P-type transistors. The method is also suitable for controlling other transistor parameters, such as transistor channel length, as well as other active elements, such as N-type resistors or P-type resistors, in unused circuits which affect leakage current as well as for other unused circuits, such as a high Vt circuit, a standard Vt circuit, a low Vt circuit, and an SRAM cell Vt circuit.
    • 减少在半导体制造期间执行的未使用电路中的电流泄漏的方法以及由此形成的半导体器件或集成电路。 该方法包括修改在产品变型中未使用的至少一个空闲电路的特性,以在供电以及在操作期间抑制电路并减少其电流泄漏。 该方法可以显着增加给定类型的所有晶体管的Vt(阈值电压),例如所有N型晶体管或所有P型晶体管。 该方法还适用于控制其他晶体管参数,例如晶体管沟道长度,以及其他有源元件,例如N型电阻器或P型电阻器,在影响漏电流的未使用电路中以及其他未使用的电路 ,例如高Vt电路,标准Vt电路,低Vt电路和SRAM单元Vt电路。
    • 3. 发明申请
    • METHOD OF REDUCING CURRENT LEAKAGE IN A DEVICE AND A DEVICE THEREBY FORMED
    • 降低器件中的电流泄漏的方法及其形成的器件
    • US20140001601A1
    • 2014-01-02
    • US13535835
    • 2012-06-28
    • Bruce SCATCHARDChunfang XIEScott BARRICKKenneth D. WAGNER
    • Bruce SCATCHARDChunfang XIEScott BARRICKKenneth D. WAGNER
    • H01L21/265H01L29/02H01L21/66
    • H01L21/823807H01L21/26513H01L21/823412H01L21/823418
    • A method of reducing current leakage in unused circuits performed during semiconductor fabrication and a semiconductor device or integrated circuit thereby formed. The method involves modifying a characteristic of at least one idle circuit that is unused in a product variant, to inhibit the circuit and reduce current leakage therefrom upon powering as well as during operation. The method can substantially increase the Vt (threshold voltage) of all transistors of a given type, such as all N-type transistors or all P-type transistors. The method is also suitable for controlling other transistor parameters, such as transistor channel length, as well as other active elements, such as N-type resistors or P-type resistors, in unused circuits which affect leakage current as well as for other unused circuits, such as a high Vt circuit, a standard Vt circuit, a low Vt circuit, and an SRAM cell Vt circuit.
    • 减少在半导体制造期间执行的未使用电路中的电流泄漏的方法以及由此形成的半导体器件或集成电路。 该方法包括修改在产品变型中未使用的至少一个空闲电路的特性,以在供电以及在操作期间抑制电路并减少其电流泄漏。 该方法可以显着增加给定类型的所有晶体管的Vt(阈值电压),例如所有N型晶体管或所有P型晶体管。 该方法还适用于控制其他晶体管参数,例如晶体管沟道长度,以及其他有源元件,例如N型电阻器或P型电阻器,在影响漏电流的未使用电路中以及其他未使用的电路 ,例如高Vt电路,标准Vt电路,低Vt电路和SRAM单元Vt电路。