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1. 发明授权

US08097888B2 Package carrier for effectively blocking optical signal transmission between light emitting device and light receiving device 有权
标题翻译：封装载体，用于有效阻挡发光器件和光接收器件之间的光信号传输
公开(公告)号：US08097888B2
公开(公告)日：2012-01-17
申请号：US12577219
申请日：2009-10-12
申请人： Chu-Liang Cheng , Chi-Hua Wang
发明人： Chu-Liang Cheng , Chi-Hua Wang
IPC分类号： H01L27/15 , H01L29/267 , H01L31/12 , H01L33/00
CPC分类号： H01L25/167 , H01L23/49861 , H01L33/486 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2924/00014 , H01L2924/00
摘要： A package carrier suitable for carrying at least one light emitting device and at least one light receiving device includes a carrier substrate and a metal sheet. The carrier substrate includes a first carrying area and a second carrying area. The light emitting device is disposed in the first carrying area and the light receiving device is disposed in the second carrying area. The metal sheet is disposed in the carrier substrate and located between the first carrying area and the second carrier area, for blocking optical signal transmission between the light emitting device and the light receiving device.
摘要翻译：适于承载至少一个发光器件和至少一个光接收器件的封装载体包括载体衬底和金属片。载体基板包括第一输送区域和第二输送区域。发光装置设置在第一搬运区域中，并且光接收装置设置在第二搬运区域中。金属片设置在载体基板中并且位于第一承载区域和第二载体区域之间，用于阻挡发光器件和光接收器件之间的光信号传输。

2. 发明授权

US4471005A Ohmic contact to p-type Group III-V semiconductors 失效
标题翻译：与p型III-V族半导体的欧姆接触
公开(公告)号：US4471005A
公开(公告)日：1984-09-11
申请号：US460544
申请日：1983-01-24
申请人： Chu-Liang Cheng , Larry A. Coldren
发明人： Chu-Liang Cheng , Larry A. Coldren
IPC分类号： H01L21/285 , H01L21/283
CPC分类号： H01L21/28575
摘要： A plurality of pairs of layers comprising gold and zinc are successively evaporated onto a p-type Group III-V semiconductor material such as indium phosphide. A final layer of gold is evaporated onto the pairs of layers prior to heating the multilayer contact. Successive layers of chromium and gold may be evaporated onto the final gold layer prior to the annealing step.
摘要翻译：包含金和锌的多对层依次蒸发到p型III-V族半导体材料如磷化铟。在加热多层接触之前，最后一层金被蒸发到成对的层上。在退火步骤之前，铬和金的连续层可以蒸发到最终的金层上。

3. 发明申请

US20110057203A1 PACKAGE CARRIER 有权
标题翻译：包装载体
公开(公告)号：US20110057203A1
公开(公告)日：2011-03-10
申请号：US12577219
申请日：2009-10-12
申请人： Chu-Liang Cheng , Chi-Hua Wang
发明人： Chu-Liang Cheng , Chi-Hua Wang
IPC分类号： H01L33/00
CPC分类号： H01L25/167 , H01L23/49861 , H01L33/486 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2924/00014 , H01L2924/00
摘要： A package carrier suitable for carrying at least one light emitting device and at least one light receiving device includes a carrier substrate and a metal sheet. The carrier substrate includes a first carrying area and a second carrying area. The light emitting device is disposed in the first carrying area and the light receiving device is disposed in the second carrying area. The metal sheet is disposed in the carrier substrate and located between the first carrying area and the second carrier area, for blocking optical signal transmission between the light emitting device and the light receiving device.
摘要翻译：适于承载至少一个发光器件和至少一个光接收器件的封装载体包括载体衬底和金属片。载体基板包括第一输送区域和第二输送区域。发光装置设置在第一搬运区域中，并且光接收装置设置在第二搬运区域中。金属片设置在载体基板中并且位于第一承载区域和第二载体区域之间，用于阻挡发光器件和光接收器件之间的光信号传输。

4. 发明申请

US20080246902A1 LCD PANEL 审中-公开
标题翻译：液晶面板
公开(公告)号：US20080246902A1
公开(公告)日：2008-10-09
申请号：US12099166
申请日：2008-04-08
申请人： Chu-Liang Cheng
发明人： Chu-Liang Cheng
IPC分类号： G02F1/13357
CPC分类号： G02F1/133617 , G02F1/133512
摘要： A LCD panel is provided. The LCD panel includes a front substrate, a plurality of first phosphor composites, a plurality of second phosphor composites, a black matrix, a transparent electrode, a TFT array substrate and a liquid crystal layer. The liquid crystal layer is sandwiched between the front substrate and the TFT array substrate. The first phosphor composites, the second phosphor composites, the black matrix and the transparent electrode are disposed on the front substrate. The black matrix divides the front substrate into three windows including first windows, second windows and third windows periodically, wherein the first phosphor composites are disposed on the first windows, and the second phosphor composites are disposed on the second windows. The first phosphor composites and the second phosphor composites are capable of converting the primary light shinning towards the LCD panel into different colors respectively.
摘要翻译：提供LCD面板。 LCD面板包括前基板，多个第一磷光体复合体，多个第二磷光体复合体，黑矩阵，透明电极，TFT阵列基板和液晶层。液晶层夹在前基板和TFT阵列基板之间。第一磷光体复合物，第二磷光体复合物，黑色矩阵和透明电极设置在前基板上。黑色矩阵将前基板分为三个窗口，包括第一窗口，第二窗口和第三窗口，其中第一荧光体复合材料设置在第一窗口上，第二荧光体复合材料设置在第二窗口上。第一种磷光体复合材料和第二种磷光体复合材料能够将初级光线朝着LCD面板分别转换成不同的颜色。

5. 发明授权

US4824804A Method of making vertical enhancement-mode group III-V compound MISFETS 失效
标题翻译：制造垂直增强型III-V族复合MISFETS的方法
公开(公告)号：US4824804A
公开(公告)日：1989-04-25
申请号：US187606
申请日：1988-04-28
申请人： Chu-Liang Cheng
发明人： Chu-Liang Cheng
IPC分类号： H01L21/336 , H01L29/51 , H01L29/78 , H01L21/265 , H01L21/88
CPC分类号： H01L29/66522 , H01L29/51 , H01L29/7827 , Y10S148/065
摘要： A vertical, enhancement mode InP MISFET includes a conducting n-type substrate, a semi-insulating Fe-doped InP blocking layer on the substrate, a conducting layer formed in the blocking layer, a groove which extends through both the conducting layer and the blocking layer, a borosilicate dielectric layer formed on the walls of the groove, a gate electrode formed on the dielectric layer, drain electrodes formed on each side of the gate electrode, and a source electrode formed on the bottom of the substrate. When a positive gate voltage relative to the source is applied, conduction channels are formed along the sidewalls of the groove, and current flows vertically from drain to source.
摘要翻译：垂直增强型InP MISFET包括导电n型衬底，在衬底上的半绝缘Fe掺杂InP阻挡层，形成在阻挡层中的导电层，延伸穿过导电层和阻挡层的沟槽形成在槽的壁上的硼硅酸盐介电层，形成在电介质层上的栅电极，形成在栅电极的每一侧的漏电极和形成在基板的底部上的源电极。当施加相对于源极的正栅极电压时，沿着沟槽的侧壁形成导电沟道，并且电流从漏极到源极垂直流动。

6. 发明授权

US08265436B2 Bonding system for optical alignment 有权
标题翻译：用于光学对准的粘合系统
公开(公告)号：US08265436B2
公开(公告)日：2012-09-11
申请号：US12778127
申请日：2010-05-12
申请人： Chih-Tsung Shih , Chien-Jen Sun , Jerry Chien , Chu-Liang Cheng , Yi-Jen Chan
发明人： Chih-Tsung Shih , Chien-Jen Sun , Jerry Chien , Chu-Liang Cheng , Yi-Jen Chan
IPC分类号： G02B6/26 , G02B6/12 , H01L33/48
CPC分类号： G02B6/423 , G02B6/4238 , H01L2224/8114
摘要： A bonding system and a bonding method for alignment are provided. An optical semiconductor includes a light source and a plurality of protruded elements on a surface thereof. A semiconductor bench includes a light receiving element and a plurality of recess elements on a surface thereof. A sidewall of the protruded elements or a sidewall of the recess elements is slanted. A first metallized layer is disposed on a bonding surface of each protruded element and a second metallized layer is disposed on a bottom surface of each recess element, wherein the first metallized layer is used for bonding with the second metallized layer.
摘要翻译：提供了一种接合系统和用于对准的接合方法。光学半导体在其表面上包括光源和多个突出元件。半导体工作台在其表面上包括光接收元件和多个凹陷元件。突出元件的侧壁或凹部的侧壁是倾斜的。第一金属化层设置在每个突出元件的接合表面上，并且第二金属化层设置在每个凹陷元件的底表面上，其中第一金属化层用于与第二金属化层结合。

7. 外观设计

USD596637S1 Lens for optical mouse 有权
标题翻译：镜头用于光电鼠标
公开(公告)号：USD596637S1
公开(公告)日：2009-07-21
申请号：US29250281
申请日：2006-11-09
申请人： Chu-Liang Cheng , Chi-Hua Wang , Ying-Tien Shen
设计人： Chu-Liang Cheng , Chi-Hua Wang , Ying-Tien Shen

8. 发明授权

US4755867A Vertical Enhancement-mode Group III-V compound MISFETs 失效
标题翻译：垂直增强型III-V族复合MISFET
公开(公告)号：US4755867A
公开(公告)日：1988-07-05
申请号：US896772
申请日：1986-08-15
申请人： Chu-Liang Cheng
发明人： Chu-Liang Cheng
IPC分类号： H01L21/336 , H01L29/12 , H01L29/51 , H01L29/78
CPC分类号： H01L29/66522 , H01L29/51 , H01L29/7827
摘要： A vertical, enhancement mode InP MISFET includes a conducting n-type substrate, a semi-insulating Fe-doped InP blocking layer on the substrate, a conducting layer formed in the blocking layer, a groove which extends through both the conducting layer and the blocking layer, a borosilicate dielectric layer formed on the walls of the groove, a gate electrode formed on the dielectric layer, drain electrodes formed on each side of the gate electrode, and a source electrode formed on the bottom of the substrate. When a positive gate voltage relative to the source is applied, conduction channels are formed along the sidewalls of the groove, and current flows vertically from drain to source.
摘要翻译：垂直增强型InP MISFET包括导电n型衬底，在衬底上的半绝缘Fe掺杂InP阻挡层，形成在阻挡层中的导电层，延伸穿过导电层和阻挡层的沟槽形成在槽的壁上的硼硅酸盐介电层，形成在电介质层上的栅电极，形成在栅电极的每一侧的漏电极和形成在基板的底部上的源电极。当施加相对于源极的正栅极电压时，沿着沟槽的侧壁形成导电沟道，并且电流从漏极到源极垂直流动。

9. 发明授权

US4829347A Process for making indium gallium arsenide devices 失效
标题翻译：制造铟镓砷器件的工艺
公开(公告)号：US4829347A
公开(公告)日：1989-05-09
申请号：US236337
申请日：1988-08-22
申请人： Chu-Liang Cheng , Julian Cheng , Stephen R. Forrest
发明人： Chu-Liang Cheng , Julian Cheng , Stephen R. Forrest
IPC分类号： H01L21/337 , H01L29/205 , H01L29/207 , H01L29/80 , H01L29/808
CPC分类号： H01L29/66924 , H01L29/205 , H01L29/207 , H01L29/802 , H01L29/808
摘要： Junction field effect transistors are described with unusually short gates and a self-aligned structure which permits close approach of the source and drain electrodes to the p-n junction. Such devices have high speed, high gain and are usefully combined with other field effect transistors in integrated circuits.
摘要翻译：描述了具有不寻常的短栅极和自对准结构的结点场效应晶体管，其允许源极和漏极接近p-n结。这样的器件具有高速度，高增益，并且与集成电路中的其它场效应晶体管有用地组合。

10. 发明申请

US20110280511A1 BONDING SYSTEM FOR OPTICAL ALIGNMENT 有权
标题翻译：用于光学对准的接合系统
公开(公告)号：US20110280511A1
公开(公告)日：2011-11-17
申请号：US12778127
申请日：2010-05-12
申请人： Chih-Tsung Shih , Chien-Jen Sun , Jerry Chien , Chu-Liang Cheng , Yi-Jen Chan
发明人： Chih-Tsung Shih , Chien-Jen Sun , Jerry Chien , Chu-Liang Cheng , Yi-Jen Chan
IPC分类号： G02B6/12 , H01L33/48
CPC分类号： G02B6/423 , G02B6/4238 , H01L2224/8114
摘要： A bonding system and a bonding method for alignment are provided. An optical semiconductor includes a light source and a plurality of protruded elements on a surface thereof. A semiconductor bench includes a light receiving element and a plurality of recess elements on a surface thereof. A sidewall of the protruded elements or a sidewall of the recess elements is slanted. A first metallized layer is disposed on a bonding surface of each protruded element and a second metallized layer is disposed on a bottom surface of each recess element, wherein the first metallized layer is used for bonding with the second metallized layer.
摘要翻译：提供了一种接合系统和用于对准的接合方法。光学半导体在其表面上包括光源和多个突出元件。半导体工作台在其表面上包括光接收元件和多个凹陷元件。突出元件的侧壁或凹部的侧壁是倾斜的。第一金属化层设置在每个突出元件的接合表面上，并且第二金属化层设置在每个凹陷元件的底表面上，其中第一金属化层用于与第二金属化层结合。

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