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1. 发明申请

US20130009252A1 High Voltage Bipolar Transistor with Trench Field Plate 有权
标题翻译：具有沟槽场板的高压双极晶体管
公开(公告)号：US20130009252A1
公开(公告)日：2013-01-10
申请号：US13618225
申请日：2012-09-14
申请人： Christoph Kadow , Thorsten Meyer , Norbert Krischke
发明人： Christoph Kadow , Thorsten Meyer , Norbert Krischke
IPC分类号： H01L21/331 , H01L27/06
CPC分类号： H01L29/7813 , H01L27/0623 , H01L29/0696 , H01L29/402 , H01L29/407 , H01L29/41708 , H01L29/42368 , H01L29/4238 , H01L29/66666 , H01L29/7302 , H01L29/732 , H01L29/7825 , H01L29/7828
摘要： A bipolar transistor structure includes an epitaxial layer on a semiconductor substrate, a bipolar transistor device formed in the epitaxial layer and a trench structure formed in the epitaxial layer adjacent at least two opposing lateral sides of the bipolar transistor device. The trench structure includes a field plate spaced apart from the epitaxial layer by an insulating material. The bipolar transistor structure further includes a base contact connected to a base of the bipolar transistor device, an emitter contact connected to an emitter of the bipolar transistor device and isolated from the base contact and an electrical connection between the emitter contact and the field plate.
摘要翻译：双极晶体管结构包括在半导体衬底上的外延层，形成在外延层中的双极晶体管器件和形成在外延层中的与双极晶体管器件的至少两个相对侧面相邻的沟槽结构。沟槽结构包括通过绝缘材料与外延层隔开的场板。双极晶体管结构还包括连接到双极晶体管器件的基极的基极触点，连接到双极晶体管器件的发射极并与基极触点隔离的发射极触点和发射极触点与场板之间的电连接。

2. 发明申请

US20120175687A1 System and Method for Manufacturing a Temperature Difference Sensor 有权
标题翻译：制造温差传感器的系统和方法
公开(公告)号：US20120175687A1
公开(公告)日：2012-07-12
申请号：US13426530
申请日：2012-03-21
申请人： Donald Dibra , Christoph Kadow , Markus Zundel
发明人： Donald Dibra , Christoph Kadow , Markus Zundel
IPC分类号： H01L29/66 , H01L27/06 , H01L21/04
CPC分类号： H01L35/32 , G01K1/08 , G01K7/02
摘要： An embodiment of the invention relates to a Seebeck temperature difference sensor that may be formed in a trench on a semiconductor device. A portion of the sensor may be substantially surrounded by an electrically conductive shield. A plurality of junctions may be included to provide a higher Seebeck sensor voltage. The shield may be electrically coupled to a local potential, or left electrically floating. A portion of the shield may be formed as a doped well in the semiconductor substrate on which the semiconductor device is formed, or as a metal layer substantially covering the sensor. The shield may be formed as a first oxide layer on a sensor trench wall with a conductive shield formed on the first oxide layer, and a second oxide layer formed on the conductive shield. An absolute temperature sensor may be coupled in series with the Seebeck temperature difference sensor.
摘要翻译：本发明的实施例涉及可以形成在半导体器件上的沟槽中的塞贝克温差传感器。传感器的一部分可以被导电屏蔽件基本上包围。可以包括多个连接点以提供更高的塞贝克传感器电压。屏蔽可以电耦合到局部电位，或者电耦合到电浮置。屏蔽的一部分可以形成为半导体器件形成的半导体衬底中的掺杂阱，或者形成为基本覆盖传感器的金属层。屏蔽件可以形成为在传感器沟槽壁上的第一氧化物层，其中形成在第一氧化物层上的导电屏蔽层和形成在导电屏蔽上的第二氧化物层。绝对温度传感器可以与塞贝克温差传感器串联耦合。

3. 发明授权

US08169045B2 System and method for constructing shielded seebeck temperature difference sensor 有权
标题翻译：屏蔽温差传感器的系统和方法
公开(公告)号：US08169045B2
公开(公告)日：2012-05-01
申请号：US12431504
申请日：2009-04-28
申请人： Donald Dibra , Christoph Kadow , Markus Zundel
发明人： Donald Dibra , Christoph Kadow , Markus Zundel
IPC分类号： H01L35/28
CPC分类号： H01L35/32 , G01K1/08 , G01K7/02
摘要： An embodiment of the invention relates to a Seebeck temperature difference sensor that may be formed in a trench on a semiconductor device. A portion of the sensor may be substantially surrounded by an electrically conductive shield. A plurality of junctions may be included to provide a higher Seebeck sensor voltage. The shield may be electrically coupled to a local potential, or left electrically floating. A portion of the shield may be formed as a doped well in the semiconductor substrate on which the semiconductor device is formed, or as a metal layer substantially covering the sensor. The shield may be formed as a first oxide layer on a sensor trench wall with a conductive shield formed on the first oxide layer, and a second oxide layer formed on the conductive shield. An absolute temperature sensor may be coupled in series with the Seebeck temperature difference sensor.
摘要翻译：本发明的实施例涉及可以形成在半导体器件上的沟槽中的塞贝克温差传感器。传感器的一部分可以被导电屏蔽件基本上包围。可以包括多个结以提供更高的塞贝克传感器电压。屏蔽可以电耦合到局部电位，或者电耦合到电浮置。屏蔽的一部分可以形成为半导体器件形成的半导体衬底中的掺杂阱，或者形成为基本覆盖传感器的金属层。屏蔽件可以形成为在传感器沟槽壁上的第一氧化物层，其中形成在第一氧化物层上的导电屏蔽层和形成在导电屏蔽上的第二氧化物层。绝对温度传感器可以与塞贝克温差传感器串联耦合。

4. 发明申请

US20120007176A1 High-Voltage Bipolar Transistor with Trench Field Plate 有权
标题翻译：具有沟槽场板的高压双极晶体管
公开(公告)号：US20120007176A1
公开(公告)日：2012-01-12
申请号：US12833202
申请日：2010-07-09
申请人： Christoph KADOW , Thorsten MEYER , Norbert KRISCHKE
发明人： Christoph KADOW , Thorsten MEYER , Norbert KRISCHKE
IPC分类号： H01L27/06 , H01L21/331 , H01L29/06
CPC分类号： H01L29/7813 , H01L27/0623 , H01L29/0696 , H01L29/402 , H01L29/407 , H01L29/41708 , H01L29/42368 , H01L29/4238 , H01L29/66666 , H01L29/7302 , H01L29/732 , H01L29/7825 , H01L29/7828
摘要： A bipolar transistor structure includes an epitaxial layer on a semiconductor substrate, a bipolar transistor device formed in the epitaxial layer and a trench structure formed in the epitaxial layer adjacent at least two opposing lateral sides of the bipolar transistor device. The trench structure includes a field plate spaced apart from the epitaxial layer by an insulating material. The bipolar transistor structure further includes a base contact connected to a base of the bipolar transistor device, an emitter contact connected to an emitter of the bipolar transistor device and isolated from the base contact and an electrical connection between the emitter contact and the field plate.
摘要翻译：双极晶体管结构包括在半导体衬底上的外延层，形成在外延层中的双极晶体管器件和形成在外延层中的与双极晶体管器件的至少两个相对侧面相邻的沟槽结构。沟槽结构包括通过绝缘材料与外延层隔开的场板。双极晶体管结构还包括连接到双极晶体管器件的基极的基极触点，连接到双极晶体管器件的发射极并与基极触点隔离的发射极触点和发射极触点与场板之间的电连接。

5. 发明申请

US20090189461A1 INTEGRATED CIRCUIT INCLUDING A POWER MOS TRANSISTOR 有权
标题翻译：集成电路，包括功率MOS晶体管
公开(公告)号：US20090189461A1
公开(公告)日：2009-07-30
申请号：US12022679
申请日：2008-01-30
申请人： Donald Dibra , Christoph Kadow
发明人： Donald Dibra , Christoph Kadow
IPC分类号： H02H3/00 , H01L29/76
CPC分类号： H01L29/7831 , H01L27/0248 , H01L27/088 , H01L29/0692 , H01L29/0696 , H01L2924/0002 , Y10T307/865 , H01L2924/00
摘要： An integrated circuit includes a first transistor having a first gate and a first source and a second transistor having a second gate and a second source. The integrated circuit includes a first source contact adjacent the second transistor and coupled to the first source and the second source. The integrated circuit includes a first bond wire coupled to the first source contact.
摘要翻译：集成电路包括具有第一栅极和第一源极的第一晶体管和具有第二栅极和第二源极的第二晶体管。集成电路包括与第二晶体管相邻并且耦合到第一源极和第二源极的第一源极触点。集成电路包括耦合到第一源极触点的第一接合线。

6. 发明授权

US10522675B2 Integrated circuit including field effect transistor structures with gate and field electrodes and methods for manufacturing and operating an integrated circuit 有权
公开(公告)号：US10522675B2
公开(公告)日：2019-12-31
申请号：US13358272
申请日：2012-01-25
申请人： Christoph Kadow
发明人： Christoph Kadow
IPC分类号： H01L29/66 , H01L29/739 , H01L21/02 , H01L27/088 , H01L29/78 , H01L21/8234 , H01L29/40 , H01L29/423 , H01L29/06 , H01L29/10
摘要： An integrated circuit includes a first and a second field effect transistor structure. The first field effect transistor structure includes a first gate electrode structure and a first field electrode structure. The second field effect transistor structure includes a second gate electrode structure and a second field electrode structure. The first and the second gate electrode structures are electrically separated from each other. The first and the second field electrode structures are separated from each other.

7. 发明授权

US08519473B2 Vertical transistor component 有权
标题翻译：垂直晶体管元件
公开(公告)号：US08519473B2
公开(公告)日：2013-08-27
申请号：US12836422
申请日：2010-07-14
申请人： Andreas Peter Meiser , Markus Zundel , Christoph Kadow
发明人： Andreas Peter Meiser , Markus Zundel , Christoph Kadow
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L21/823487 , H01L27/088 , H01L29/0653 , H01L29/407 , H01L29/41766 , H01L29/41775 , H01L29/4236 , H01L29/42368 , H01L29/42372 , H01L29/4238 , H01L29/42392 , H01L29/66666 , H01L29/66734 , H01L29/7397 , H01L29/7827
摘要： A vertical transistor component is produced by providing a semiconductor body with a first surface and a second surface, producing at least one gate contact electrode in a trench, the trench extending from the first surface through the semiconductor body to the second surface, and producing at least one gate electrode connected to the at least one gate contact electrode in the region of the first surface.
摘要翻译：通过提供具有第一表面和第二表面的半导体本体产生垂直晶体管组件，在沟槽中产生至少一个栅极接触电极，沟槽从第一表面延伸穿过半导体本体到第二表面，并且在在所述第一表面的区域中连接到所述至少一个栅极接触电极的至少一个栅电极。

8. 发明申请

US20120098083A1 INTEGRATED CIRCUIT TECHNOLOGY WITH DIFFERENT DEVICE EPITAXIAL LAYERS 有权
标题翻译：集成电路技术与不同的设备外延层
公开(公告)号：US20120098083A1
公开(公告)日：2012-04-26
申请号：US12911009
申请日：2010-10-25
申请人： Thorsten Meyer , Wolfgang Werner , Christoph Kadow
发明人： Thorsten Meyer , Wolfgang Werner , Christoph Kadow
IPC分类号： H01L29/00 , H01L21/20
CPC分类号： H01L27/0688 , H01L21/26586 , H01L21/76224 , H01L21/823878 , H01L27/0623 , H01L27/0629 , H01L27/092 , H01L29/0657 , H01L29/0878 , H01L29/407 , H01L29/41766 , H01L29/41775 , H01L29/42368 , H01L29/66734 , H01L29/78 , H01L29/7811 , H01L29/7813
摘要： A semiconductor die includes a substrate, a first device region and a second device region. The first device region includes an epitaxial layer on the substrate and one or more semiconductor devices of a first type formed in the epitaxial layer of the first device region. The second device region is spaced apart from the first device region and includes an epitaxial layer on the substrate and one or more semiconductor devices of a second type formed in the epitaxial layer of the second device region. The epitaxial layer of the first device region is different than the epitaxial layer of the second device region so that the one or more semiconductor devices of the first type are formed in a different epitaxial layer than the one or more semiconductor devices of the second type.
摘要翻译：半导体管芯包括衬底，第一器件区域和第二器件区域。第一器件区域包括衬底上的外延层和形成在第一器件区域的外延层中的第一类型的一个或多个半导体器件。第二器件区域与第一器件区域间隔开，并且在衬底上包括外延层，以及形成在第二器件区域的外延层中的第二类型的一个或多个半导体器件。第一器件区域的外延层与第二器件区域的外延层不同，使得第一类型的一个或多个半导体器件形成在与第二类型的一个或多个半导体器件不同的外延层中。

9. 发明授权

US08084821B2 Integrated circuit including a power MOS transistor 有权
标题翻译：集成电路包括功率MOS晶体管
公开(公告)号：US08084821B2
公开(公告)日：2011-12-27
申请号：US12022679
申请日：2008-01-30
申请人： Donald Dibra , Christoph Kadow
发明人： Donald Dibra , Christoph Kadow
IPC分类号： H01L23/62
CPC分类号： H01L29/7831 , H01L27/0248 , H01L27/088 , H01L29/0692 , H01L29/0696 , H01L2924/0002 , Y10T307/865 , H01L2924/00
摘要： An integrated circuit includes a first transistor having a first gate and a first source and a second transistor having a second gate and a second source. The integrated circuit includes a first source contact adjacent the second transistor and coupled to the first source and the second source. The integrated circuit includes a first bond wire coupled to the first source contact.
摘要翻译：集成电路包括具有第一栅极和第一源极的第一晶体管和具有第二栅极和第二源极的第二晶体管。集成电路包括与第二晶体管相邻并且耦合到第一源极和第二源极的第一源极触点。集成电路包括耦合到第一源极触点的第一接合线。

10. 发明申请

US20110037126A1 SEMICONDUCTOR ARRANGEMENT INCLUDING A LOAD TRANSISTOR AND SENSE TRANSISTOR 有权
标题翻译：半导体器件包括负载晶体管和感测晶体管
公开(公告)号：US20110037126A1
公开(公告)日：2011-02-17
申请号：US12541635
申请日：2009-08-14
申请人： Christoph Kadow , Markus Leicht , Stefan Woehlert
发明人： Christoph Kadow , Markus Leicht , Stefan Woehlert
IPC分类号： H01L29/66 , H01L21/44
CPC分类号： H01L29/7813 , H01L27/088 , H01L29/7815
摘要： A semiconductor arrangement including a load transistor and a sense transistor that are integrated in a semiconductor body. One embodiment provides a number of transistor cells integrated in the semiconductor body, each transistor cell including a first active transistor region. A number of first contact electrodes, each of the contact electrodes contacting the first active transistor regions through contact plugs. A second contact electrode contacts a first group of the first contact electrodes, but not contacting a second group of the first contact electrodes. The transistor cells being contacted by first contact electrodes of the first group form a load transistor, with the second electrode forming a load terminal of the load transistor. The transistor cells being contacted by first contact electrodes of the second group form a sense transistor.
摘要翻译：包括集成在半导体本体中的负载晶体管和读出晶体管的半导体装置。一个实施例提供集成在半导体本体中的多个晶体管单元，每个晶体管单元包括第一有源晶体管区域。多个第一接触电极，每个接触电极通过接触插塞接触第一有源晶体管区域。第二接触电极接触第一组第一接触电极，但不接触第二组第一接触电极。与第一组的第一接触电极接触的晶体管单元形成负载晶体管，第二电极形成负载晶体管的负载端子。与第二组的第一接触电极接触的晶体管单元形成感测晶体管。

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