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1. 发明授权

US08074112B1 Memory backup used in a raid system 有权
标题翻译：在RAID系统中使用的内存备份
公开(公告)号：US08074112B1
公开(公告)日：2011-12-06
申请号：US12329128
申请日：2008-12-05
申请人： Lihan Chang , Chee Hoe Chu , Chi-Chih Lin , Wei Zhou
发明人： Lihan Chang , Chee Hoe Chu , Chi-Chih Lin , Wei Zhou
IPC分类号： G06F11/00
CPC分类号： G06F11/1441 , G06F11/1076 , G06F11/2015
摘要： Systems, apparatuses, and methods for memory backup in a redundant array of independent disks (RAID) system are described. The methods include detecting a failure in a main power supply that supplies power to a volatile memory that is coupled to a RAID controller, switching to a temporary power supply to supply power to the volatile memory in response to detecting the main power supply failure, and transferring data from the volatile memory to a non-volatile memory coupled to the RAID controller subsequent to switching to the temporary power supply.
摘要翻译：描述了独立磁盘冗余阵列（RAID）系统中的内存备份的系统，设备和方法。所述方法包括检测主电源中的故障，所述主电源向耦合到RAID控制器的易失性存储器供电，响应于检测到主电源故障切换到临时电源以向易失性存储器供电;以及在切换到临时电源之后将数据从易失性存储器传送到耦合到RAID控制器的非易失性存储器。

2. 发明授权

US08013434B2 Thin double-sided package substrate and manufacture method thereof 失效
标题翻译：薄双面封装基板及其制造方法
公开(公告)号：US08013434B2
公开(公告)日：2011-09-06
申请号：US12128163
申请日：2008-05-28
申请人： Chi Chih Lin , Bo Sun , Hung Jen Wang , Jen Feng Tseng
发明人： Chi Chih Lin , Bo Sun , Hung Jen Wang , Jen Feng Tseng
IPC分类号： H01L33/00
CPC分类号： H01L23/3735 , H01L21/486 , H01L23/13 , H01L23/49822 , H01L23/49827 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/85 , H01L33/486 , H01L33/60 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83801 , H01L2224/85 , H01L2924/00011 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/12041 , H01L2924/15153 , H01L2924/15165 , H01L2924/1517 , H01L2924/181 , Y10T29/49165 , H01L2924/00 , H01L2924/00012 , H01L2224/83851 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention discloses a package substrate comprising an insulative carrier having a through-hole penetrating the top and bottom surfaces thereof; at least one first and second conductive layers comprising circuits respectively formed on the top and bottom surfaces and covering an opening of the through-hole; a conductive element set in the through-hole for electrically connecting the first and second conductive layers; a first metal layer formed on the first and/or the second conductive layer; and at least one chip receiving bay formed by removing a portion of the carrier from the upper to the lower surfaces until the second conductive layer is exposed for accommodating at least one chip therein on the exposed second conductive layer. The package structure has a reduced overall thickness and an enhanced heat-dissipation effect for the chip and prevents from humidity penetration. A manufacturing method for the package structure is also disclosed.
摘要翻译：本发明公开了一种封装基板，包括：绝缘载体，具有穿透其顶表面和底表面的通孔; 至少一个第一和第二导电层，包括分别形成在顶表面和底表面上并覆盖通孔的开口的电路; 设置在所述通孔中用于电连接所述第一和第二导电层的导电元件; 形成在第一和/或第二导电层上的第一金属层; 以及通过从上到下表面去除载体的一部分直到第二导电层被暴露以在暴露的第二导电层上容纳其中的至少一个芯片而形成的至少一个芯片接收间隔。封装结构具有减小的总体厚度和增强的芯片散热效果并防止湿度渗透。还公开了一种用于封装结构的制造方法。

3. 发明申请

US20080315239A1 THIN DOUBLE-SIDED PACKAGE SUBSTRATE AND MANUFACTURE METHOD THEREOF 失效
标题翻译：薄双面封装基板及其制造方法
公开(公告)号：US20080315239A1
公开(公告)日：2008-12-25
申请号：US12128163
申请日：2008-05-28
申请人： Chi Chih Lin , Bo Sun , Hung Jen Wang , Jen Feng Tseng
发明人： Chi Chih Lin , Bo Sun , Hung Jen Wang , Jen Feng Tseng
IPC分类号： H01L33/00 , H01L23/48 , H05K3/42
CPC分类号： H01L23/3735 , H01L21/486 , H01L23/13 , H01L23/49822 , H01L23/49827 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/85 , H01L33/486 , H01L33/60 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83801 , H01L2224/85 , H01L2924/00011 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/12041 , H01L2924/15153 , H01L2924/15165 , H01L2924/1517 , H01L2924/181 , Y10T29/49165 , H01L2924/00 , H01L2924/00012 , H01L2224/83851 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention discloses a manufacture method for a thin double-sided package substrate, which includes steps: providing a carrier; respectively forming a first conductive layer and a second conductive layer on the upper and lower surfaces of the carrier; forming a through-hole penetrating the first conductive layer and the carrier but not penetrating the second conductive layer; setting a conductive element in the through-hole to electrically connect the first conductive layer with the second conductive layer; forming desired circuits on the first conductive layer and/or the second conductive layer; forming a first metal layer on the first conductive layer and/or the second conductive layer; and removing the carrier located in a predetermined region to form a chip receiving bay. The present invention also discloses a package substrate made by the abovementioned manufacture method, which can reduce the overall thickness of a chip package structure, increase the heat-dissipation effect of the chip and prevent the chip package structure from humidity penetration.
摘要翻译：本发明公开了一种薄双面封装基板的制造方法，其特征在于，包括：提供载体; 分别在所述载体的上表面和下表面上形成第一导电层和第二导电层; 形成穿过第一导电层和载体但不穿透第二导电层的通孔; 在所述通孔中设置导电元件以将所述第一导电层与所述第二导电层电连接; 在第一导电层和/或第二导电层上形成所需的电路; 在第一导电层和/或第二导电层上形成第一金属层; 并且移除位于预定区域中的载体以形成芯片接收槽。本发明还公开了通过上述制造方法制造的封装衬底，其可以减小芯片封装结构的总体厚度，增加芯片的散热效果并防止芯片封装结构湿度渗透。

4. 发明申请

US20080217759A1 Chip package substrate and structure thereof 审中-公开
标题翻译：芯片封装基板及其结构
公开(公告)号：US20080217759A1
公开(公告)日：2008-09-11
申请号：US11715146
申请日：2007-03-06
申请人： Chi Chih Lin , Bo Sun , Hung Jen Wang
发明人： Chi Chih Lin , Bo Sun , Hung Jen Wang
IPC分类号： H01L23/48 , H01L23/52
CPC分类号： H01L23/3121 , H01L23/315 , H01L23/49861 , H01L24/48 , H01L24/73 , H01L2224/16 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/01079 , H01L2924/09701 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A chip package substrate includes multiple pairs of connection pads. Both pads of a connection pad pair are separated from each other with a distance, which is smaller than the side length of a chip. An insulation layer is configured on the connection pads but exposes a portion of the surface of each of connection pads, and then a contact pad is configured on the exposed surface of each of connection pads. Thus, the connection pads are moved inwardly to under the chip carrier area to reduce the size of the chip package.
摘要翻译：芯片封装衬底包括多对连接焊盘。连接焊盘对的两个焊盘彼此分开，距离小于芯片的边长。绝缘层配置在连接焊盘上，但暴露出每个连接焊盘的表面的一部分，然后在每个连接焊盘的暴露表面上配置接触焊盘。因此，连接焊盘向内移动到芯片载体区域下方以减小芯片封装的尺寸。

5. 发明申请

US20090302345A1 LED LAMP MODULE AND FABRICATION METHOD THEREOF 失效
标题翻译： LED灯模块及其制造方法
公开(公告)号：US20090302345A1
公开(公告)日：2009-12-10
申请号：US12472781
申请日：2009-05-27
申请人： Bill CHUANG , Chi Chih Lin
发明人： Bill CHUANG , Chi Chih Lin
IPC分类号： H01L33/00 , H01L21/50
CPC分类号： H01L33/648 , F21K9/00 , F21V29/763 , F21V29/767 , H01L25/0753 , H01L25/167 , H01L33/641 , H01L2224/48091 , H01L2224/73265 , H05K1/0203 , H05K1/182 , H01L2924/00014
摘要： An LED lamp module is disclosed. An LED die is directly mounted on a heat sink element and then the LED chip is electrically connected to a circuit substrate or a circuit layer disposed over the heat sink element, wherein the size of the heat sink element is larger than the circuit layer or the substrate thereon, thereby providing the LED lamp module excellent heat dissipation. The structure of the LED lamp of the present invention simplifies the existing fabrication process, lowers the cost, and also increases the heat dissipation effect.
摘要翻译：公开了一种LED灯模块。 LED芯片直接安装在散热元件上，然后将LED芯片电连接到设置在散热元件上的电路基板或电路层，其中散热元件的尺寸大于电路层或从而为LED灯具提供优异的散热性。本发明的LED灯的结构简化了现有的制造工艺，降低了成本，并且还增加了散热效果。

6. 发明申请

US20080135939A1 Fabrication method of semiconductor package and structure thereof 审中-公开
标题翻译：半导体封装的制造方法及其结构
公开(公告)号：US20080135939A1
公开(公告)日：2008-06-12
申请号：US12000021
申请日：2007-12-07
申请人： Chi Chih Lin , Bo Sun , Hung Jen Wang , Jen Feng Tseng
发明人： Chi Chih Lin , Bo Sun , Hung Jen Wang , Jen Feng Tseng
IPC分类号： H01L23/62
CPC分类号： H01L21/4821 , H01L21/568 , H01L21/6835 , H01L23/3107 , H01L23/49582 , H01L24/48 , H01L2224/48091 , H01L2224/48247 , H01L2224/484 , H01L2224/85001 , H01L2224/85411 , H01L2224/85416 , H01L2224/85439 , H01L2224/85447 , H01L2224/85464 , H01L2924/00014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/181 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： A fabrication method of semiconductor and a structure thereof are disclosed herein. The present invention includes: providing a substrate; disposing a mask on the substrate, wherein the mask has a plurality of patterned openings to expose portions of the substrate; forming a metal layer on the exposed portions of the substrate; forming a surface treatment layer on the metal layer; removing the mask; performing a chip package step; and removing the substrate and the metal layer to form a height difference of semiconductor package with pads. The characteristic of the height difference not only can increase the thickness of the solder materials but also can easily check the soldering status.
摘要翻译：本文公开了半导体的制造方法及其结构。本发明包括：提供基板; 在衬底上设置掩模，其中所述掩模具有多个图案化的开口以暴露所述衬底的部分; 在所述基板的暴露部分上形成金属层; 在所述金属层上形成表面处理层; 去除面膜; 执行芯片封装步骤; 以及去除衬底和金属层以形成具有焊盘的半导体封装的高度差。高差的特点不仅可以增加焊料的厚度，而且可以方便地检查焊接状态。

7. 发明申请

US20070194430A1 Substrate of chip package and chip package structure thereof 审中-公开
标题翻译：芯片封装基板及芯片封装结构
公开(公告)号：US20070194430A1
公开(公告)日：2007-08-23
申请号：US11699655
申请日：2007-01-29
申请人： Chi Chih Lin , Bo Sun , Hung Jen Wang
发明人： Chi Chih Lin , Bo Sun , Hung Jen Wang
IPC分类号： H01L23/48
CPC分类号： H01L23/49811 , H01L21/6835 , H01L23/3121 , H01L24/48 , H01L27/14618 , H01L2224/16225 , H01L2224/16245 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A substrate of chip package and the chip package structure thereof centralizes the bonding area under a chip carrier area and protrudes the bonding area from the chip carrier area to a chip package so as to increase the reliability of bump type surface mount technology during the second-level electronic assembly. Furthermore, the carrier for produce the substrate is recyclable during the chip package procedure so as to reduce the production cost.
摘要翻译：芯片封装的基板和芯片封装结构集中了芯片载体区域下方的接合区域，并且将结合区域从芯片载体区域突出到芯片封装，从而提高了凸点式表面贴装技术的可靠性，级电子组装。此外，用于制造基板的载体在芯片封装程序期间是可回收的，以便降低生产成本。

8. 发明申请

US20100301365A1 LIGHT EMITTING DIODE MODULE AND MANUFACTURE METHOD THEREOF 审中-公开
标题翻译：发光二极管模块及其制造方法
公开(公告)号：US20100301365A1
公开(公告)日：2010-12-02
申请号：US12784729
申请日：2010-05-21
申请人： BILL CHUANG , CHI Chih LIN
发明人： BILL CHUANG , CHI Chih LIN
IPC分类号： H01L33/60 , H01L21/50
CPC分类号： F21V29/763 , F21K9/00 , F21V29/505 , F21V29/75 , H01L33/54 , H01L33/60 , H01L33/642 , H01L33/647 , H01L2224/48091 , H01L2933/0058 , H05K1/021 , H01L2924/00014
摘要： A manufacture method of light emitting diode (LED) module includes: providing a carrier board including a carrying area and a shaping area; arranging at least one substrate having at least one circuit layer in the carrying area of the carrier board; arranging at least one LED in the carrying area of the carrier board; electrically connecting the LED to the circuit layer of the substrate; encapsulating the LED and at least part of the circuit layer by at least one light transmissive encapsulation element; and fabricating the shaping area of the carrier board into a desired appearance. The above-mentioned carrier board not only can be a heat sink but also can be easily fabricated into various types of design shapes. Therefore, a light emitting diode module manufactured by the above-mentioned method has preferred heat dissipation effects and a better appearance with relatively low production costs.
摘要翻译：发光二极管（LED）模块的制造方法包括：提供包括承载区域和成形区域的承载板; 在载体板的承载区域中布置至少一个具有至少一个电路层的基板; 在承载板的承载区域中布置至少一个LED; 将LED电连接到基板的电路层; 通过至少一个光透射封装元件封装LED和电路层的至少一部分; 并将载体板的成形区域制成所需的外观。上述载板不仅可以是散热器，而且可以容易地制造成各种类型的设计形状。因此，通过上述方法制造的发光二极管模块具有优选的散热效果和更好的外观，生产成本相对较低。

9. 发明申请

US20090294952A1 CHIP PACKAGE CARRIER AND FABRICATION METHOD THEREOF 审中-公开
标题翻译：芯片包装载体及其制造方法
公开(公告)号：US20090294952A1
公开(公告)日：2009-12-03
申请号：US12128107
申请日：2008-05-28
申请人： Chi Chih Lin , Bo Sun , Hung Jen Wang , Jen Feng Tseng
发明人： Chi Chih Lin , Bo Sun , Hung Jen Wang , Jen Feng Tseng
IPC分类号： H01L23/04 , H01L21/02 , H01L21/44
CPC分类号： H01L23/3121 , H01L23/49811 , H01L23/49827 , H01L24/16 , H01L24/45 , H01L24/48 , H01L2224/05599 , H01L2224/13099 , H01L2224/16225 , H01L2224/16237 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/484 , H01L2224/73265 , H01L2224/85399 , H01L2224/85411 , H01L2224/85416 , H01L2224/85439 , H01L2224/85444 , H01L2224/85455 , H01L2224/85464 , H01L2924/00014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/181 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： The present invention discloses a chip package carrier and a fabrication method, which have the advantages of high reliability, thickness reduction and the scale reduction. The carrier and the method uses blind holes., which penetrates the substrate but external traces and external bonding pads, which cover the external traces. A chip can be installed and encapsulated directly on a first surface.
摘要翻译：本发明公开了一种芯片封装载体和制造方法，其具有可靠性高，厚度减小和刻度缩小的优点。载体和方法使用盲孔，其穿透基板，但外部迹线和外部接合焊盘覆盖外部迹线。芯片可以直接安装和封装在第一个表面上。

10. 发明申请

US20110316016A1 LED CHIP PACKAGE STRUCTURE 审中-公开
标题翻译： LED芯片包装结构
公开(公告)号：US20110316016A1
公开(公告)日：2011-12-29
申请号：US13111464
申请日：2011-05-19
申请人： Chi Chih LIN
发明人： Chi Chih LIN
IPC分类号： H01L33/38
CPC分类号： H01L25/0753 , H01L33/62 , H01L33/642 , H01L2224/45144 , H01L2224/48091 , H01L2224/73265 , H01L2924/00014 , H01L2924/00
摘要： An LED chip package structure includes a substrate; a first circuit pattern disposed on a surface of the substrate, wherein the first circuit pattern is divided into an electrical connection portion and a carrier portion; a second circuit pattern disposed on another surface of the substrate; a plurality of vias disposed in the substrate and connecting the first circuit pattern and the second circuit pattern, wherein the vias are filled with conductive material; and a plurality of LED chips disposed on the carrier portion of the substrate and electrically connected with the electrical connection portion. The vias filled with the conductive material are utilized to enhance heat dissipation of the substrate.
摘要翻译： LED芯片封装结构包括基板; 布置在所述基板的表面上的第一电路图案，其中所述第一电路图案被分成电连接部分和载体部分; 设置在所述基板的另一表面上的第二电路图案; 设置在所述基板中并连接所述第一电路图案和所述第二电路图案的多个通孔，其中所述通孔填充有导电材料; 以及设置在所述基板的所述承载部分上并与所述电连接部电连接的多个LED芯片。填充有导电材料的通孔用于增强基板的散热。

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