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1. 发明授权

US08122319B2 Page-based failure management for flash memory 有权
标题翻译：基于页面的闪存故障管理
公开(公告)号：US08122319B2
公开(公告)日：2012-02-21
申请号：US11657935
申请日：2007-01-24
申请人： Charles I. Peddle
发明人： Charles I. Peddle
IPC分类号： G11C29/00
CPC分类号： G11C29/88
摘要： A page-based failure management system for flash memory includes at least one flash memory device which includes at least one page and at least one operable page. The system also includes an indication of operability of the at least one page in the at least one flash device.
摘要翻译：用于闪存的基于页面的故障管理系统包括至少一个包括至少一个页面和至少一个可操作页面的闪存设备。该系统还包括至少一个闪光装置中的至少一个页面的可操作性的指示。

2. 发明申请

US20080177956A1 Page-based failure management for flash memory 有权
标题翻译：基于页面的闪存故障管理
公开(公告)号：US20080177956A1
公开(公告)日：2008-07-24
申请号：US11657935
申请日：2007-01-24
申请人： Charles I. Peddle
发明人： Charles I. Peddle
IPC分类号： G06F12/00
CPC分类号： G11C29/88
摘要： A page-based failure management system for flash memory includes at least one flash memory device which includes at least one page and at least one operable page. The system also includes an indication of operability of the at least one page in the at least one flash device.
摘要翻译：用于闪存的基于页面的故障管理系统包括至少一个包括至少一个页面和至少一个可操作页面的闪存设备。该系统还包括至少一个闪光装置中的至少一个页面的可操作性的指示。

3. 发明授权

US4006457A Logic circuitry for selection of dedicated registers 失效
标题翻译：用于选择专用寄存器的逻辑电路
公开(公告)号：US4006457A
公开(公告)日：1977-02-01
申请号：US550338
申请日：1975-02-18
申请人： Edward C. Hepworth , Rodney J. Means , Charles I. Peddle
发明人： Edward C. Hepworth , Rodney J. Means , Charles I. Peddle
IPC分类号： G06F15/78 , H04Q9/00 , G11C17/00 , H04L5/00
CPC分类号： G06F15/7864
摘要： An MOS (Metal-Oxide-Semiconductor) integrated circuit includes four dedicated registers thereon, two of which are "write only" registers having the capability of being written into, but not read from, by means of buffer circuitry for coupling a bidirectional data bus to the dedicated registers. The other two dedicated registers are "read only" registers having the capability of being read from, but not written into, by means of the buffer circuitry. The integrated circuit chip is itself addressable by means of a plurality of address conductors of an address bus coupleable to the integrated circuit chip, and the four dedicated registers within the integrated circuit chip are further addressable by means of an additional address conductor called a register select address line. A control input conductor is coupled to the integrated circuit chip and is used to control the direction of data flow of the buffer circuitry and is also used in conjunction with the register select address line to select one of four dedicated registers. This provides the advantage of reducing the number of external connections required for the integrated circuit chip, and is possible only because the registers are dedicated.
摘要翻译： MOS（金属氧化物半导体）集成电路包括四个专用寄存器，其中两个是“只写入”寄存器，其具有通过用于耦合双向数据总线的缓冲电路写入但不从其读取的能力到专用寄存器。另外两个专用寄存器是具有通过缓冲电路读取但不写入的能力的“只读”寄存器。集成电路芯片本身可通过可与集成电路芯片耦合的地址总线的多个地址导体来寻址，并且集成电路芯片内的四个专用寄存器可通过称为寄存器选择的附加地址指令进一步寻址地址栏。控制输入导体耦合到集成电路芯片，并用于控制缓冲电路的数据流动方向，并结合寄存器选择地址线选择四个专用寄存器之一。这提供了减少集成电路芯片所需的外部连接数量的优点，并且可能仅仅是因为寄存器是专用的。

4. 发明授权

US10204040B2 High speed flash controllers 有权
公开(公告)号：US10204040B2
公开(公告)日：2019-02-12
申请号：US15298074
申请日：2016-10-19
申请人： Charles I. Peddle
发明人： Charles I. Peddle
IPC分类号： G06F11/00 , G06F12/02 , G06F11/10 , G06F13/40 , G11C29/52 , G06F13/28 , G06F13/16 , G06F12/1081 , G06F13/42
摘要： A high speed USB memory controller includes a microprocessor, flash memory, memory buffers directly accessible to the microprocessor and flash memory, and a USB interface for writing data directly into the memory buffers. This allows devices with multiple flash die to operate at full bus speed.

5. 外观设计

USD520015S1 Cover for memory chips on a circuit board 失效
标题翻译：封装电路板上的存储芯片
公开(公告)号：USD520015S1
公开(公告)日：2006-05-02
申请号：US29168585
申请日：2002-10-04
申请人： Charles I. Peddle
设计人： Charles I. Peddle

6. 发明授权

US4833554A Hard disk drive module and receptacle therefor 失效
标题翻译：硬盘驱动器模块及插座
公开(公告)号：US4833554A
公开(公告)日：1989-05-23
申请号：US18499
申请日：1987-02-25
申请人： Warren L. Dalziel , Stephen L. Deremer , Michael T. Dugan , Charles D. Flanigan , Martin J. Maiers , David P. Moriconi , Charles I. Peddle , Peter Sehnal , Glenn M. Stark , Kenneth M. Stein , Sirjang L. Tandon , Robert G. Taylor, Jr. , Gary R. Yeakle
发明人： Warren L. Dalziel , Stephen L. Deremer , Michael T. Dugan , Charles D. Flanigan , Martin J. Maiers , David P. Moriconi , Charles I. Peddle , Peter Sehnal , Glenn M. Stark , Kenneth M. Stein , Sirjang L. Tandon , Robert G. Taylor, Jr. , Gary R. Yeakle
IPC分类号： G06F1/16 , G06F1/18 , G11B20060101 , G11B5/012 , G11B17/02 , G11B17/035 , G11B25/04 , G11B33/02 , G11B33/08 , G11B33/12 , H05K7/00
CPC分类号： G11B33/122 , G06F1/184 , G06F1/187 , G11B33/08 , G11B33/121 , G11B33/124
摘要： A portable hard disk drive module enclosing all of the operative components of the disk drive is removably received by a receptacle in a microcomputer system. The disk drive module and the receptacle each have an electrical connector and these connectors are coupled when the module is in an operating position within the receptacle. The connectors comprise the sole interface between the operative components of the disk drive and the remainder of the computer system. The receptacle includes a transport mechanism for moving the module from a load position to the operating position and from the operating position to a module unload position. Accordingly, movement of the module between these positions in the receptacle is completely under machine control.
摘要翻译：封闭磁盘驱动器的所有操作部件的便携式硬盘驱动器模块可移除地由微计算机系统中的插座接收。磁盘驱动器模块和插座各自具有电连接器，并且当模块处于容器内的操作位置时，这些连接器被联接。连接器包括磁盘驱动器的操作部件和计算机系统的其余部分之间的唯一接口。容器包括用于将模块从装载位置移动到操作位置并且从操作位置移动到模块卸载位置的传送机构。因此，模块在插座中的这些位置之间的移动完全在机器控制之下。

7. 发明授权

US4020472A Master slave registers for interface adaptor 失效
标题翻译：接口适配器的主从寄存器
公开(公告)号：US4020472A
公开(公告)日：1977-04-26
申请号：US614114
申请日：1975-09-17
申请人： Thomas H. Bennett , Earl F. Carlow , Edward C. Hepworth , Wilbur L. Mathys , William D. Mensch, Jr. , Rodney H. Orgill , Charles I. Peddle , Michael F. Wiles
发明人： Thomas H. Bennett , Earl F. Carlow , Edward C. Hepworth , Wilbur L. Mathys , William D. Mensch, Jr. , Rodney H. Orgill , Charles I. Peddle , Michael F. Wiles
IPC分类号： G06F13/24 , G06F13/38 , G06F3/00
CPC分类号： G06F13/38 , G06F13/24
摘要： An interface adaptor suitable for use in a microprocessor system includes an input register coupled to a bidirectional data bus of the microprocessor system. The interface adaptor includes a plurality of registers, including a control register and a data register, coupled to the input register by means of an internal input bus. Each of the plurality of registers includes flip-flops which are coupled as slave flip-flops to corresponding flip-flops of the input register. The corresponding flip-flops of the input register function as master flip-flops. The interface adaptor also includes register selection logic circuitry for selecting one of the plurality of registers by electrically coupling its slave flip-flop to the corresponding master flip-flops of the input register.
摘要翻译：适用于微处理器系统的接口适配器包括耦合到微处理器系统的双向数据总线的输入寄存器。接口适配器包括多个寄存器，包括通过内部输入总线耦合到输入寄存器的控制寄存器和数据寄存器。多个寄存器中的每一个包括作为从触发器耦合到输入寄存器的相应触发器的触发器。输入寄存器的相应触发器用作主触发器。接口适配器还包括寄存器选择逻辑电路，用于通过将其从触发器电耦合到输入寄存器的相应主触发器来选择多个寄存器中的一个。

8. 发明授权

US4087855A Valid memory address enable system for a microprocessor system 失效
标题翻译：微处理器系统的有效存储器地址使能系统
公开(公告)号：US4087855A
公开(公告)日：1978-05-02
申请号：US614109
申请日：1975-09-17
申请人： Thomas H. Bennett , Earl F. Carlow , Edward C. Hepworth , Wilbur L. Mathys , William D. Mensch, Jr. , Rodney H. Orgill , Charles I. Peddle , Michael F. Wiles
发明人： Thomas H. Bennett , Earl F. Carlow , Edward C. Hepworth , Wilbur L. Mathys , William D. Mensch, Jr. , Rodney H. Orgill , Charles I. Peddle , Michael F. Wiles
IPC分类号： G06F9/30 , G06F13/24 , G06F13/38 , G06F15/78 , H04L25/30 , G06F3/00 , G06F13/00
CPC分类号： G06F13/24 , G06F13/38
摘要： A digital system includes a microprocessor coupled to a data bus and an address bus. A memory for storing data and instructions is connected to the data bus and the address bus. A peripheral device is connected to an interface adaptor. The interface adaptor is connected to the data bus and the address bus, and performs the function of interfacing between the digital system and a peripheral device, such as a printer or a display device. The microprocessor includes logic circuitry for generating a Valid Memory Address (VMA) output. The VMA output is used to generate an enable signal applied to the memory and the adaptor to enable the memory and the adaptor to be accessed by the microprocessor when the binary address on the address bus is valid and to prevent the memory and the adaptor from being accessed by the microprocessor when the binary address on the address bus is not valid with respect to the microprocessor.
摘要翻译：数字系统包括耦合到数据总线和地址总线的微处理器。用于存储数据和指令的存储器连接到数据总线和地址总线。外围设备连接到接口适配器。接口适配器连接到数据总线和地址总线，并执行数字系统与外围设备（如打印机或显示设备）之间的接口功能。微处理器包括用于产生有效存储器地址（VMA）输出的逻辑电路。当地址总线上的二进制地址有效时，VMA输出用于产生施加到存储器和适配器的使能信号，以使存储器和适配器由微处理器访问，并防止存储器和适配器成为当地址总线上的二进制地址对微处理器无效时由微处理器访问。

9. 发明授权

US5016121A Disk drive controller system 失效
标题翻译：磁盘驱动器控制器系统
公开(公告)号：US5016121A
公开(公告)日：1991-05-14
申请号：US162948
申请日：1988-02-25
申请人： Charles I. Peddle , Robert G. Taylor, Jr. , John R. Masters , Glenn M. Stark , Kenneth M. Stein , James M. Donohue , Michael T. Dugan , William G. Swinton , Bruce A. Fairman , Warren L. Dalziel
发明人： Charles I. Peddle , Robert G. Taylor, Jr. , John R. Masters , Glenn M. Stark , Kenneth M. Stein , James M. Donohue , Michael T. Dugan , William G. Swinton , Bruce A. Fairman , Warren L. Dalziel
IPC分类号： G06F3/06 , G11B19/00 , G11B20/10
CPC分类号： G06F3/0601 , G11B19/00 , G11B20/10 , G06F2003/0692
摘要： A disk drive system includes a disk controller system having separate head positioning and data transfer subsystems and supporting up to four disk drives, two of which may be removable, portable drive units and two of which may connect through a standard ST506 interface. The removable disk drives incorporate a read and write protected data cylinder for storing information such as the maintenance history of the drive, and a read only cylinder for storing a unique serial number as well as other write protected data. The system also features a high capacity, high speed sector buffer which allows continuous transfers of data to or from noninterleaved sectors and supports concurrent disk and system accesses.
摘要翻译：磁盘驱动器系统包括具有单独的磁头定位和数据传输子系统的磁盘控制器系统，并且支持多达四个磁盘驱动器，其中两个可以是可移动的便携式驱动单元，其中两个可以通过标准ST506接口连接。可移动磁盘驱动器包含用于存储诸如驱动器的维护历史的信息的读写保护数据气缸，以及用于存储唯一序列号以及其它写保护数据的只读磁盘。该系统还具有高容量，高速扇区缓冲器，允许将数据连续传输到非交织扇区，并支持并发磁盘和系统访问。

10. 发明授权

US4263650A Digital data processing system with interface adaptor having programmable, monitorable control register therein 失效
标题翻译：具有接口适配器的数字数据处理系统，其中具有可编程的，可监控的控制寄存器
公开(公告)号：US4263650A
公开(公告)日：1981-04-21
申请号：US7752
申请日：1979-01-30
申请人： Thomas H. Bennett , Earl F. Carlow , Edward C. Hepworth , Wilbur L. Mathys , William D. Mensch, Jr. , Rodney H. Orgill , Charles I. Peddle , Michael F. Wiles
发明人： Thomas H. Bennett , Earl F. Carlow , Edward C. Hepworth , Wilbur L. Mathys , William D. Mensch, Jr. , Rodney H. Orgill , Charles I. Peddle , Michael F. Wiles
IPC分类号： G06F13/24 , G06F13/38 , G06F3/04 , G06F9/00 , G06F13/00
CPC分类号： G06F13/24 , G06F13/38
摘要： A digital system including a plurality of metal-oxide-semiconductor (MOS) chip random access memories (RAM), read only memories (ROM) and peripheral interface adaptors coupled to a common bidirectional data bus which is coupled to and controlled by a microprocessor unit (MPU). Each peripheral interface adaptor includes a control register loadable under program control. The contents of the control register control selection of several registers within the interface adaptor. The control register also controls other functions of the peripheral interface adaptor, including determining direction of data movement at the peripheral buffers of the interface adaptor. The contents of the control register of each interface adaptor are monitorable by the microprocessor unit.
摘要翻译：一种数字系统，包括多个金属氧化物半导体（MOS）芯片随机存取存储器（RAM），只读存储器（ROM）和耦合到公共双向数据总线的外围接口适配器，该公共双向数据总线耦合到微处理器单元（MPU）。每个外设接口适配器都包含一个可在程序控制下加载的控制寄存器。控制寄存器的内容控制接口适配器内几个寄存器的选择。控制寄存器还控制外围接口适配器的其他功能，包括确定接口适配器外围缓冲区中数据移动的方向。每个接口适配器的控制寄存器的内容可由微处理器单元监视。

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