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    • 4. 发明申请
    • METHOD FOR GENERATING DOWNLINK FRAME, AND METHOD FOR SEARCHING CELL
    • 用于生成下行链路帧的方法,以及用于搜索小区的方法
    • US20090252335A1
    • 2009-10-08
    • US12488272
    • 2009-06-19
    • Kap Seok CHANGIl Gyu KIMHyeong Geun PARKYoung Jo KOHyo Seok YIChan Bok JEONGYoung Hoon KIMSeung Chan BANG
    • Kap Seok CHANGIl Gyu KIMHyeong Geun PARKYoung Jo KOHyo Seok YIChan Bok JEONGYoung Hoon KIMSeung Chan BANG
    • H04K1/04
    • H04W48/16H04B1/70735H04B7/2656H04J11/0069H04L7/043H04L27/2613H04L27/2655H04W56/00H04W72/042H04W72/0446H04W88/08
    • The present invention relates to a method of generating a downlink frame. The method of generating the downlink frame includes: generating a first short sequence and a second short sequence indicating cell group information; generating a first scrambling sequence and a second scrambling sequence determined by the primary synchronization signal; generating a third scrambling sequence determined by the first short sequence and a fourth scrambling sequence determined by the second short sequence; scrambling the first short sequence with the first scrambling sequence and scrambling the second short sequence with the second scrambling sequence and the third scrambling sequence; scrambling the second short sequence with the first scrambling sequence and scrambling the first short sequence with the second scrambling sequence and the fourth scrambling sequence; and mapping the secondary synchronization signal that includes the first short sequence scrambled with the first scrambling sequence, the second short sequence scrambled with the second scrambling sequence and the third scrambling sequence, the second short sequence scrambled with the first scrambling sequence and the first short sequence scrambled by the second scrambling sequence and the fourth scrambling sequence to a frequency domain.
    • 本发明涉及一种生成下行链路帧的方法。 产生下行链路帧的方法包括:产生指示小区组信息的第一短序列和第二短序列; 产生由所述主同步信号确定的第一加扰序列和第二加扰序列; 产生由第一短序列确定的第三加扰序列和由第二短序列确定的第四加扰序列; 用第一加扰序列对第一短序列进行加扰,并用第二加扰序列和第三加扰序列加扰第二短序列; 用第一加扰序列对第二短序列进行加扰,并用第二加扰序列和第四加扰序列对第一短序列进行加扰; 以及映射包括与第一加扰序列加扰的第一短序列的第二同步信号,用第二加扰序列和第三加扰序列加扰的第二短序列,用第一加扰序列和第一短序列加扰的第二短序列 通过第二加扰序列和第四加扰序列加扰到频域。
    • 10. 发明申请
    • APPARATUS AND METHOD FOR GENERATING MULTIPLE OUTPUT SEQUENCE
    • 用于生成多个输出序列的装置和方法
    • US20130003979A1
    • 2013-01-03
    • US13456053
    • 2012-04-25
    • Chan Bok JEONGDae Ho KIM
    • Chan Bok JEONGDae Ho KIM
    • H04K1/04
    • G06F7/584H04J13/10H04J2211/005
    • Provided are an apparatus and method for generating a multiple output sequence. The apparatus includes an update unit configured to update a first shift register having k stages by inputting a value to the first shift register at every clock, a transfer unit configured to simultaneously transfer, at every clock, output values output from the first shift register to k stages of a second shift register respectively and output values output from k stages of the second shift register to k stages of a third shift register having the k stages respectively, and a multiple output generator configured to generate a multiple output sequence by outputting values of the k stages of the third shift register at every clock.
    • 提供了一种用于生成多输出序列的装置和方法。 该装置包括:更新单元,被配置为通过在每个时钟向第一移位寄存器输入值来更新具有k个级的第一移位寄存器;传送单元,被配置为在每个时钟同时传送从第一移位寄存器输出的输出值 k级和第二移位寄存器的k级输出值分别输出到具有k级的第三移位寄存器的k级,以及多输出发生器,被配置为通过输出多个输出序列的值, 每个时钟的第三个移位寄存器的k个级。