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1. 发明授权

US07679958B2 Nonvolatile memory device and method for fabricating the same 失效
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US07679958B2
公开(公告)日：2010-03-16
申请号：US11824157
申请日：2007-06-29
申请人： Byong-Kook Kim
发明人： Byong-Kook Kim
IPC分类号： G11C11/34 , H01L21/336
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A nonvolatile memory device includes a plurality of strings each of which is configured with a first select transistor, a second select transistor, and a plurality of memory cells connected in series between the first and second select transistors. A common source line is connected to a source of the second select transistor. A metal interconnection is electrically insulated from the common source line, and connected to the source of the second select transistor.
摘要翻译：非易失性存储器件包括多个串，每个串配置有第一选择晶体管，第二选择晶体管和串联连接在第一和第二选择晶体管之间的多个存储单元。公共源极线连接到第二选择晶体管的源极。金属互连与公共源极线电绝缘，并连接到第二选择晶体管的源极。

2. 发明申请

US20080158944A1 Nonvolatile memory device and method for fabricating the same 失效
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20080158944A1
公开(公告)日：2008-07-03
申请号：US11824157
申请日：2007-06-29
申请人： Byong-Kook Kim
发明人： Byong-Kook Kim
IPC分类号： G11C11/34 , H01L21/336
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A nonvolatile memory device includes a plurality of strings each of which is configured with a first select transistor, a second select transistor, and a plurality of memory cells connected in series between the first and second select transistors. A common source line is connected to a source of the second select transistor. A metal interconnection is electrically insulated from the common source line, and connected to the source of the second select transistor.
摘要翻译：非易失性存储器件包括多个串，每个串配置有第一选择晶体管，第二选择晶体管和串联连接在第一和第二选择晶体管之间的多个存储单元。公共源极线连接到第二选择晶体管的源极。金属互连与公共源极线电绝缘，并连接到第二选择晶体管的源极。

3. 发明申请

US20120294087A1 PROGRAM METHOD OF NONVOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储器件的程序方法
公开(公告)号：US20120294087A1
公开(公告)日：2012-11-22
申请号：US13238731
申请日：2011-09-21
申请人： Ji-Hyun SEO , Byong-Kook KIM , Sung-Jae CHUNG
发明人： Ji-Hyun SEO , Byong-Kook KIM , Sung-Jae CHUNG
IPC分类号： G11C16/10
CPC分类号： G11C16/10 , G11C16/0483
摘要： A program method of a nonvolatile memory device includes applying a program voltage to a selected word line, applying a first pass voltage to at least one word line adjacent to the selected word line, applying at least one first middle voltage lower than the first pass voltage but higher than an isolation voltage to at least one word line adjacent to the word line receiving the first pass voltage, applying the isolation voltage to a word line adjacent to the word line receiving the first middle voltage, applying at least one second middle voltage higher than the isolation voltage but lower than a second pass voltage to at least one word line adjacent to the word line receiving the isolation voltage, and applying a second pass voltage to at least one word line adjacent to the word line receiving the second middle voltage.
摘要翻译：一种非易失性存储装置的编程方法包括对所选择的字线施加编程电压，向与所选字线相邻的至少一个字线施加第一通过电压，施加低于第一通过电压的至少一个第一中间电压但是高于与接收第一通过电压的字线相邻的至少一个字线的隔离电压，将隔离电压施加到与接收第一中间电压的字线相邻的字线，施加至少一个第二中间电压比对接收到隔离电压的字线相邻的至少一个字线低的第二通过电压，但是对接收到第二中间电压的字线的至少一个字线施加第二通过电压。

4. 发明授权

US07869278B2 Nonvolatile memory device and method for fabricating the same 失效
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US07869278B2
公开(公告)日：2011-01-11
申请号：US12695390
申请日：2010-01-28
申请人： Byong-Kook Kim
发明人： Byong-Kook Kim
IPC分类号： G11C16/04
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A nonvolatile memory device includes a plurality of strings each of which is configured with a first select transistor, a second select transistor, and a plurality of memory cells connected in series between the first and second select transistors. A common source line is connected to a source of the second select transistor. A metal interconnection is electrically insulated from the common source line, and connected to the source of the second select transistor.
摘要翻译：非易失性存储器件包括多个串，每个串配置有第一选择晶体管，第二选择晶体管和串联连接在第一和第二选择晶体管之间的多个存储单元。公共源极线连接到第二选择晶体管的源极。金属互连与公共源极线电绝缘，并连接到第二选择晶体管的源极。

5. 发明申请

US20100128533A1 NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME 失效
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20100128533A1
公开(公告)日：2010-05-27
申请号：US12695390
申请日：2010-01-28
申请人： Byong-Kook KIM
发明人： Byong-Kook KIM
IPC分类号： G11C16/04 , G11C11/34
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A nonvolatile memory device includes a plurality of strings each of which is configured with a first select transistor, a second select transistor, and a plurality of memory cells connected in series between the first and second select transistors. A common source line is connected to a source of the second select transistor. A metal interconnection is electrically insulated from the common source line, and connected to the source of the second select transistor.
摘要翻译：非易失性存储器件包括多个串，每个串配置有第一选择晶体管，第二选择晶体管和串联连接在第一和第二选择晶体管之间的多个存储单元。公共源极线连接到第二选择晶体管的源极。金属互连与公共源极线电绝缘，并连接到第二选择晶体管的源极。

6. 发明授权

US08520438B2 Program method of nonvolatile memory device 有权
标题翻译：非易失性存储器件的编程方法
公开(公告)号：US08520438B2
公开(公告)日：2013-08-27
申请号：US13238731
申请日：2011-09-21
申请人： Ji-Hyun Seo , Byong-Kook Kim , Sung-Jae Chung
发明人： Ji-Hyun Seo , Byong-Kook Kim , Sung-Jae Chung
IPC分类号： G11C11/34
CPC分类号： G11C16/10 , G11C16/0483
摘要： A program method of a nonvolatile memory device includes applying a program voltage to a selected word line, applying a first pass voltage to at least one word line adjacent to the selected word line, applying at least one first middle voltage lower than the first pass voltage but higher than an isolation voltage to at least one word line adjacent to the word line receiving the first pass voltage, applying the isolation voltage to a word line adjacent to the word line receiving the first middle voltage, applying at least one second middle voltage higher than the isolation voltage but lower than a second pass voltage to at least one word line adjacent to the word line receiving the isolation voltage, and applying a second pass voltage to at least one word line adjacent to the word line receiving the second middle voltage.
摘要翻译：一种非易失性存储装置的编程方法包括对所选择的字线施加编程电压，向与所选字线相邻的至少一个字线施加第一通过电压，施加低于第一通过电压的至少一个第一中间电压但是高于与接收第一通过电压的字线相邻的至少一个字线的隔离电压，将隔离电压施加到与接收第一中间电压的字线相邻的字线，施加至少一个第二中间电压比对接收到隔离电压的字线相邻的至少一个字线低的第二通过电压，但是对接收到第二中间电压的字线的至少一个字线施加第二通过电压。

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