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1. 发明授权

US06351819B1 Heterogeneous system enclosure services connection 有权
标题翻译：异构系统机箱服务连接
公开(公告)号：US06351819B1
公开(公告)日：2002-02-26
申请号：US09267778
申请日：1999-03-15
申请人： Neil Clair Berglund , Ronald Leroy Billau , David Lee Dosch , Brian Gerard Holthaus , Thomas James Osten , Frederick Joseph Ziecina
发明人： Neil Clair Berglund , Ronald Leroy Billau , David Lee Dosch , Brian Gerard Holthaus , Thomas James Osten , Frederick Joseph Ziecina
IPC分类号： G06F126
CPC分类号： H04L41/00 , G06F1/26
摘要： An adapter node is provided for use in adapting internal system enclosure services to a system power control network to thereby provide remote power control, diagnostics, and logical-to-physical correlation information, through the system power control network. The adapter node is for use in one computer of a plurality of different types of computers, having a respective internal system enclosure services low-level communication path. The power control network has a plurality of nodes, one of the nodes being a control node. The adapter node includes a substrate having electrical contacts adapted to plug to a system bus in the one computer. The substrate further has at least one system enclosure services interface connection to connect to the internal system enclosure services low-level communication path in the one computer. The adapter node further has a system power control network interface connection for connecting to the system power control network. A processor of the adapter node is provided for coordinating communication with the system power control network and with internal devices on the internal system enclosure services low-level communications path. Power control, diagnostics, and logical-to-physical correlation information signals are communicated between the system power control system control node and the adapter node to provide system enclosure services support to the one computer of the plurality of different types of computers.
摘要翻译：提供适配器节点，用于将内部系统机箱服务适配到系统功率控制网络，从而通过系统功率控制网络提供远程功率控制，诊断和逻辑到物理相关信息。适配器节点用于多个不同类型的计算机的一台计算机，具有相应的内部系统机箱服务低级通信路径。功率控制网络具有多个节点，其中一个节点是控制节点。适配器节点包括具有适于在一台计算机中插入系统总线的电触点的基板。基板还具有至少一个系统机箱服务接口连接，以连接到一个计算机中的内部系统机箱服务低级通信路径。适配器节点还具有用于连接到系统功率控制网络的系统功率控制网络接口连接。适配器节点的处理器被提供用于协调与系统功率控制网络的通信以及内部系统机箱上的内部设备服务低级通信路径。功率控制，诊断和逻辑到物理相关信息信号在系统功率控制系统控制节点和适配器节点之间通信，以向多个不同类型的计算机中的一个计算机提供系统机箱服务支持。

2. 发明授权

US06721839B1 Method of mapping multiple address spaces into single PCI bus 失效
标题翻译：将多个地址空间映射到单个PCI总线的方法
公开(公告)号：US06721839B1
公开(公告)日：2004-04-13
申请号：US09748983
申请日：2000-12-27
申请人： Ellen Marie Bauman , David Lee Dosch , Charles Scott Graham , Brian Gerard Holthaus , Daniel Robert Lipps , Daniel Frank Moertl , Paul Edward Movall , Daniel Paul Wetzel
发明人： Ellen Marie Bauman , David Lee Dosch , Charles Scott Graham , Brian Gerard Holthaus , Daniel Robert Lipps , Daniel Frank Moertl , Paul Edward Movall , Daniel Paul Wetzel
IPC分类号： G06F1300
CPC分类号： G06F13/404
摘要： A method and apparatus are provided for mapping multiple address spaces into a single bus, such as a single peripheral component interconnect (PCI) bus. The single bus is coupled to a first processor complex and a second processor complex. An original address of a memory access is shifted to a unique address space for each originator/target of an operation. The shifted address is used on the single bus. Then the shifted address is shifted back to the original address for completing the operation on a destination bus. The original address of a memory access is shifted to a unique address space for each originator/target of an operation using a respective predefined value (+X1, +X2, or +X3) for shifting the original address above a predefined boundary for each originator/target of the operation. Shifting back the shifted address to the original address for completing the operation on the destination bus uses a respective predefined value (−X1, −X2, or −X3) for the shifted back address to the original address for completing the operation on the destination bus. Using the shifted address on the single bus utilizes a dual address cycle (DAC) of the single bus for the shifted address. Completing the operation on a destination bus utilizes a single address cycle (SAC) of the destination bus for the shifted back address to the original address.
摘要翻译：提供了一种用于将多个地址空间映射到单个总线（诸如单个外围组件互连（PCI）总线）的方法和装置。单总线耦合到第一处理器复合体和第二处理器复合体。存储器访问的原始地址被移动到操作的每个发起者/目标的唯一地址空间。移位的地址用于单总线。然后将移位的地址移回原始地址，以完成目标总线上的操作。使用相应的预定义值（+ X1，+ X2或+ X3）将存储器访问的原始地址移动到每个发起者/目标的唯一地址空间，用于将原始地址移动到每个发起者的预定边界之上 /目标的操作。将移动的地址移动到原始地址以完成目的地总线上的操作，将移位后地址的相应预定义值（-X1，-X2或-X3）用于原始地址，以完成目标总线上的操作。使用单总线上的移位地址，可以使用单总线的双地址周期（DAC）作为移位地址。在目的地总线上完成操作将目的地总线的单个地址周期（SAC）用于移位后地址到原始地址。

3. 发明申请

US20090327562A1 Implementing Bus Interface Calibration for Enhanced Bus Interface Initialization Time 审中-公开
标题翻译：实现总线接口校准，增强总线接口初始化时间
公开(公告)号：US20090327562A1
公开(公告)日：2009-12-31
申请号：US12145761
申请日：2008-06-25
申请人： Mark David Bellows , Brian Patrick Burgess , John Dennis Folkerts , Roger John Gravrok , Brian Gerard Holthaus , Murali N. Iyer , Christopher James Martin , Timothy Gerald Robeck , Dennis J. Spathis
发明人： Mark David Bellows , Brian Patrick Burgess , John Dennis Folkerts , Roger John Gravrok , Brian Gerard Holthaus , Murali N. Iyer , Christopher James Martin , Timothy Gerald Robeck , Dennis J. Spathis
IPC分类号： G06F13/00
CPC分类号： G06F13/4022
摘要： A method and apparatus are provided for implementing bus interface calibration to improve bus interface initialization time in a system. Bus interface calibration is performed and average calibration values are saved. At bus interface initialization time, checking for saved calibration values is performed. The saved calibration values are used and tested. When the saved calibration values pass the test, then the saved calibration values are used for system operation without performing any training steps.
摘要翻译：提供了一种用于实现总线接口校准以改善系统中的总线接口初始化时间的方法和装置。执行总线接口校准，并保存平均校准值。在总线接口初始化时，执行保存的校准值的检查。保存的校准值被使用和测试。当保存的校准值通过测试时，保存的校准值用于系统操作，而不执行任何训练步骤。

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