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1. 发明申请

US20050068815A1 ACCELERATED LIFE TEST OF MRAM CELLS 失效
标题翻译： MRAM细胞的加速寿命测试
公开(公告)号：US20050068815A1
公开(公告)日：2005-03-31
申请号：US10672959
申请日：2003-09-26
申请人： Bradley Garni , Thomas Andre , Joseph Nahas
发明人： Bradley Garni , Thomas Andre , Joseph Nahas
IPC分类号： G11C11/15 , G11C29/50 , G11C7/00 , G11C29/00
CPC分类号： G11C29/50 , G11C11/16 , G11C2029/5002
摘要： A circuit provides a stress voltage to magnetic tunnel junctions (MTJs), which comprise the storage elements of a magnetoresitive random access memory (MRAM), during an accelerated life test of the MRAM. The stress voltage is selected to provide a predetermined acceleration of aging compared to normal operation. A source follower circuit is used to apply a stress voltage to a subset of the memory cells at given point in time during the life test. The stress voltage is maintained at the desired voltage by a circuit that mocks the loading characteristics of the portion of the memory array being stressed. The result is a closely defined voltage applied to the MTJs so that the magnitude of the acceleration is well defined for all of the memory cells.
摘要翻译：在MRAM的加速寿命测试期间，电路向包括磁阻随机存取存储器（MRAM）的存储元件的磁隧道结（MTJ）提供应力电压。选择应力电压以提供与正常操作相比预定的老化加速度。源极跟随器电路用于在寿命测试期间的给定时间点将应力电压施加到存储器单元的子集。应力电压通过嘲笑存储器阵列部分的负载特性受到应力的电路保持在所需电压。结果是施加到MTJ的紧密定义的电压，使得对于所有存储器单元良好地限定加速度的大小。

2. 发明申请

US20060062066A1 MRAM SENSE AMPLIFIER HAVING A PRECHARGE CIRCUIT AND METHOD FOR SENSING 有权
标题翻译：具有预置电路的MRAM感测放大器和感测方法
公开(公告)号：US20060062066A1
公开(公告)日：2006-03-23
申请号：US10943579
申请日：2004-09-17
申请人： Bradley Garni
发明人： Bradley Garni
IPC分类号： G11C7/02
CPC分类号： G11C7/062 , G11C11/16
摘要： A sense amplifier (11) and method for sensing a MRAM cell (77) is provided. The sense amplifier (11) includes a precharge circuit (13′) having an operational amplifier (40, 42) that uses a voltage divider (115, 116) in a feedback path to control the amount of charge stored on a capacitor (104, 105). During a precharge portion of a read operation, the charge stored on the capacitor (104, 105) is used to precharge the sense amplifier (11). By using charge sharing to precharge the sense amplifier (11), the sense amplifier (11) can be precharged to a steady state common mode voltage more quickly, thus decreasing time required for a read operation.
摘要翻译：提供了一种用于感测MRAM单元（77）的读出放大器（11）和方法。读出放大器（11）包括具有运算放大器（40,42）的预充电电路（13'），该运算放大器使用反馈路径中的分压器（115,116）来控制存储在电容器（104）上的电荷量 105）。在读取操作的预充电部分期间，存储在电容器（104,105）上的电荷用于对读出放大器（11）进行预充电。通过使用电荷共享对读出放大器（11）进行预充电，读出放大器（11）可以更快地预充电到稳态共模电压，从而减少读操作所需的时间。

3. 发明申请

US20050152183A1 MRAM architecture with electrically isolated read and write circuitry 有权
公开(公告)号：US20050152183A1
公开(公告)日：2005-07-14
申请号：US11076523
申请日：2005-03-09
申请人： Joseph Nahas , Thomas Andre , Chitra Subramanian , Bradley Garni , Mark Durlam
发明人： Joseph Nahas , Thomas Andre , Chitra Subramanian , Bradley Garni , Mark Durlam
IPC分类号： G11C11/16 , G11C11/14
CPC分类号： G11C11/16
摘要： A magnetoresistive random access memory (MRAM) has separate read and write paths. This reduces the peripheral circuitry by not requiring switching between read and write functions on a particular line. By having the paths dedicated to either read signals or write signals, the voltage levels can be optimized for these functions. The select transistors, which are part of only the read function, may be of the low-voltage type because they do not have to receive the relatively higher voltages of the write circuitry. Similarly, the write voltages do not have to be degraded to accommodate the lower-voltage type transistors. The size of the overall memory is kept efficiently small while improving performance. The memory cells are grouped so that adjacent to groups are coupled to a common global bit line which reduces the space required for providing the capacitance-reducing group approach to memory cell selection.

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