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1. 发明授权

US07170346B2 Arrangement for reducing non-linear distortions in an output signal of an amplifier stage 有权
标题翻译：用于减小放大器级的输出信号中的非线性失真的装置
公开(公告)号：US07170346B2
公开(公告)日：2007-01-30
申请号：US10507849
申请日：2003-02-27
申请人： Björn Jelonnek , Armin Splett
发明人： Björn Jelonnek , Armin Splett
IPC分类号： H03F1/00 , H03F1/26
CPC分类号： H03F1/3229
摘要： A system reduces non-linear distortions in an output signal of an amplifier stage that is configured according to the feed forward principle. An amplifier stage input signal arrives at a main branch of an amplifier. The output signal of the amplifier, which is distorted in a non-linear manner, arrives at an adder. An output of the adder forms the amplifier stage output signal. The output signal which is distorted in a non-linear manner and the amplifier stage input signal are fed to a secondary branch that comprises an error signal device. The error signal device generates an error signal from the delayed amplifier stage input signal and the output signal of the amplifier, which is distorted in a non-linear manner. The error signal is fed to the adder in order to reduce distortions in the amplifier stage output signal. The error signal device comprises at least one transmission device that is provided with a negative group delay time.
摘要翻译：一种系统减少了根据前馈原理配置的放大器级的输出信号中的非线性失真。放大器级输入信号到达放大器的主分支。以非线性方式失真的放大器的输出信号到达加法器。加法器的输出形成放大器级输出信号。以非线性方式失真的输出信号和放大器级输入信号被馈送到包括误差信号装置的次级分支。误差信号装置从延迟的放大器级输入信号和放大器的输出信号产生误差信号，其以非线性方式失真。误差信号被馈送到加法器，以便减小放大器级输出信号中的失真。误差信号装置包括具有负组延迟时间的至少一个传输装置。

2. 发明授权

US07015843B2 Sigma-delta converter with noise suppression 有权
标题翻译：具有噪声抑制的Σ-Δ转换器
公开(公告)号：US07015843B2
公开(公告)日：2006-03-21
申请号：US10499519
申请日：2002-12-19
申请人： Björn Jelonnek
发明人： Björn Jelonnek
IPC分类号： H03M3/00
CPC分类号： H03M3/50 , H03M7/3022
摘要： A digital input signal passes through a principal path, containing at least one sigma-delta modulator having a transmission function and a digital-to-analog converter, and at least one parallel path, connected in parallel to the principal path and having at least one sigma-delta modulator and a digital-to-analog converter. The sigma-delta converter produces an analog output signal by summing the analog output signals of the principal and parallel paths. A differential signal from which at least the noise outside a useful band has been filtered is obtained from the digital output signal of the sigma-delta modulator of the principal path and the input signal that has been spectrally formed by a filter, according to the transmission function of the sigma-delta modulator in the principal path. This differential signal is supplied as the input signal to the sigma-delta modulator in the parallel path(s).
摘要翻译：数字输入信号通过主路径，其包含至少一个具有传输功能的Σ-Δ调制器和数模转换器，以及至少一个并行路径，并行连接到主路径，并具有至少一个 Σ-Δ调制器和数模转换器。 Σ-Δ转换器通过对主和并行路径的模拟输出信号求和来产生模拟输出信号。从主路径的Σ-Δ调制器的数字输出信号和由滤波器形成的输入信号，根据传输，从有用频带以外的至少噪声已被滤波的差分信号被获得主要路径中的Σ-Δ调制器的功能。该差分信号作为输入信号提供给并行路径中的Σ-Δ调制器。

3. 发明授权

US07386078B2 Adaptive filtering method and filter for filtering a radio signal in a mobile radio-communication system 有权
标题翻译：用于在移动无线电通信系统中过滤无线电信号的自适应滤波方法和滤波器
公开(公告)号：US07386078B2
公开(公告)日：2008-06-10
申请号：US10487432
申请日：2002-08-19
申请人： Hans Dieterich , Björn Jelonnek
发明人： Hans Dieterich , Björn Jelonnek
IPC分类号： H04B1/10
CPC分类号： H04B1/1036
摘要： A radio signal in a radio communication system may be filtered to prepare an EDGE-signal. In this case, the signal-to-noise-ratios are calculated according to a first operation in addition to previously known methods for detecting a neighboring channel interference. In addition, other variously tuned filters are activated when a corresponding threshold is reached, where the thresholds are associated with correspondingly intense interferences from neighboring channel influences. A filtering method or filter module can be mounted in an existing station behind an existing receiving filter. In the first filtering operation, the previous filter effect is reduced to the smallest amount possible before new filtering is carried out to produce a desired signal. The EDGE signals can also be produced in a simple manner from GMSK signals.
摘要翻译：可以对无线电通信系统中的无线电信号进行滤波以准备EDGE信号。在这种情况下，除了以前已知的用于检测相邻信道干扰的方法之外，根据第一操作来计算信噪比。此外，当达到相应的阈值时，其他各种调谐的滤波器被激活，其中阈值与来自相邻信道影响的相应强烈的干扰相关联。过滤方法或过滤器模块可以安装在现有接收过滤器后面的现有站中。在第一滤波操作中，在执行新的滤波以产生期望的信号之前，先前的滤波效应被减小到可能的最小量。 EDGE信号也可以以简单的方式从GMSK信号中产生。

4. 发明授权

US07249008B2 Arrangement for runtime compensation of a runtime difference arising through emulation of a high frequency signal 有权
标题翻译：通过仿真高频信号产生的运行时间差异的运行时间补偿的布置
公开(公告)号：US07249008B2
公开(公告)日：2007-07-24
申请号：US10470413
申请日：2002-01-23
申请人： Björn Jelonnek , Armin Splett
发明人： Björn Jelonnek , Armin Splett
IPC分类号： G06F7/60 , G06F17/10 , G06F9/455 , H03C3/00 , H04L27/12 , H03K7/06
CPC分类号： H03M3/37 , H03M3/414
摘要： An arrangement for runtime compensation of a runtime difference, arising through emulation of a high frequency signal, is disclosed, with a signal x(t), for emulation by a signal processing device, which emulates the signal x(t) with a signal x(t) and a device for determining a difference signal between the signals x(t) and x(t). The arrangement is characterized in that the emulated signal x(t) is conducted via filter with a negative group runtime for certain frequency ranges.
摘要翻译：公开了一种用于通过仿真高频信号产生的运行时间差的运行时间补偿的装置，其中信号x（t）用于由信号处理装置进行仿真，信号x（t）用信号x （t）和用于确定信号x（t）和x（t）之间的差信号的装置。该装置的特征在于，对于某些频率范围，仿真信号x（t）通过具有负组运行时间的滤波器来传导。

5. 发明授权

US07132969B2 Configuration for digital-analog conversion of high-frequency digital input signal into carrier-frequency analog output signal 有权
标题翻译：将高频数字输入信号数字模拟转换为载波频率模拟输出信号的配置
公开(公告)号：US07132969B2
公开(公告)日：2006-11-07
申请号：US10525083
申请日：2003-07-28
申请人： Armin Fuchs , Björn Jelonnek , Gunter Wolff
发明人： Armin Fuchs , Björn Jelonnek , Gunter Wolff
IPC分类号： H03M1/66
CPC分类号： H03M1/0626 , H03M1/66 , H03M1/74 , H03M3/396 , H03M3/41 , H03M3/504
摘要： A delay device has at least one first delay element and optional additional delay elements connected downstream from the first in a serially consecutive manner. The digital input signal is connected to an input of the first delay element and is connected to an input of a first D/A converter. The output of the first delay element is connected to an input of another D/A converter assigned thereto. The optional additional delay elements each have outputs connected to an input of another D/A converter assigned to the respective delay elements. All D/A converters are combined on the output side in a step-by-step manner so that output signals of all D/A converters form the analog output signal or the device. A specific coefficient is assigned to each D/A converter, and a specific delay time is assigned to each delay element for realizing a filter characteristic.
摘要翻译：延迟装置具有至少一个第一延迟元件和以连续的连续方式从第一延迟元件连接到下游的可选附加延迟元件。数字输入信号连接到第一延迟元件的输入，并连接到第一D / A转换器的输入。第一延迟元件的输出连接到分配给其的另一个D / A转换器的输入端。可选的附加延迟元件各自具有连接到分配给各个延迟元件的另一个D / A转换器的输入的输出。所有D / A转换器以一步一步的方式在输出端组合，使得所有D / A转换器的输出信号形成模拟输出信号或器件。特定系数被分配给每个D / A转换器，并且为每个延迟元件分配特定的延迟时间以实现滤波器特性。

6. 发明授权

US07327804B2 Method for limiting amplitude of a carrier frequency output signal 有权
标题翻译：用于限制载波频率输出信号幅度的方法
公开(公告)号：US07327804B2
公开(公告)日：2008-02-05
申请号：US10512842
申请日：2003-04-01
申请人： Björn Jelonnek
发明人： Björn Jelonnek
IPC分类号： H04L27/00
CPC分类号： H04L27/367 , H04L27/2624
摘要： Partial signals of a basic frequency band are used to form a carrier frequency output signal. Each of n partial signals is attributed as an input signal to a representative main branch and the corresponding partial signal is limited in amplitude, filtered and converted into an intermediate frequency partial signal. As output signals of the main branch, the n partial signals are assembled into a common sum signal. Moreover, each partial signal reaches an auxiliary branch, whereby expected peak values of the partial signal can be determined as estimated values. Using the estimated values, the amplitude limitations of the corresponding partial signals, executed in the main branch, can be regulated in the branch.
摘要翻译：使用基本频带的部分信号来形成载波频率输出信号。将n个部分信号中的每一个归因于作为代表主支路的输入信号，并且对应的部分信号在幅度上受到限制，被滤波并转换成中频部分信号。作为主分支的输出信号，将n个部分信号组合成公共和信号。此外，每个部分信号到达辅助分支，由此可以将部分信号的预期峰值确定为估计值。使用估计值，在主分支中执行的相应部分信号的幅度限制可以在分支中调节。

7. 发明授权

US07415252B2 Arrangement and method for digital predistortion of a complex baseband input signal 有权
标题翻译：复数基带输入信号的数字预失真的布置和方法
公开(公告)号：US07415252B2
公开(公告)日：2008-08-19
申请号：US10555811
申请日：2004-04-02
申请人： Björn Jelonnek
发明人： Björn Jelonnek
IPC分类号： H04M7/00
CPC分类号： H03F1/3252 , H03F1/3247 , H04L27/368
摘要： A system and a method create a pre-distorted signal y(k) from an interpolated broadband baseband signal x(k) for a transmitter power amplifier having at least three branches to which the signal x(k) is respectively connected on the input side. A first branch contains a distortion device for taking into account memory effects of the transmitter power amplifier to which the signal x(k) is supplied on the input side. Where 2=j=n, each other j-th branch contains the following serially mounted elements: a deceleration device with a signal x(k) supplied on the input side, a first adder, a digital low-pass filter, and a second adder, the output signal formed by the second adder being used to create the pre-distorted signal y(k). The distortion device pertaining to the first branch is connected, on the input side, to another input of the second adder of the second branch, and on the output side, to another input of the first adder of the second branch.
摘要翻译：系统和方法从具有至少三个分支的发射机功率放大器的内插宽带基带信号x（k）创建预失真信号y（k），信号x（k）分别连接到输入侧。第一分支包含用于考虑在输入侧提供信号x（k）的发射机功率放大器的存储器效应的失真装置。其中，2 = j = n，每个第j个分支包含以下串行安装的元件：在输入侧提供有信号x（k）的减速装置，第一加法器，数字低通滤波器和第二由第二加法器形成的输出信号用于产生预失真信号y（k）。与第一分支相关的失真装置在输入侧连接到第二分支的第二加法器的另一输入，并且在输出侧连接到第二分支的第一加法器的另一输入端。

8. 发明授权

US07030797B2 Broadband sigma-delta modulator 失效
标题翻译：宽带Σ-Δ调制器
公开(公告)号：US07030797B2
公开(公告)日：2006-04-18
申请号：US10499521
申请日：2002-12-19
申请人： Björn Jelonnek
发明人： Björn Jelonnek
IPC分类号： H03M3/00
CPC分类号： H03M7/3011 , H03M7/3022 , H03M7/3042
摘要： A sigma-delta modulator converting digital input signals x(k) includes a first feedback loop of a spectrally formed output signal y(k) of the sigma-delta modulator and a second feedback loop of a spectrally formed differential signal e(k), obtained from an intermediate signal u(k) and the output signal y(k). The intermediate signal u(k) constitutes the differential signal of the input signal x(k) and the total signal r(k) of the first and second feedback loops. A quantizer determines the output signal y(k) based on the intermediate signal u(k), whereby k is the discrete independent time variable. The sigma-delta converter generates a skew between the output signal y(k) and the input signal x(k).
摘要翻译：转换数字输入信号x（k）的Σ-Δ调制器包括Σ-Δ调制器的频谱形成的输出信号y（k）的第一反馈回路和频谱形成的差分信号e（k）的第二反馈回路，从中间信号u（k）和输出信号y（k）获得。中间信号u（k）构成第一和第二反馈回路的输入信号x（k）和总信号r（k）的差分信号。量化器基于中间信号u（k）来确定输出信号y（k），由此k是离散的独立时间变量。 Σ-Δ转换器在输出信号y（k）和输入信号x（k）之间产生偏差。

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