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1. 发明申请

US20150006717A1 TRACKING MODE OF A PROCESSING DEVICE IN INSTRUCTION TRACING SYSTEMS 审中-公开
标题翻译：指令跟踪系统中处理设备的跟踪模式
公开(公告)号：US20150006717A1
公开(公告)日：2015-01-01
申请号：US14126313
申请日：2013-06-27
申请人： Thilo Schmitt , Peter Lachner , Beeman Strong , Ofer Levy , Thomas Toll , Matthew Merten , Tong Li , Ravi Rajwar , Konrad Lai
发明人： Thilo Schmitt , Peter Lachner , Beeman Strong , Ofer Levy , Thomas Toll , Matthew Merten , Tong Li , Ravi Rajwar , Konrad Lai
IPC分类号： H04L12/26
CPC分类号： G06F9/30189 , G06F11/3636
摘要： In accordance with embodiments disclosed herein, there is provided systems and methods for tracking the mode of processing devices in an instruction tracing system. The method may include receiving an indication of a change in a current execution mode of the processing device. The method may also include determining that the current execution mode of the received indication is different than a value of an execution mode of a first execution mode (EM) packet previously-generated by the IT module. The method may also include generating, based on the determining that the current execution mode is different, a second EM packet that provides a value of the current execution mode of the processing device to indicate the change in the execution mode for an instruction in a trace generated by the IT module. The method may further include generating transactional memory (TMX) packets having n bit mode pattern in the packet log. The n is at least two and the n bit mode indicates transaction status of the TMX operation.
摘要翻译：根据本文公开的实施例，提供了用于跟踪指令跟踪系统中的处理设备的模式的系统和方法。该方法可以包括接收处理设备的当前执行模式中的改变的指示。该方法还可以包括确定接收到的指示的当前执行模式不同于IT模块先前生成的第一执行模式（EM）分组的执行模式的值。该方法还可以包括基于确定当前执行模式不同而生成第二EM分组，其提供处理设备的当前执行模式的值以指示用于跟踪中的指令的执行模式的改变由IT模块生成。该方法还可以包括在分组日志中生成具有n位模式模式的事务存储器（TMX）分组。 n至少为2，n位模式表示TMX操作的事务状态。

2. 发明申请

US20210357221A1 APPARATUS AND METHOD TO IDENTIFY THE SOURCE OF AN INTERRUPT 有权
公开(公告)号：US20210357221A1
公开(公告)日：2021-11-18
申请号：US17359337
申请日：2021-06-25
申请人： Ashok RAJ , Andreas KLEEN , Gilbert NEIGER , Beeman STRONG , Jason BRANDT , Rupin VAKHARWALA , Jeff HUXEL , Larisa NOVAKOVSKY , Ido OUZIEL , Sarathy JAYAKUMAR
发明人： Ashok RAJ , Andreas KLEEN , Gilbert NEIGER , Beeman STRONG , Jason BRANDT , Rupin VAKHARWALA , Jeff HUXEL , Larisa NOVAKOVSKY , Ido OUZIEL , Sarathy JAYAKUMAR
IPC分类号： G06F9/30 , G06F15/80 , G06F9/50 , G06F9/48
摘要： An apparatus and method for processing non-maskable interrupt source information. For example, one embodiment of a processor comprises: a plurality of cores comprising execution circuitry to execute instructions and process data; local interrupt circuitry comprising a plurality of registers to store interrupt-related data including non-maskable interrupt (NMI) data related to a first NMI; and non-maskable interrupt (NMI) processing mode selection circuitry, responsive to a request, to select between at least two NMI processing modes to process the first NMI including: a first NMI processing mode in which the plurality of registers are to store first data related to a first NMI, wherein no NMI source information related to a source of the NMI is included in the first data, and a second NMI processing mode in which the plurality of registers are to store both the first data related to the first NMI and second data comprising NMI source information indicating the NMI source.

3. 发明申请

US20080059723A1 Detecting and resolving locks in a memory unit 有权
标题翻译：检测和解决内存单元中的锁
公开(公告)号：US20080059723A1
公开(公告)日：2008-03-06
申请号：US11513636
申请日：2006-08-31
申请人： Prakash Math , Matthew Merten , Sebastien Hily , Beeman Strong , Morris Marden , David Burns
发明人： Prakash Math , Matthew Merten , Sebastien Hily , Beeman Strong , Morris Marden , David Burns
IPC分类号： G06F13/00
CPC分类号： G06F13/161 , G06F9/524
摘要： In one embodiment, the present invention includes an apparatus having a first counter to count dispatches of a senior request in a memory unit, a second counter to count cycles of a processor coupled to the memory unit, and a controller coupled to the first and second counters to execute one or more one remediation measures with respect to the senior request based on a value of at least one of the counters. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，本发明包括一种具有第一计数器的装置，用于计数存储器单元中的高级请求的分配，耦合到存储器单元的处理器的计数周期的第二计数器以及耦合到第一和第二计数器根据至少一个计数器的值对高级请求执行一个或多个修复措施。描述和要求保护其他实施例。

4. 发明授权

US07590784B2 Detecting and resolving locks in a memory unit 有权
标题翻译：检测和解决内存单元中的锁
公开(公告)号：US07590784B2
公开(公告)日：2009-09-15
申请号：US11513636
申请日：2006-08-31
申请人： Prakash Math , Matthew Merten , Sebastien Hily , Beeman Strong , Morris Marden , David Burns
发明人： Prakash Math , Matthew Merten , Sebastien Hily , Beeman Strong , Morris Marden , David Burns
IPC分类号： G06F13/00
CPC分类号： G06F13/161 , G06F9/524
摘要： In one embodiment, the present invention includes an apparatus having a first counter to count dispatches of a senior request in a memory unit, a second counter to count cycles of a processor coupled to the memory unit, and a controller coupled to the first and second counters to execute one or more one remediation measures with respect to the senior request based on a value of at least one of the counters. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，本发明包括一种具有第一计数器的装置，用于计数存储器单元中的高级请求的分配，耦合到存储器单元的处理器的计数周期的第二计数器以及耦合到第一和第二计数器根据至少一个计数器的值对高级请求执行一个或多个修复措施。描述和要求保护其他实施例。

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