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1. 发明授权

US09638742B2 Method and apparatus for testing electrical connections on a printed circuit board 有权
公开(公告)号：US09638742B2
公开(公告)日：2017-05-02
申请号：US13122347
申请日：2009-11-13
申请人： Anthony J. Suto
发明人： Anthony J. Suto
IPC分类号： G01R31/20 , G01R31/28 , G01R31/312 , G01R31/304 , G01R31/3185
CPC分类号： G01R31/2815 , G01R31/304 , G01R31/312 , G01R31/318577 , Y10T29/49124
摘要： A test system and method for identifying open and shorted connections on a printed circuit board (PCB). An integrated circuit (IC) unit on the PCB is configured to generate a test signal on an output pin connected to a test pin on a second device, connector, or socket on the PCB. For a connection, the test signal is capacitively coupled to a detector plate proximal the second device. Based on the signal coupled to the detector, time domain analysis is performed on the coupled signal to determine if the test pin has a good connection to the PCB or if the pin is open or shorted. Analysis may include cross-correlating the coupled signal with a learned signal obtained from a known “good” PCB. The test pin may pass the test if the cross-correlation is within a specified threshold window. If the test fails, additional tests may be performed to troubleshoot the cause of the testing failure.

2. 发明授权

US08604820B2 Test access component for automatic testing of circuit assemblies 有权
标题翻译：用于电路组件自动测试的测试接入组件
公开(公告)号：US08604820B2
公开(公告)日：2013-12-10
申请号：US12707930
申请日：2010-02-18
申请人： Anthony J. Suto
发明人： Anthony J. Suto
IPC分类号： G01R31/28
CPC分类号： G01R31/2818 , H05K1/0268 , H05K3/3442 , H05K2201/10022 , H05K2201/10204 , H05K2201/10636 , Y02P70/611
摘要： A reliable and durable method of testing of printed circuit boards is presented. Test access components are placed in contact regions for providing electrical connectivity between test probes and the printed circuit board. In some cases, a test access component may be a surface mount resistor. The test access component may provide two points of contact for test probes to make electrical and mechanical contact with the printed circuit board. Test access components may also provide for increased durability of testing, allowing for a greater number of test contacts to be made between test probes and printed circuit boards than were previously possible.
摘要翻译：介绍了一种可靠耐用的印刷电路板测试方法。测试访问组件放置在接触区域中，以提供测试探针与印刷电路板之间的电连接。在某些情况下，测试访问组件可能是表面贴装电阻。测试访问组件可以为测试探针提供两个接触点，以与印刷电路板进行电气和机械接触。测试访问组件还可以提供更高的测试耐久性，允许在测试探针和印刷电路板之间进行比以前更多的测试接触。

3. 发明授权

US08310256B2 Capacitive opens testing in low signal environments 有权
标题翻译：电容式在低信号环境下开启测试
公开(公告)号：US08310256B2
公开(公告)日：2012-11-13
申请号：US12645418
申请日：2009-12-22
申请人： Anthony J. Suto
发明人： Anthony J. Suto
IPC分类号： G01R31/302
CPC分类号： G01R31/312 , G01R31/046
摘要： An improved system for capacitive testing electrical connections in a low signal environment. The system includes features that increase sensitivity of a capacitive probe. One feature is a spacer positioned to allow the probe to be partially inserted into the component without contacting the pins. The spacer may be a collar on the probe that contacts the housing of the component, contacts the substrate of the circuit assembly, or both. In some other embodiments, the spacer may be a riser extending beyond the surface of the sense plate that contacts the component, a riser portion of the component, or a combination of both. The spacer improves sensitivity by establishing a small gap between a sense plate of the probe and pins under test without risk of damage to the pins. A second feature is a guard plate of the probe with reduced capacitance to a sense plate of the probe. Reducing capacitance also increases the sensitivity of the probe.
摘要翻译：一种用于低信号环境中电容测试电气连接的改进系统。该系统包括增加电容式探头灵敏度的特性。一个特征是定位成允许探针部分地插入组件而不接触销的间隔件。间隔件可以是探针上的接触组件的壳体，接触电路组件的基板或两者的套环。在一些其他实施例中，间隔件可以是延伸超过感测板的表面的提升器，其接触部件，部件的提升部分或两者的组合。间隔器通过在探针的感测板和被测试的引脚之间建立小的间隙来提高灵敏度，而不会损坏引脚。第二个特征是探针的防护板，具有降低到探针感测板的电容。降低电容也增加了探头的灵敏度。

4. 发明申请

US20110204910A1 METHOD AND APPARATUS FOR TESTING ELECTRICAL CONNECTIONS ON A PRINTED CIRCUIT BOARD 有权
标题翻译：用于测试打印电路板上电气连接的方法和装置
公开(公告)号：US20110204910A1
公开(公告)日：2011-08-25
申请号：US13122347
申请日：2009-11-13
申请人： Anthony J. Suto
发明人： Anthony J. Suto
IPC分类号： G01R31/20 , G06F19/00 , H05K3/00
CPC分类号： G01R31/2815 , G01R31/304 , G01R31/312 , G01R31/318577 , Y10T29/49124
摘要： A test system and method for identifying open and shorted connections on a printed circuit board (PCB). An integrated circuit (IC) unit on the PCB is configured to generate a test signal on an output pin connected to a test pin on a second device, connector, or socket on the PCB. For a connection, the test signal is capacitively coupled to a detector plate proximal the second device. Based on the signal coupled to the detector, time domain analysis is performed on the coupled signal to determine if the test pin has a good connection to the PCB or if the pin is open or shorted. Analysis may include cross-correlating the coupled signal with a learned signal obtained from a known “good” PCB. The test pin may pass the test if the cross-correlation is within a specified threshold window. If the test fails, additional tests may be performed to troubleshoot the cause of the testing failure.
摘要翻译：一种用于识别印刷电路板（PCB）上的开路和短路连接的测试系统和方法。 PCB上的集成电路（IC）单元被配置为在连接到PCB上的第二个设备，连接器或插座上的测试引脚的输出引脚上产生测试信号。对于连接，测试信号电容耦合到靠近第二设备的检测器板。基于耦合到检测器的信号，对耦合信号进行时域分析，以确定测试引脚是否与PCB有良好的连接，或者如果引脚断开或短路。分析可以包括将耦合信号与从已知的“良好”PCB获得的学习信号相互相关。如果互相关在指定的阈值窗口内，则测试引脚可以通过测试。如果测试失败，可能会进行其他测试来排除测试失败的原因。

5. 发明授权

US6114848A Direct-measurement provision of safe backdrive levels 有权
标题翻译：直接测量提供安全的反向驱动电平
公开(公告)号：US6114848A
公开(公告)日：2000-09-05
申请号：US231001
申请日：1999-01-14
申请人： Anthony J. Suto , Robert J. Muller , John D. Moniz
发明人： Anthony J. Suto , Robert J. Muller , John D. Moniz
IPC分类号： G01R31/28 , G01R31/319
CPC分类号： G01R31/2806 , G01R31/31924
摘要： Pin-driver circuitry in each of an automatic circuit tester (10)'s digital driver/sensor circuits (36) includes a current sensor (R.sub.sense, QS1, QS2, D1, and D2) and comparison circuit (58) that indicate whether the load current supplied by the driver exceeds a level set by a threshold input (CURRENT.sub.-- VALUE). The pin-driver circuitry also includes a timer (60) whose output indicates whether the comparison circuit's output has been asserted for a length of time that exceeds a limit set by a duration input (TIME.sub.-- -VALUE). When it has, the tester disables the driver and thereby prevents damage that could otherwise result from excessive backdrive durations that the test-generation process did not anticipate.
摘要翻译：自动电路测试器（10）的数字驱动器/传感器电路（36）中的引脚驱动器电路包括电流传感器（Rsense，QS1，QS2，D1和D2）和比较电路（58），其指示是否由驾驶员提供的负载电流超过阈值输入设定的电平（CURRENT-VALUE）。引脚驱动器电路还包括定时器（60），其输出指示比较电路的输出是否已被断言超过由持续时间输入（TIME-VALUE）设置的限制的时间长度。当它有，测试仪禁用驱动程序，从而防止由于测试生成过程没有预料到的过度反向驱动持续时间造成的损坏。

6. 发明授权

US08760183B2 Fast open circuit detection for open power and ground pins 有权
标题翻译：开路电源和接地引脚的快速开路检测
公开(公告)号：US08760183B2
公开(公告)日：2014-06-24
申请号：US13122423
申请日：2009-11-13
申请人： Anthony J. Suto
发明人： Anthony J. Suto
IPC分类号： G01R31/20
CPC分类号： G01R31/2812 , G01R31/026
摘要： A system and method for identifying opens among parallel connections on a circuit assembly such as a printed circuit board (PCB). In a learn phase performed on a known good circuit assembly, a group of parallel connected pins are excited with a first signal. A second signal, out-of-phase with the first signal, is applied to a second group of pins associated with the component. The amplitude and/or the phase of the second signal and the number and/or specific pins in the second group of pins are selected so that first and second signals coupled to a detector plate proximal to the component substantially offset. During a manufacturing test, signals of comparable amplitude and phase are applied to like pins on a like component of a circuit assembly under test. If the response signal coupled to a like detector plate is below a threshold, it is determined that each pin in the group of parallel connected pins is connected. If the amplitude of the response is over the threshold, one or more of the parallel pins is determined to be open. Additional tests may be performed to identify which of the parallel pins is likely open.
摘要翻译：用于识别的系统和方法在诸如印刷电路板（PCB）的电路组件上的并行连接之间打开。在已知的良好电路组件执行的学习阶段中，一组并联的引脚被第一信号激励。与第一信号异相的第二信号被施加到与该组件相关联的第二组引脚。选择第二组信号中的第二信号的振幅和/或相位以及第二组引脚中的数量和/或特定引脚，使得耦合到靠近组件的检测器板的第一和第二信号基本上偏移。在制造测试期间，将相当的幅度和相位的信号施加到被测电路组件的类似部件上的类似引脚。如果耦合到类似检测器板的响应信号低于阈值，则确定并联连接的引脚组中的每个引脚被连接。如果响应的幅度超过阈值，则一个或多个并行引脚被确定为打开。可以执行额外的测试，以确定哪个并行引脚可能打开。

7. 发明申请

US20100207651A1 TEST ACCESS COMPONENT FOR AUTOMATIC TESTING OF CIRCUIT ASSEMBLIES 有权
标题翻译：用于自动测试电路组件的测试接入组件
公开(公告)号：US20100207651A1
公开(公告)日：2010-08-19
申请号：US12707930
申请日：2010-02-18
申请人： Anthony J. Suto
发明人： Anthony J. Suto
IPC分类号： G01R31/02
CPC分类号： G01R31/2818 , H05K1/0268 , H05K3/3442 , H05K2201/10022 , H05K2201/10204 , H05K2201/10636 , Y02P70/611
摘要： A reliable and durable method of testing of printed circuit boards is presented. Test access components are placed in contact regions for providing electrical connectivity between test probes and the printed circuit board. In some cases, a test access component may be a surface mount resistor. The test access component may provide two points of contact for test probes to make electrical and mechanical contact with the printed circuit board. Test access components may also provide for increased durability of testing, allowing for a greater number of test contacts to be made between test probes and printed circuit boards than were previously possible.
摘要翻译：介绍了一种可靠耐用的印刷电路板测试方法。测试访问组件放置在接触区域中，以提供测试探针与印刷电路板之间的电连接。在某些情况下，测试访问组件可能是表面贴装电阻。测试访问组件可以为测试探针提供两个接触点，以与印刷电路板进行电气和机械接触。测试访问组件还可以提供更高的测试耐久性，允许在测试探针和印刷电路板之间进行比以前更多的测试接触。

8. 发明授权

US06175230B1 Circuit-board tester with backdrive-based burst timing 有权
标题翻译：电路板测试仪，具有基于反向驱动的突发定时
公开(公告)号：US06175230B1
公开(公告)日：2001-01-16
申请号：US09231049
申请日：1999-01-14
申请人： Michael W. Hamblin , Jak Eskici , Anthony J. Suto
发明人： Michael W. Hamblin , Jak Eskici , Anthony J. Suto
IPC分类号： G01R3102
CPC分类号： G01R31/31915 , G01R31/31919 , G01R31/31924 , G01R31/3193
摘要： Pin-driver circuitry in each of an automatic circuit tester (10)'s digital driver/sensor circuits (36) includes a current sensor (Rsense, QS1, QS2, D1, and D2) and comparison circuit (58) that indicate whether the load current supplied by the driver exceeds a level set by a threshold input (CURRENT_VALUE). The pin-driver circuitry also includes a timer (60) whose output indicates whether the comparison circuit's output has been asserted for a length of time that exceeds a limit set by a duration input (TIME_VALUE). When it has, the tester disables the driver and thereby prevents damage that could otherwise result from excessive backdrive durations that the test-generation process did not anticipate. When no backdriving is sensed during a given burst of test signals, the tester forgoes the normal cool-down delay, thereby speeding the test process.
摘要翻译：自动电路测试器（10）的数字驱动器/传感器电路（36）中的引脚驱动器电路包括电流传感器（Rsense，QS1，QS2，D1和D2）和比较电路（58），其指示是否由驾驶员提供的负载电流超过由阈值输入设置的电平（CURRENT_VALUE）。引脚驱动器电路还包括定时器（60），其输出指示比较电路的输出是否已被断言超过由持续时间输入（TIME_VALUE）设置的限制的时间长度。当它有，测试仪禁用驱动程序，从而防止由于测试生成过程没有预料到的过度反向驱动持续时间造成的损坏。在给定的测试信号突发期间没有检测到反向驱动时，测试仪将放弃正常的冷却延迟，从而加快测试过程。

9. 发明授权

US08760185B2 Low capacitance probe for testing circuit assembly 有权
标题翻译：用于测试电路组件的低电容探头
公开(公告)号：US08760185B2
公开(公告)日：2014-06-24
申请号：US12645424
申请日：2009-12-22
申请人： Anthony J. Suto
发明人： Anthony J. Suto
IPC分类号： G01R31/312
CPC分类号： G01R31/2808 , G01R31/304
摘要： An improved system for capacitive testing electrical connections in a low signal environment. The system includes features that increase sensitivity of a capacitive probe. One feature is a spacer positioned to allow the probe to be partially inserted into the component without contacting the pins. The spacer may be a collar on the probe that contacts the housing of the component, contacts the substrate of the circuit assembly, or both. In some other embodiments, the spacer may be a riser extending beyond the surface of the sense plate that contacts the component, a riser portion of the component, or a combination of both. The spacer improves sensitivity by establishing a small gap between a sense plate of the probe and pins under test without risk of damage to the pins. A second feature is a guard plate of the probe with reduced capacitance to a sense plate of the probe. Reducing capacitance also increases the sensitivity of the probe.
摘要翻译：一种用于低信号环境中电容测试电气连接的改进系统。该系统包括增加电容式探头灵敏度的特性。一个特征是定位成允许探针部分地插入组件而不接触销的间隔件。间隔件可以是探针上的接触组件的壳体，接触电路组件的基板或两者的套环。在一些其他实施例中，间隔件可以是延伸超过感测板的表面的提升器，其接触部件，部件的提升部分或两者的组合。间隔器通过在探针的感测板和被测试的引脚之间建立小的间隙来提高灵敏度，而不会损坏引脚。第二个特征是探针的防护板，具有降低到探针感测板的电容。降低电容也增加了探头的灵敏度。

10. 发明授权

US08618810B2 Identifying fuel cell defects 有权
标题翻译：识别燃料电池缺陷
公开(公告)号：US08618810B2
公开(公告)日：2013-12-31
申请号：US13040600
申请日：2011-03-04
申请人： Anthony J. Suto , Alexander H. Slocum , R. Scott Ziegenhagen
发明人： Anthony J. Suto , Alexander H. Slocum , R. Scott Ziegenhagen
IPC分类号： G01R31/00
CPC分类号： H01M8/04552 , H01M8/04671 , H01M2008/1293 , Y02P70/56
摘要： A test system for testing a unit such as multiple solid oxide fuel cells. The test system includes a thermal test chamber in which a non-contact electrostatic voltage probe is mounted to scan the solid oxide fuel cells. The test system includes a detector coupled to the voltage probe to produce an output signal or display based on the measured voltages. The measured voltages are processed to compute a representative voltage for each fuel cell and to identify any defective fuel cells based on the measured voltages. The test system may be used during manufacture of solid oxide fuel cell stacks for cost effective testing to lower manufacturing costs.
摘要翻译：用于测试诸如多个固体氧化物燃料电池的单元的测试系统。测试系统包括热测试室，其中安装非接触式静电电压探针以扫描固体氧化物燃料电池。测试系统包括耦合到电压探针的检测器，以基于所测量的电压产生输出信号或显示。测量的电压被处理以计算每个燃料电池的代表性电压，并且基于测量的电压来识别任何有缺陷的燃料电池。测试系统可以在制造固体氧化物燃料电池堆时用于成本有效的测试以降低制造成本。

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