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    • 2. 发明授权
    • System for restricting data access
    • 用于限制数据访问的系统
    • US08042157B2
    • 2011-10-18
    • US11465535
    • 2006-08-18
    • Peter BennettAndrew Dellow
    • Peter BennettAndrew Dellow
    • H04L29/00
    • H04N21/443H04H60/23H04H60/80
    • A filter is arranged to selectively block or allow a data access command from an initiator according to whether the initiator is secure or insecure and whether a data source or destination being accessed is privileged or unprivileged. The data access command contains an identification of the initiator from which the data access command originated and an identification of the data source or destination being accessed. The security filter compares the initiator identification and data source or destination identification contained within the data access command with a list of those initiators defined as secure and a list of those data sources or destinations which are defined as unprivileged. The filter then blocks or allows the data access command signal according to a set of rules.
    • 布置过滤器以根据启动器是安全的还是不安全的以及被访问的数据源或目的地是特权还是非特权来选择性地阻止或允许来自发起者的数据访问命令。 数据访问命令包含发起数据访问命令的启动器的标识以及所访问的数据源或目的地的标识。 安全过滤器将包含在数据访问命令中的启动器标识和数据源或目的地标识与定义为安全的那些启动器的列表以及被定义为无特权的那些数据源或目的地的列表进行比较。 然后,滤波器根据一组规则阻止或允许数据访问命令信号。
    • 3. 发明授权
    • Memory security device for flexible software environment
    • 内存安全设备灵活的软件环境
    • US07624442B2
    • 2009-11-24
    • US10817148
    • 2004-04-02
    • Andrew DellowPeter Bennett
    • Andrew DellowPeter Bennett
    • G06F11/00
    • G06F21/72G06F12/1441G06F21/57G06F2221/2105
    • A semiconductor integrated circuit includes a processor for executing application code from a memory and a verifier processor arranged to receive the application code via the same internal bus as the processor. The verifier processor performs a verification function to check that the application code is authentic. The verifier processor runs autonomously and cannot be spoofed as it receives the application code via the same internal bus as the main processor. An additional instruction monitor checks the code instructions from the CPU and also impairs the operation of the circuit unless the address of code requested is in a given range. The code is in the form of a linked list and the range is derived as a linked list table during a first check.
    • 半导体集成电路包括用于从存储器执行应用代码的处理器和被布置为经由与处理器相同的内部总线接收应用代码的验证器处理器。 验证者处理器执行验证功能以检查应用代码是否可信。 验证者处理器自动运行,并且不能通过与主处理器相同的内部总线接收应用代码而被欺骗。 附加的指令监视器检查来自CPU的代码指令,并且还损害电路的操作,除非所请求的代码的地址在给定的范围内。 代码是链表的形式,并且在第一次检查期间将该范围派生为链表。
    • 4. 发明授权
    • Security integrated circuit
    • 安全集成电路
    • US07489780B2
    • 2009-02-10
    • US10818753
    • 2004-04-06
    • Andrew DellowRodgrigo Cordero
    • Andrew DellowRodgrigo Cordero
    • H04L9/00
    • H04N21/42623G06F21/10H04N7/165H04N21/4405H04N21/4623
    • A semiconductor integrated circuit for the processing of conditional access television signals comprises an input interface for receiving encrypted television signals and an output interface for output of decrypted television signals. Control signals broadcast with the television signals include control words and common keys. Entitlement messages are received in encrypted form, encrypted according to a secret key unique to each semiconductor integrated circuit. The input interface is connected to a decryption circuit whereby the only manner of providing the common keys to the circuit are in encrypted form encrypted according to the secret key. Due to the monolithic nature of the circuit, no secrets are exposed and the system is secure. Alternatively, the entitlement messages are encrypted for decryption with the common keys and a unique ID stored in the circuit is compared with an ID in a received entitlement message. Only if the received and stored IDs match can the rights be stored and used.
    • 用于处理条件接收电视信号的半导体集成电路包括用于接收加密的电视信号的输入接口和用于输出解密的电视信号的输出接口。 用电视信号广播的控制信号包括控制字和公共密钥。 以加密形式接收授权消息,根据每个半导体集成电路特有的秘密密钥进行加密。 输入接口连接到解密电路,由此向电路提供公共密钥的唯一方式是根据密钥加密的加密形式。 由于电路的整体性质,没有暴露的秘密和系统是安全的。 或者,授权消息被加密以用公共密钥进行解密,并且存储在电路中的唯一ID与接收到的授权消息中的ID进行比较。 只有收到和存储的ID匹配才能保存和使用权限。
    • 5. 发明申请
    • METHOD AND SYSTEM FOR PREVENTING REVOCATION DENIAL OF SERVICE ATTACKS
    • 防止服务攻击的撤销方式和系统
    • US20080086641A1
    • 2008-04-10
    • US11743533
    • 2007-05-02
    • Stephane RodgersAndrew Dellow
    • Stephane RodgersAndrew Dellow
    • H04L9/32
    • H04L9/3247G06F21/10G06F2221/0711G06F2221/0771H04L9/0891H04L63/0435H04L63/123H04L63/1458H04L2209/60H04L2209/605H04L2463/062
    • Methods and systems for preventing revocation denial of service attacks are disclosed and may include receiving and decrypting a command for revoking a secure key utilizing a hidden key, and revoking the secure key upon successful verification of a signature. The command may comprise a key ID that is unique to a specific set-top box. A key corresponding to the command for revoking the secure key may be stored in a one-time programmable memory, compared to a reference, and the security key may be revoked based on the comparison. The command for revoking the secure key may be parsed from a transport stream utilizing a hardware parser. The method and system may also comprise generating a command for revoking a secure key. The command may be encrypted and signed utilizing a hidden key and may comprise a key ID that is unique to a specific set-top box.
    • 公开了用于防止撤销拒绝服务攻击的方法和系统,并且可以包括使用隐藏密钥接收和解密用于撤销安全密钥的命令,以及在成功验证签名时撤销安全密钥。 该命令可以包括特定机顶盒唯一的密钥ID。 与参考相比,与撤销安全密钥的命令相对应的密钥可以存储在一次性可编程存储器中,并且可以基于比较来撤销安全密钥。 用于撤销安全密钥的命令可以使用硬件解析器从传输流中解析出来。 该方法和系统还可以包括生成用于撤销安全密钥的命令。 命令可以使用隐藏密钥进行加密和签名,并且可以包括特定机顶盒唯一的密钥ID。
    • 6. 发明申请
    • Monolithic Semiconductor Integrated Circuit And Method for Selective Memory Encryption And Decryption
    • 单片半导体集成电路和选择性存储器加密和解密的方法
    • US20070280475A1
    • 2007-12-06
    • US10583577
    • 2004-12-17
    • Andrew DellowHoward Gurney
    • Andrew DellowHoward Gurney
    • H04K1/10
    • G06F21/72G06F12/1408G06F21/79G06F21/85
    • A monolithic semiconductor integrated circuit is provided for selectively encrypting or decrypting data transmitted between one of a plurality of devices on the circuit and an external memory. Two series of data pathways connect the devices and the external memory. The first series of data pathways passes through a cryptographic circuit causing data to be encrypted or decrypted, and the other series of data pathways provides an unhindered route. When a data access request is made by a device, the data is selectively routed along one of the two series of data pathways according to the identification of the device making the data access request. In one example, if data is transmitted from a device to the external memory, the data is selectively encrypted before being stored in the external memory if the device transmitting the data is identified as secure. Then, when that data is retrieved from the external memory by a second device, the data is selectively decrypted only if the second device is identified as secure.
    • 提供单片半导体集成电路,用于选择性地加密或解密在电路上的多个设备之一和外部存储器之间传输的数据。 两组数据通路连接设备和外部存储器。 数据路径的第一系列通过加密电路,导致数据被加密或解密,另一系列的数据路径提供了一个不受阻碍的路由。 当设备进行数据访问请求时,根据进行数据访问请求的设备的标识,数据沿着两个数据路径中的一个选择性地路由选择。 在一个示例中,如果数据从设备发送到外部存储器,则如果发送数据的设备被识别为安全的,则在被存储在外部存储器中之前,数据被选择性地加密。 然后,当通过第二设备从外部存储器检索数据时,只有当第二设备被识别为安全时才选择性地解密该数据。
    • 8. 发明申请
    • System, apparatus and method for restricting data access
    • 用于限制数据访问的系统,设备和方法
    • US20050235308A1
    • 2005-10-20
    • US11016537
    • 2004-12-17
    • Andrew DellowRodrigo Cordero
    • Andrew DellowRodrigo Cordero
    • G06F21/85H04N7/16G06F13/00
    • H04N21/4181G06F21/85H04N7/162H04N21/454
    • An embodiment comprises a semiconductor integrated circuit for restricting the rate at which data may be accessed from an external memory by a device coupled to the circuit. The rate of data access is restricted if the data access satisfies one or more conditions. For example, one of the conditions is that the device which is requesting the data is insecure. Another condition is that the requested data is privileged. A data access monitor is provided to monitor data accesses and to is arranged to generate an access signal to indicate whether the conditions are satisfied or not. A bandwidth comparator determines whether data access exceeds a threshold and, if so, the semiconductor integrated circuit is impaired to prevent further data access.
    • 一个实施例包括半导体集成电路,用于通过耦合到该电路的装置来限制可从外部存储器访问数据的速率。 如果数据访问满足一个或多个条件,则数据访问速率受到限制。 例如,其中一个条件是请求数据的设备是不安全的。 另一个条件是请求的数据是特权的。 提供数据访问监视器以监视数据访问,并且被布置成生成访问信号以指示条件是否满足。 带宽比较器确定数据访问是否超过阈值,如果是,则削弱半导体集成电路以防止进一步的数据访问。
    • 9. 发明授权
    • Semiconductor integrated circuit for use in direct memory access
    • 用于直接存储器存取的半导体集成电路
    • US06865623B2
    • 2005-03-08
    • US10354908
    • 2003-01-30
    • Andrew Dellow
    • Andrew Dellow
    • G06F13/28
    • G06F13/28
    • A semiconductor integrated circuit for use in direct memory access (DMA) has two sources which communicate with a bus through a bus interface. A DMA access signal generator is coupled to the bus interface and asserts a DMA access output signal at a DMA access signal pin whenever either of the sources requires a DMA access. The need for separate DMA access signal pins for each of the two sources is thereby avoided. With targets on two separate integrated circuits, a single DMA access pin can be used for the two targets, while chip select signals at chip select pins on the source integrated circuit indicate which of the two targets is intended for the DMA access.
    • 用于直接存储器访问(DMA)的半导体集成电路具有通过总线接口与总线通信的两个源。 DMA访问信号发生器耦合到总线接口,并且每当任何一个源需要DMA访问时,在DMA访问信号引脚处断言DMA访问输出信号。 因此避免了对于两个源中的每一个的单独的DMA访问信号引脚的需要。 通过两个独立的集成电路上的目标,两个目标可以使用单个DMA访问引脚,而源集成电路芯片选择引脚上的芯片选择信号指示两个目标中的哪一个用于DMA访问。