专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20090003844A1 HIGH SPEED OPTOELECTRONIC RECEIVER 有权
标题翻译：高速光电接收机
公开(公告)号：US20090003844A1
公开(公告)日：2009-01-01
申请号：US11772105
申请日：2007-06-29
申请人： Andrew ADAMIECKI , Lawrence BUHL , Jeffrey SINSKY
发明人： Andrew ADAMIECKI , Lawrence BUHL , Jeffrey SINSKY
IPC分类号： H04B10/06
CPC分类号： H04B10/69
摘要： A novel 100+ Gbit/s opto-electronic receiver uses hybrid integration of a photodiode and a demultiplexer. The photodiode converts a high speed optical data stream to an electrical data stream that is input to an electronic demultiplexer. The photodiode and the demultiplexer are connected together by a novel planar microwave transmission structure.
摘要翻译：一种新颖的100+ Gbit / s光电接收器使用光电二极管和解复用器的混合集成。光电二极管将高速光数据流转换成输入到电子解复用器的电数据流。光电二极管和解复用器通过新的平面微波传输结构连接在一起。

2. 发明申请

US20080158643A1 DUOBINARY MODULATION WITH A LUMPED-ELEMENT MACH-ZEHNDER DEVICE 有权
标题翻译：带有元素MACH-ZEHNDER器件的二次调制
公开(公告)号：US20080158643A1
公开(公告)日：2008-07-03
申请号：US11617350
申请日：2006-12-28
申请人： Andrew Adamiecki , Sethumadhavan Chandrasekhar , Christopher Doerr , David Neilson , Peter Winzer
发明人： Andrew Adamiecki , Sethumadhavan Chandrasekhar , Christopher Doerr , David Neilson , Peter Winzer
IPC分类号： G02F1/01
CPC分类号： H04B10/5167
摘要： Duobinary and NRZ modulation of an X-Gb/s optical signal is achieved with a lumped element InP Mach-Zehnder device configured to operate at X/k-Gb/s where k>1 and arranged in a push-pull configuration.
摘要翻译：使用集成元件InP Mach-Zehnder器件实现X-Gb / s光信号的二进制和NRZ调制，其被配置为以k> 1并且以推挽配置布置的X / k-Gb / s操作。

3. 发明授权

US07917042B2 High speed optoelectronic receiver 有权
标题翻译：高速光电接收机
公开(公告)号：US07917042B2
公开(公告)日：2011-03-29
申请号：US11772105
申请日：2007-06-29
申请人： Andrew Adamiecki , Lawrence Buhl , Jeffrey Sinsky
发明人： Andrew Adamiecki , Lawrence Buhl , Jeffrey Sinsky
IPC分类号： H04B10/06
CPC分类号： H04B10/69
摘要： A novel 100+ Gbit/s opto-electronic receiver uses hybrid integration of a photodiode and a demultiplexer. The photodiode converts a high speed optical data stream to an electrical data stream that is input to an electronic demultiplexer. The photodiode and the demultiplexer are connected together by a novel planar microwave transmission structure.
摘要翻译：一种新颖的100+ Gbit / s光电接收器使用光电二极管和解复用器的混合集成。光电二极管将高速光数据流转换成输入到电子解复用器的电数据流。光电二极管和解复用器通过新的平面微波传输结构连接在一起。

4. 发明授权

US07782520B2 Duobinary modulation with a lumped-element Mach-Zehnder device 有权
标题翻译：具有集总元件马赫 - 曾德设备的二进制调制
公开(公告)号：US07782520B2
公开(公告)日：2010-08-24
申请号：US11617350
申请日：2006-12-28
申请人： Andrew Adamiecki , Sethumadhavan Chandrasekhar , Christopher Doerr , David Nielson , Peter Winzer
发明人： Andrew Adamiecki , Sethumadhavan Chandrasekhar , Christopher Doerr , David Nielson , Peter Winzer
IPC分类号： G02F1/01 , G02F1/295
CPC分类号： H04B10/5167
摘要： Duobinary and NRZ modulation of an X-Gb/s optical signal is achieved with a lumped element InP Mach-Zehnder device configured to operate at X/k-Gb/s where k>1 and arranged in a push-pull configuration.
摘要翻译：使用集成元件InP Mach-Zehnder器件实现X-Gb / s光信号的二进制和NRZ调制，其被配置为以k> 1并且以推挽配置布置的X / k-Gb / s操作。

5. 发明申请

US20050122954A1 Electrical backplane transmission using duobinary signaling 有权
标题翻译：使用双二进制信号的电气背板传输
公开(公告)号：US20050122954A1
公开(公告)日：2005-06-09
申请号：US10727450
申请日：2003-12-04
申请人： Andrew Adamiecki , Jeffrey Sinsky
发明人： Andrew Adamiecki , Jeffrey Sinsky
IPC分类号： H04L25/02 , H03M5/18 , H04B7/155 , H04L12/28 , H04L25/03 , H04L25/49
CPC分类号： H04L25/4925 , H04L25/03343 , H04L2025/03363 , H04L2025/03477
摘要： A (binary) signal is transmitted through an electrical backplane, and the received signal is interpreted as a duobinary signal. In order to ensure that the received signal can be properly interpreted as a duobinary signal, the data signal is preferably filtered prior to being interpreted. The filter is preferably designed such that the combination of filter and the backplane approximates a binary-to-duobinary converter. In one embodiment, an (FIR-based) equalizing filter is applied to the data signal prior to transmission to emphasize the high-frequency components and flatten the group delay of the backplane. The resulting, received duobinary signal is converted into a binary signal by (1) splitting the duobinary signal, (2) applying each copy to a suitably thresholded comparator, and (3) applying the comparator outputs to a suitable (e.g., XOR) logic gate. The transmission system enables high-speed data (e.g., greater than 10 Gb/s) to be transmitted over relatively inexpensive electrical backplanes.
摘要翻译：一个（二进制）信号通过一个电背板传输，接收到的信号被解释为二进制信号。为了确保接收的信号能够被正确地解释为双二进制信号，数据信号优选在被解释之前被滤波。滤波器优选地设计成使得滤波器和背板的组合近似于二进制到二进制转换器。在一个实施例中，在发送之前将（FIR）均衡滤波器应用于数据信号，以强调高频分量并且平坦化背板的组延迟。通过（1）分割二进制信号将所得到的双二进制信号转换为二进制信号，（2）将每个副本应用于适当阈值的比较器，以及（3）将比较器输出应用于合适的（例如，XOR）逻辑门。传输系统使得能够通过相对便宜的电气背板传输高速数据（例如，大于10Gb / s）。

6. 发明申请

US20050024253A1 Duobinary-to-binary signal converter 审中-公开
标题翻译：二进制到二进制信号转换器
公开(公告)号：US20050024253A1
公开(公告)日：2005-02-03
申请号：US10630422
申请日：2003-07-30
申请人： Andrew Adamiecki , Jeffrey Sinsky
发明人： Andrew Adamiecki , Jeffrey Sinsky
IPC分类号： H04L25/497 , H03M5/18 , H03M1/56
CPC分类号： H03M5/18
摘要： In one embodiment, a duobinary-to-binary signal converter includes a pair of comparators coupled to a logic gate. Each comparator receives a copy of a duobinary-encoded analog signal applied to the converter and is designed to generate a binary output based on the comparison of the magnitude of the received signal with a corresponding threshold voltage. The outputs of the comparators are fed into the logic gate, which generates a binary sequence corresponding to the duobinary-encoded signal. A representative converter of the invention can perform relatively well at bit rates as high as about 40 Gb/s and can be conveniently incorporated into an appropriate integrated device (e.g., an ASIC) for a data transmission system employing duobinary signaling.
摘要翻译：在一个实施例中，双二进制到二进制信号转换器包括耦合到逻辑门的一对比较器。每个比较器接收施加到转换器的二进制编码的模拟信号的副本，并且被设计为基于接收信号的幅度与对应的阈值电压的比较来产生二进制输出。比较器的输出被馈送到逻辑门，其产生对应于双二进制编码信号的二进制序列。本发明的代表性转换器可以以高达约40Gb / s的比特率执行相对较好的并且可以方便地并入用于采用双向信令的数据传输系统的适当的集成器件（例如，ASIC）中。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式