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    • 1. 发明申请
    • Tuning High-Side and Low-Side CMOS Data-Paths in CML-to-CMOS Signal Converter
    • 调谐CML到CMOS信号转换器中的高边和低边CMOS数据通路
    • US20100244899A1
    • 2010-09-30
    • US12413723
    • 2009-03-30
    • Anamul HoqueCameron C. Rabe
    • Anamul HoqueCameron C. Rabe
    • H03K19/0175H03K19/094
    • H03K19/018528
    • Electronic circuitry and techniques are disclosed for controlling one or more timing parameters associated with a circuit that converts a signal of a first type to a signal of a second type. For example, the converter circuit may convert a differential digital logic signal, such as a current mode logic (CML) signal, to a complementary metal oxide semiconductor (CMOS) signal. For example, apparatus for converting a first type of signal to a second type of signal comprises the following circuitry. First circuitry is configured for generating a first pair of CMOS signals in response to a differential digital logic signal, the first pair of CMOS signals comprising a first CMOS signal having a first polarity and a second CMOS signal having a second polarity. Second circuitry is configured for adjusting, with respect to the first pair of CMOS signals, a transition time of one of the first CMOS signal and the second CMOS signal relative to a transition time of another of the first CMOS signal and the second CMOS signal.
    • 公开了电子电路和技术,用于控制与将第一类型的信号转换为第二类型的信号的电路相关联的一个或多个定时参数。 例如,转换器电路可以将诸如电流模式逻辑(CML)信号的差分数字逻辑信号转换为互补金属氧化物半导体(CMOS)信号。 例如,用于将第一类型的信号转换为第二类型的信号的装置包括以下电路。 第一电路被配置为响应于差分数字逻辑信号产生第一对CMOS信号,第一对CMOS信号包括具有第一极性的第一CMOS信号和具有第二极性的第二CMOS信号。 第二电路被配置为相对于第一CMOS信号相对于第一CMOS信号和第二CMOS信号中的另一个的转变时间来调整第一CMOS信号和第二CMOS信号中的一个的转变时间。
    • 2. 发明授权
    • Storage device having degauss circuitry with separate control of degauss signal steady state and overshoot portions
    • 具有消磁电路的存储装置具有单独控制的消磁信号稳态和过冲部分
    • US08705196B2
    • 2014-04-22
    • US13447741
    • 2012-04-16
    • Boris LivshitzAnamul HoqueJason S. Goldberg
    • Boris LivshitzAnamul HoqueJason S. Goldberg
    • G11B5/02
    • G11B20/10481G11B5/465G11B2220/2516
    • A hard disk drive or other disk-based storage device comprises a storage disk, a write head configured to write data to the disk, and control circuitry coupled to the write head. The control circuitry comprises a write driver and degauss circuitry associated with the write driver. The degauss circuitry is configured to control a degauss signal waveform to be applied to the write head by the write driver, and comprises separate amplitude envelope control mechanisms for steady state and overshoot portions of the degauss signal waveform. The separate amplitude envelope control mechanisms may comprise, for example, separate steady state and overshoot controllers for controlling the amplitude envelope decay rates of the respective steady state and overshoot portions of the degauss signal waveform over the plurality of pulses.
    • 硬盘驱动器或其他基于磁盘的存储设备包括存储盘,被配置为向盘写入数据的写入头以及耦合到写入头的控制电路。 控制电路包括与写入驱动器相关联的写入驱动器和消磁电路。 消磁电路被配置为控制由写入驱动器施加到写入头的消磁信号波形,并且包括用于消磁信号波形的稳态和过冲部分的单独的幅度包络控制机构。 单独的幅度包络控制机构可以包括例如单独的稳态和过冲控制器,用于控制各个稳态的幅度包络衰减速率以及多个脉冲上的消磁信号波形的部分。
    • 3. 发明申请
    • REFERENCE VOLTAGE CIRCUIT FOR ADAPTIVE POWER SUPPLY
    • 用于自适应电源的参考电压电路
    • US20130201578A1
    • 2013-08-08
    • US13367473
    • 2012-02-07
    • Anamul HoqueCameron C. Rabe
    • Anamul HoqueCameron C. Rabe
    • G11B21/02G05F3/02
    • G06F1/26
    • Interface circuitry of a storage device or other type of processing device comprises at least one data path, and an adaptive power supply configured to provide a variable supply voltage to the data path. The adaptive power supply comprises a reference voltage circuit having a plurality of field effect transistors collectively configured to provide a variable reference voltage, with different ones of the field effect transistors being biased into different operating regions. For example, a first subset of the field effect transistors may each be biased into a linear region such that the variable reference voltage tracks variations in on-resistance of one or more corresponding field effect transistors of the data path, and a second subset of the field effect transistors may each be biased into a saturation region such that the variable reference voltage tracks variations in threshold voltage of the corresponding field effect transistors of the data path.
    • 存储设备或其他类型的处理设备的接口电路包括至少一个数据路径和被配置为向数据路径提供可变供电电压的自适应电源。 自适应电源包括具有多个场效应晶体管的参考电压电路,其共同配置为提供可变参考电压,其中不同的场效应晶体管被偏置到不同的工作区域中。 例如,场效应晶体管的第一子集可以各自被偏置到线性区域中,使得可变参考电压跟踪数据路径的一个或多个相应的场效应晶体管的导通电阻的变化,以及第二子集 场效应晶体管可以各自被偏置到饱和区域中,使得可变参考电压跟踪数据路径的相应场效应晶体管的阈值电压的变化。
    • 4. 发明授权
    • Tuning high-side and low-side CMOS data-paths in CML-to-CMOS signal converter
    • 调整CML至CMOS信号转换器中的高边和低边CMOS数据路径
    • US07928765B2
    • 2011-04-19
    • US12413723
    • 2009-03-30
    • Anamul HoqueCameron C. Rabe
    • Anamul HoqueCameron C. Rabe
    • H03K19/094
    • H03K19/018528
    • Electronic circuitry and techniques are disclosed for controlling one or more timing parameters associated with a circuit that converts a signal of a first type to a signal of a second type. For example, the converter circuit may convert a differential digital logic signal, such as a current mode logic (CML) signal, to a complementary metal oxide semiconductor (CMOS) signal. For example, apparatus for converting a first type of signal to a second type of signal comprises the following circuitry. First circuitry is configured for generating a first pair of CMOS signals in response to a differential digital logic signal, the first pair of CMOS signals comprising a first CMOS signal having a first polarity and a second CMOS signal having a second polarity. Second circuitry is configured for adjusting, with respect to the first pair of CMOS signals, a transition time of one of the first CMOS signal and the second CMOS signal relative to a transition time of another of the first CMOS signal and the second CMOS signal.
    • 公开了电子电路和技术,用于控制与将第一类型的信号转换为第二类型的信号的电路相关联的一个或多个定时参数。 例如,转换器电路可以将诸如电流模式逻辑(CML)信号的差分数字逻辑信号转换为互补金属氧化物半导体(CMOS)信号。 例如,用于将第一类型的信号转换为第二类型的信号的装置包括以下电路。 第一电路被配置为响应于差分数字逻辑信号产生第一对CMOS信号,第一对CMOS信号包括具有第一极性的第一CMOS信号和具有第二极性的第二CMOS信号。 第二电路被配置为相对于第一CMOS信号相对于第一CMOS信号和第二CMOS信号中的另一个的转变时间来调整第一CMOS信号和第二CMOS信号中的一个的转变时间。
    • 5. 发明授权
    • Reference voltage circuit for adaptive power supply
    • 用于自适应电源的参考电压电路
    • US08687302B2
    • 2014-04-01
    • US13367473
    • 2012-02-07
    • Anamul HoqueCameron C. Rabe
    • Anamul HoqueCameron C. Rabe
    • G11B5/09
    • G06F1/26
    • Interface circuitry of a storage device or other type of processing device comprises at least one data path, and an adaptive power supply configured to provide a variable supply voltage to the data path. The adaptive power supply comprises a reference voltage circuit having a plurality of field effect transistors collectively configured to provide a variable reference voltage, with different ones of the field effect transistors being biased into different operating regions. For example, a first subset of the field effect transistors may each be biased into a linear region such that the variable reference voltage tracks variations in on-resistance of one or more corresponding field effect transistors of the data path, and a second subset of the field effect transistors may each be biased into a saturation region such that the variable reference voltage tracks variations in threshold voltage of the corresponding field effect transistors of the data path.
    • 存储设备或其他类型的处理设备的接口电路包括至少一个数据路径和被配置为向数据路径提供可变供电电压的自适应电源。 自适应电源包括具有多个场效应晶体管的参考电压电路,其共同配置为提供可变参考电压,其中不同的场效应晶体管被偏置到不同的工作区域中。 例如,场效应晶体管的第一子集可以各自被偏置到线性区域中,使得可变参考电压跟踪数据路径的一个或多个相应的场效应晶体管的导通电阻的变化,以及第二子集 场效应晶体管可以各自被偏置到饱和区域中,使得可变参考电压跟踪数据路径的相应场效应晶体管的阈值电压的变化。
    • 9. 发明授权
    • Storage device having degauss circuitry generating degauss signal with multiple decay segments
    • 具有消磁电路的存储装置产生具有多个衰减段的消磁信号
    • US08737006B2
    • 2014-05-27
    • US13606279
    • 2012-09-07
    • Boris LivshitzPaul MazurAnamul Hoque
    • Boris LivshitzPaul MazurAnamul Hoque
    • G11B5/012
    • G11B5/465
    • A hard disk drive or other disk-based storage device comprises a storage disk, a write head configured to write data to the disk, and control circuitry coupled to the write head. The control circuitry comprises a write driver and degauss circuitry associated with the write driver. The degauss circuitry is configured to generate a degauss signal to be applied to the write head by the write driver. The degauss signal has a waveform comprising a plurality of decay segments including at least one alternating current decay segment and at least one direct current decay segment. An initial decay segment of the plurality of decay segments may comprise an alternating current decay segment or a direct current decay segment, and may be immediately followed by a decay segment of the opposite type.
    • 硬盘驱动器或其他基于磁盘的存储设备包括存储盘,被配置为向盘写入数据的写入头以及耦合到写入头的控制电路。 控制电路包括与写入驱动器相关联的写入驱动器和消磁电路。 消磁电路被配置为产生要由写入驱动器施加到写入头的消磁信号。 消磁信号具有包括多个衰减段的波形,包括至少一个交流衰减段和至少一个直流衰减段。 多个衰减段的初始衰减段可以包括交流衰减段或直流衰减段,并且可以紧接着是相反类型的衰减段。
    • 10. 发明申请
    • STORAGE DEVICE HAVING DEGAUSS CIRCUITRY GENERATING DEGAUSS SIGNAL WITH MULTIPLE DECAY SEGMENTS
    • 具有降解电路的存储器件产生具有多个衰减部分的信号
    • US20140071561A1
    • 2014-03-13
    • US13606279
    • 2012-09-07
    • Boris LivshitzPaul MazurAnamul Hoque
    • Boris LivshitzPaul MazurAnamul Hoque
    • G11B5/465
    • G11B5/465
    • A hard disk drive or other disk-based storage device comprises a storage disk, a write head configured to write data to the disk, and control circuitry coupled to the write head. The control circuitry comprises a write driver and degauss circuitry associated with the write driver. The degauss circuitry is configured to generate a degauss signal to be applied to the write head by the write driver. The degauss signal has a waveform comprising a plurality of decay segments including at least one alternating current decay segment and at least one direct current decay segment. An initial decay segment of the plurality of decay segments may comprise an alternating current decay segment or a direct current decay segment, and may be immediately followed by a decay segment of the opposite type.
    • 硬盘驱动器或其他基于磁盘的存储设备包括存储盘,被配置为向盘写入数据的写入头以及耦合到写入头的控制电路。 控制电路包括与写入驱动器相关联的写入驱动器和消磁电路。 消磁电路被配置为产生要由写入驱动器施加到写入头的消磁信号。 消磁信号具有包括多个衰减段的波形,包括至少一个交流衰减段和至少一个直流衰减段。 多个衰减段的初始衰减段可以包括交流衰减段或直流衰减段,并且可以紧接着是相反类型的衰减段。