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1. 发明授权

US06571335B1 System and method for authentication of off-chip processor firmware code 有权
标题翻译：片外处理器固件代码认证的系统和方法
公开(公告)号：US06571335B1
公开(公告)日：2003-05-27
申请号：US09282948
申请日：1999-04-01
申请人： Amy O'Donnell , George Thangadurai , Anand Rajan
发明人： Amy O'Donnell , George Thangadurai , Anand Rajan
IPC分类号： G06F1130
CPC分类号： G06F21/57 , G06F21/64
摘要： An electronic system and corresponding method for authenticating firmware stored in a memory element external to a processor. In one embodiment, an electronic system comprises a processor and a memory element. The memory element is used to contain firmware and a digital signature of the firmware signed by a signatory. Coupled to the memory element, the processor authenticates the firmware during a predetermined condition, which occurs prior to execution of the firmware, through use of a pre-stored public key of the signatory and a pre-stored digital signature function.
摘要翻译：一种用于认证存储在处理器外部的存储器元件中的固件的电子系统和相应方法。在一个实施例中，电子系统包括处理器和存储元件。存储器元件用于包含由签名人签名的固件和固件的数字签名。耦合到存储器元件的处理器通过使用预先存储的签名者的公开密钥和预先存储的数字签名功能，在执行固件之前发生的预定条件下对固件进行认证。

2. 发明授权

US06754828B1 Algorithm for non-volatile memory updates 有权
标题翻译：用于非易失性存储器更新的算法
公开(公告)号：US06754828B1
公开(公告)日：2004-06-22
申请号：US09352715
申请日：1999-07-13
申请人： Suresh Marisetty , Andrew J. Fish , Yan Li , Mani Ayyar , Amy O'Donnell , George Thangadurai , Sham M. Datta
发明人： Suresh Marisetty , Andrew J. Fish , Yan Li , Mani Ayyar , Amy O'Donnell , George Thangadurai , Sham M. Datta
IPC分类号： G06F942
CPC分类号： G06F8/65
摘要： A novel processor architecture and algorithms are provided which improve non-volatile memory updates and increases processor performance in successive generations of processors. A new processor architecture is supported by a software model consisting of two new firmware layers and the legacy 32 bit basic input output system (BIOS) firmware. The new firmware layers consist of a Processor Abstraction Layer (PAL) and a System Abstraction Layer (SAL). The PAL and SAL have procedure calls which allow updates of the firmware components in the non-volatile memory of a system, e.g. non-volatile ROM. The present invention includes invoking a system abstraction layer update procedure to implement a new input binary into the non-volatile memory. An algorithm for the non-volatile memory includes selecting a lead processor to perform an update and using the system abstraction layer update procedure. The system abstraction layer update procedure is used to call an appropriate authentication routine. The system abstraction layer update procedure is used to call a specific non-volatile memory implementation routine.
摘要翻译：提供了一种新颖的处理器架构和算法，其改进了非易失性存储器更新并且在连续几代处理器中提高了处理器性能。由两个新固件层和传统32位基本输入输出系统（BIOS）固件组成的软件模型支持新的处理器架构。新的固件层由处理器抽象层（PAL）和系统抽象层（SAL）组成。 PAL和SAL具有允许更新系统的非易失性存储器中的固件组件的过程调用，例如，非易失性ROM。本发明包括调用系统抽象层更新过程以将新的输入二进制文件实现到非易失性存储器中。用于非易失性存储器的算法包括选择引导处理器来执行更新并使用系统抽象层更新过程。系统抽象层更新过程用于调用适当的认证例程。系统抽象层更新过程用于调用特定的非易失性存储器实现例程。

3. 发明授权

US06587947B1 System and method for verification of off-chip processor code 有权
标题翻译：用于片外处理器代码验证的系统和方法
公开(公告)号：US06587947B1
公开(公告)日：2003-07-01
申请号：US09283062
申请日：1999-04-01
申请人： Amy O'Donnell , George Thangadurai , Anand Rajan
发明人： Amy O'Donnell , George Thangadurai , Anand Rajan
IPC分类号： G06F1130
CPC分类号： G06F21/57 , G06F21/64
摘要： An electronic system and corresponding method for verifying the integrity of code that is stored off-chip. The electronic system comprises a memory element to store Processor Abstraction Layer (PAL) code and a processor coupled to the memory element. The processor verifies the integrity of the PAL code prior to execution of the PAL code.
摘要翻译：一种用于验证芯片外存储的代码完整性的电子系统和相应的方法。电子系统包括存储处理器抽象层（PAL）代码的存储器元件和耦合到存储元件的处理器。处理器在执行PAL代码之前验证PAL码的完整性。

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