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1. 发明授权

US08594092B2 Packet relay method and device 有权
标题翻译：分组中继方法和设备
公开(公告)号：US08594092B2
公开(公告)日：2013-11-26
申请号：US11959615
申请日：2007-12-19
申请人： Satoshi Nemoto , Hiroshi Tomonaga , Akihiro Hata
发明人： Satoshi Nemoto , Hiroshi Tomonaga , Akihiro Hata
IPC分类号： H04L12/28
CPC分类号： H04L49/552 , H04L49/1515 , H04L49/205
摘要： In a packet relay method and device which can reduce a congestion of switching even when segment data are concentrated, segment data dividing portions respectively extract a destination address and a packet length from received packets, divide the packets into predetermined length data based on each packet length, and generates location information indicating locations in the packets respectively for the data. The segment data dividing portions add segment headers in which the location information, the destination address, and an address of its own device as a source address are set are added to each of the data, generate segment data, and provide the segment data to switches within a switch card in parallel.
摘要翻译：在分组中继方法和装置中，即使在分段数据集中的情况下也可以减少切换拥塞，分段数据分割部分从接收到的分组分别提取目的地址和分组长度，根据每个分组长度将分组划分成预定长度的数据并分别产生指示数据包中的位置的位置信息。分段数据分割部分添加分段报头，其中设置作为源地址的其自身设备的位置信息，目的地址和地址被设置为每个数据，生成分段数据，并将分段数据提供给切换在开关卡内并行。

2. 发明申请

US20090245104A1 APPARATUS AND METHOD FOR CONTROLLING BUFFERING OF AN ARRIVAL PACKET 有权
标题翻译：用于控制抵达包的缓冲的装置和方法
公开(公告)号：US20090245104A1
公开(公告)日：2009-10-01
申请号：US12404502
申请日：2009-03-16
申请人： Kazuto NISHIMURA , Hiroshi TOMONAGA , Akihiro HATA , Masamichi KASA
发明人： Kazuto NISHIMURA , Hiroshi TOMONAGA , Akihiro HATA , Masamichi KASA
IPC分类号： H04L12/56
CPC分类号： H04L47/283 , H04L47/10 , H04L47/32 , H04L49/505
摘要： An apparatus for controlling buffering of an arrival packet. The apparatus includes a packet buffer for temporarily storing each of one or more packets to be transmitted in association with an arrival time thereof, and a packet discard section for determining an arrival packet to be discarded or to be stored in the packet buffer, based on a discard condition defined by using a packet residence time that is calculated on the basis of one or more residence times of one or more packets staying in the packet buffer, wherein the arrival packet is defined as a packet that has newly arrived at the apparatus.
摘要翻译：一种用于控制到达分组的缓冲的装置。该装置包括：分组缓冲器，用于临时存储与其到达时间相关联的要发送的一个或多个分组中的每一个;以及分组丢弃部分，用于基于丢弃或要存储在分组缓冲器中的到达分组，基于通过使用基于停留在分组缓冲器中的一个或多个分组的一个或多个停留时间计算的分组停留时间定义的丢弃条件，其中到达分组被定义为新到达该设备的分组。

3. 发明申请

US20060045091A1 Transmission device 审中-公开
标题翻译：传输设备
公开(公告)号：US20060045091A1
公开(公告)日：2006-03-02
申请号：US11062630
申请日：2005-02-23
申请人： Akihiro Hata
发明人： Akihiro Hata
IPC分类号： H04L12/56
CPC分类号： H04L49/555 , H04L45/18 , H04L49/351
摘要： A switching device provides a technique for detecting, in a switch equipped in a layer-2 network, frame forwarding loops in a network. The switching device comprises an interface part operable to input a frame, a switching part operable to switch in accordance with a destination address of the input frame, a comparing part operable to compare a switch identifier recorded in the input frame with its own switch identifier, and a notifying part operable to provide notification of a match when comparison results obtained by the comparing part match.
摘要翻译：交换设备提供了一种用于在配备在二层网络中的交换机中检测网络中的帧转发环路的技术。切换装置包括可操作以输入帧的接口部分，可操作以根据输入帧的目的地地址切换的切换部分，可操作以将记录在输入帧中的交换机标识符与其自己的交换机标识符进行比较的比较部分，以及通知部，用于当由所述比较部分获得的比较结果匹配时，提供匹配的通知。

4. 发明授权

US06010922A Semiconductor device with increased distance between channel edges and a gate electrode 失效
标题翻译：具有增加通道边缘与栅电极之间距离的半导体器件
公开(公告)号：US06010922A
公开(公告)日：2000-01-04
申请号：US996121
申请日：1997-12-22
申请人： Akihiro Hata , Takashi Funai , Masahiro Adachi
发明人： Akihiro Hata , Takashi Funai , Masahiro Adachi
IPC分类号： G02F1/136 , G02F1/1368 , H01L21/336 , H01L29/423 , H01L29/786 , H01L21/00 , H01L21/84
CPC分类号： H01L29/66757 , H01L29/42384 , H01L29/78633
摘要： The semiconductor device of this invention includes a substrate having an insulating surface and a thin film transistor formed on the substrate, wherein the thin film transistor has a semiconductor island including a channel region and source/drain regions, a gate insulating film formed on the semiconductor island and a gate electrode covering the channel region of the semiconductor island interposing the gate insulating film therebetween, and wherein a distance between an edge of the channel region of the semiconductor island and the gate electrode is larger than a distance between a central portion of the channel region of the semiconductor island and the gate electrode.
摘要翻译：本发明的半导体器件包括具有绝缘表面的衬底和形成在衬底上的薄膜晶体管，其中薄膜晶体管具有包括沟道区和源极/漏极区的半导体岛，形成在半导体上的栅极绝缘膜岛和覆盖半导体岛的沟道区域的栅极电极，其间插入栅极绝缘膜，并且其中半导体岛的沟道区域的边缘与栅电极之间的距离大于所述半导体岛的中心部分之间的距离沟道区域和栅电极。

5. 发明授权

US08737227B2 Packet transmission device, memory control circuit, and packet transmission method 有权
标题翻译：分组传输设备，存储器控制电路和分组传输方法
公开(公告)号：US08737227B2
公开(公告)日：2014-05-27
申请号：US13555809
申请日：2012-07-23
申请人： Akihiro Hata , Atsushi Kitada , Yuji Ikegami
发明人： Akihiro Hata , Atsushi Kitada , Yuji Ikegami
IPC分类号： G08C15/00
CPC分类号： H04L47/6215 , H04L47/527
摘要： A packet transmission device includes a buffer stores packet data in any of queues, a queue manager outputs queue-status signals indicating whether or not transmittable packet data exists in the corresponding one of the queues, a bandwidth controller outputs token-status signals indicating whether or not an amount of the tokens accumulated at a certain period for the corresponding queue is larger than a token threshold provided for the corresponding queue, a queue selector preferentially selects any queue whose duration time of a transmittable state in which the corresponding queue status signal indicates that transmittable packet data exists in the corresponding queue and the corresponding token-status signal indicates that the amount of the accumulated tokens is larger than the token threshold provided for the corresponding queue is greater than a duration-time threshold provided for the corresponding queue, and a buffer reader controls reading of the packet data from the selected queue.
摘要翻译：分组发送装置包括缓冲器，将分组数据存储在任何队列中，队列管理器输出指示是否在可对应的一个队列中存在可发送分组数据的队列状态信号，带宽控制器输出表示是否或队列选择器优先选择队列选择器优先选择队列状态信号的持续时间，其中对应的队列状态信号表示对应的队列状态信号的持续时间，可发送的分组数据存在于对应的队列中，相应的令牌状态信号指示累积令牌的数量大于为相应队列提供的令牌阈值大于为相应队列提供的持续时间阈值，缓冲读取器控制从所选择的数据包中读取数据包的意思

6. 发明授权

US08488630B2 Transmission device and transmitting method 失效
标题翻译：传输设备和传输方式
公开(公告)号：US08488630B2
公开(公告)日：2013-07-16
申请号：US13089355
申请日：2011-04-19
申请人： Akihiro Hata
发明人： Akihiro Hata
IPC分类号： H04L12/56
CPC分类号： H04L12/4633 , H04L1/0061 , H04L49/00 , H04L69/324
摘要： A transmission device which capsules and decapsules data of a frame and/or a packet includes a decapsuling circuit, wherein the decapsuling circuit includes a bit de-stuff processor configured to perform bit de-stuffing processing on an input data; a byte de-stuff processor configured to perform byte de-stuffing processing on duplicated data of the input data; a check processor configured to perform frame check sequence (FCS) processing on output from the bit de-stuff processor and the byte de-stuff processor; and a mode determination circuit configured to determine a stuffing mode of an opposite transmission device, based on a code conversion result from the bit de-stuff processor and the byte de-stuff processor and the stuffing mode in which the check processor detects the input data with a normal FCS.
摘要翻译：一种传输装置，其包含一个帧和/或一个分组的胶囊和数据包的解封装数据包括一个解封装电路，其中该解封装电路包括一个配置成对一个输入数据进行位去填充处理的位去处理处理器; 一个字节解码处理器，被配置为对输入数据的复制数据执行字节解压缩处理; 配置为对来自所述位解除处理器和所述字节解除处理器的输出执行帧校验序列（FCS）处理的检验处理器; 以及模式确定电路，其被配置为基于来自所述比特解除处理器和所述字节解除处理器的代码转换结果以及所述检查处理器检测到所述输入数据的填充模式来确定相对传输装置的填充模式与正常的FCS。

7. 发明授权

US08432925B2 Apparatus and method for controlling buffering of an arrival packet 有权
标题翻译：用于控制到达分组的缓冲的装置和方法
公开(公告)号：US08432925B2
公开(公告)日：2013-04-30
申请号：US12404502
申请日：2009-03-16
申请人： Kazuto Nishimura , Hiroshi Tomonaga , Akihiro Hata , Masamichi Kasa
发明人： Kazuto Nishimura , Hiroshi Tomonaga , Akihiro Hata , Masamichi Kasa
IPC分类号： H04L12/56
CPC分类号： H04L47/283 , H04L47/10 , H04L47/32 , H04L49/505
摘要： An apparatus for controlling buffering of an arrival packet. The apparatus includes a packet buffer for temporarily storing each of one or more packets to be transmitted in association with an arrival time thereof, and a packet discard section for determining an arrival packet to be discarded or to be stored in the packet buffer, based on a discard condition defined by using a packet residence time that is calculated on the basis of one or more residence times of one or more packets staying in the packet buffer, wherein the arrival packet is defined as a packet that has newly arrived at the apparatus.
摘要翻译：一种用于控制到达分组的缓冲的装置。该装置包括：分组缓冲器，用于临时存储与其到达时间相关联的要发送的一个或多个分组中的每一个;以及分组丢弃部分，用于基于丢弃或要存储在分组缓冲器中的到达分组，基于通过使用基于停留在分组缓冲器中的一个或多个分组的一个或多个停留时间计算的分组停留时间定义的丢弃条件，其中到达分组被定义为新到达该设备的分组。

8. 发明授权

US08306045B2 Packet forwarding apparatus and method for discarding packets 有权
标题翻译：用于丢弃分组的分组转发装置和方法
公开(公告)号：US08306045B2
公开(公告)日：2012-11-06
申请号：US12361655
申请日：2009-01-29
申请人： Akihiro Hata , Hiroshi Tomonaga , Katsumi Imamura
发明人： Akihiro Hata , Hiroshi Tomonaga , Katsumi Imamura
IPC分类号： G06F3/00 , G06F5/00 , H04L12/28 , H04L12/56
CPC分类号： H04L47/10 , H04L47/283 , H04L47/32 , H04L49/254 , H04L49/503 , H04L49/90 , H04L49/9047 , H04L49/9078
摘要： The packet forwarding apparatus of the present invention includes a packet buffer for temporarily storing packets to be forwarded, a timer for measuring the time of every predetermined unit period, a plurality of first queues corresponding to each of a plurality of address groups that form the packet buffer, a plurality of second queues that are provided corresponding to the property of the packets, a first controller for executing the writing of the packets, and a second controller for executing the discarding of the packets. According to this invention, through managing the first queues and the second queues, packets in the packet buffer can be discarded without the packets being read from the packet buffer.
摘要翻译：本发明的分组转发装置包括用于临时存储要转发的分组的分组缓冲器，用于测量每个预定单位周期的时间的定时器，对应于形成分组的多个地址组中的每一个的多个第一队列缓冲器，对应于分组的属性提供的多个第二队列，用于执行分组的写入的第一控制器，以及用于执行丢弃分组的第二控制器。根据本发明，通过管理第一队列和第二队列，可以丢弃分组缓冲器中的分组，而不从分组缓冲器读取分组。

9. 发明申请

US20110268136A1 TRANSMISSION DEVICE AND TRANSMITTING METHOD 失效
标题翻译：传输设备和传输方法
公开(公告)号：US20110268136A1
公开(公告)日：2011-11-03
申请号：US13089355
申请日：2011-04-19
申请人： Akihiro Hata
发明人： Akihiro Hata
IPC分类号： H04L12/56
CPC分类号： H04L12/4633 , H04L1/0061 , H04L49/00 , H04L69/324
摘要： A transmission device which capsules and decapsules data of a frame and/or a packet includes a decapsuling circuit, wherein the decapsuling circuit includes a bit de-stuff processor configured to perform bit de-stuffing processing on an input data; a byte de-stuff processor configured to perform byte de-stuffing processing on duplicated data of the input data; a check processor configured to perform frame check sequence (FCS) processing on output from the bit de-stuff processor and the byte de-stuff processor; and a mode determination circuit configured to determine a stuffing mode of an opposite transmission device, based on a code conversion result from the bit de-stuff processor and the byte de-stuff processor and the stuffing mode in which the check processor detects the input data with a normal FCS.
摘要翻译：一种传输装置，其包含一个帧和/或一个分组的胶囊和数据包的解封装数据包括一个解封装电路，其中该解封装电路包括一个配置成对一个输入数据进行位去填充处理的位去处理处理器; 一个字节解码处理器，被配置为对输入数据的复制数据执行字节解压缩处理; 配置为对来自所述位解除处理器和所述字节解除处理器的输出执行帧校验序列（FCS）处理的检验处理器; 以及模式确定电路，其被配置为基于来自所述比特解除处理器和所述字节解除处理器的代码转换结果以及所述检查处理器检测到所述输入数据的填充模式来确定相对传输装置的填充模式与正常的FCS。

10. 发明授权

US5747828A Semiconductor device with increased distance between channel edges and a gate electrode 失效
标题翻译：具有增加通道边缘与栅电极之间距离的半导体器件
公开(公告)号：US5747828A
公开(公告)日：1998-05-05
申请号：US623559
申请日：1996-03-28
申请人： Akihiro Hata , Takashi Funai , Masahiro Adachi
发明人： Akihiro Hata , Takashi Funai , Masahiro Adachi
IPC分类号： G02F1/136 , G02F1/1368 , H01L21/336 , H01L29/423 , H01L29/786 , H01L29/76
CPC分类号： H01L29/66757 , H01L29/42384 , H01L29/78633
摘要： The semiconductor device of this invention includes a substrate having an insulating surface and a thin film transistor formed on the substrate, wherein the thin film transistor has a semiconductor island including a channel region and source/drain regions, a gate insulating film formed on the semiconductor island and a gate electrode covering the channel region of the semiconductor island interposing the gate insulating film therebetween, and wherein a distance between an edge of the channel region of the semiconductor island and the gate electrode is larger then a distance between a central portion of the channel region of the semiconductor island and the gate electrode.
摘要翻译：本发明的半导体器件包括具有绝缘表面的衬底和形成在衬底上的薄膜晶体管，其中薄膜晶体管具有包括沟道区和源极/漏极区的半导体岛，形成在半导体上的栅极绝缘膜岛和覆盖半导体岛的沟道区域的栅极电极，其间插入栅极绝缘膜，并且其中半导体岛的沟道区域的边缘与栅电极之间的距离大于所述半导体岛的中心部分之间的距离沟道区域和栅电极。

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