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1. 发明授权

US07978118B1 Algorithmic analog-to-digital conversion 有权
标题翻译：算法模数转换
公开(公告)号：US07978118B1
公开(公告)日：2011-07-12
申请号：US12697789
申请日：2010-02-01
申请人： Ahmed Abdell-Ra'oof Younis , Michael A. Nix
发明人： Ahmed Abdell-Ra'oof Younis , Michael A. Nix
IPC分类号： H03M1/34
CPC分类号： H03M1/0695 , H03M1/403
摘要： A 1.5-bit algorithmic analog-to-digital converter (ADC) generates a digital value representative of an input voltage. The ADC implements a series of conversion cycles for a conversion operation. Each conversion cycle has three sub-cycles: a scaling sub-cycle, a first sample sub-cycle, and a second sample sub-cycle. In the scaling sub-cycle, the residual voltage from the previous conversion cycle is doubled to generate a first voltage. In the first sample sub-cycle, a first bit of a corresponding bit pair is determined based on the polarity of the first voltage. The first voltage is either increased or decreased by a reference voltage based on the polarity of the first voltage to generate a second voltage. In the second sample sub-cycle, a second bit of the corresponding bit pair is determined based on the polarity of the second voltage. The second voltage then is either increased or decreased by the reference voltage based on the polarity of the second voltage to generate the residual voltage used for the next conversion cycle in the series. Each bit pair is mapped to a corresponding two-bit code value and the resulting code values are used to generate the digital value.
摘要翻译： 1.5位算法模数转换器（ADC）产生代表输入电压的数字值。 ADC实现了转换操作的一系列转换周期。每个转换周期具有三个子周期：缩放子周期，第一采样子周期和第二采样子周期。在缩放子周期中，来自先前转换周期的剩余电压加倍以产生第一电压。在第一采样子周期中，基于第一电压的极性来确定相应位对的第一位。基于第一电压的极性，第一电压被增加或减小参考电压以产生第二电压。在第二采样子周期中，基于第二电压的极性来确定相应位对的第二位。然后，基于第二电压的极性，第二电压被增加或减小参考电压，以产生用于该系列中的下一个转换周期的剩余电压。每个位对被映射到相应的两位代码值，并且所得到的代码值用于生成数字值。

2. 发明申请

US20110187569A1 ALGORITHMIC ANALOG-TO-DIGITAL CONVERSION 有权
标题翻译：算术模拟数字转换
公开(公告)号：US20110187569A1
公开(公告)日：2011-08-04
申请号：US12697789
申请日：2010-02-01
申请人： Ahmed Abdell-Ra'oof Younis , Michael A. Nix
发明人： Ahmed Abdell-Ra'oof Younis , Michael A. Nix
IPC分类号： H03M1/12 , H03M1/00
CPC分类号： H03M1/0695 , H03M1/403
摘要： A 1.5-bit algorithmic analog-to-digital converter (ADC) generates a digital value representative of an input voltage. The ADC implements a series of conversion cycles for a conversion operation. Each conversion cycle has three sub-cycles: a scaling sub-cycle, a first sample sub-cycle, and a second sample sub-cycle. In the scaling sub-cycle, the residual voltage from the previous conversion cycle is doubled to generate a first voltage. In the first sample sub-cycle, a first bit of a corresponding bit pair is determined based on the polarity of the first voltage. The first voltage is either increased or decreased by a reference voltage based on the polarity of the first voltage to generate a second voltage. In the second sample sub-cycle, a second bit of the corresponding bit pair is determined based on the polarity of the second voltage. The second voltage then is either increased or decreased by the reference voltage based on the polarity of the second voltage to generate the residual voltage used for the next conversion cycle in the series. Each bit pair is mapped to a corresponding two-bit code value and the resulting code values are used to generate the digital value.
摘要翻译： 1.5位算法模数转换器（ADC）产生代表输入电压的数字值。 ADC实现了转换操作的一系列转换周期。每个转换周期具有三个子周期：缩放子周期，第一采样子周期和第二采样子周期。在缩放子周期中，来自先前转换周期的剩余电压加倍以产生第一电压。在第一采样子周期中，基于第一电压的极性来确定相应位对的第一位。基于第一电压的极性，第一电压被增加或减小参考电压以产生第二电压。在第二采样子周期中，基于第二电压的极性来确定相应位对的第二位。然后，基于第二电压的极性，第二电压被增加或减小参考电压，以产生用于该系列中的下一个转换周期的剩余电压。每个位对被映射到相应的两位代码值，并且所得到的代码值用于生成数字值。

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