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1. 发明授权

US6002453A Deflection with low offset 失效
标题翻译：偏移量偏低
公开(公告)号：US6002453A
公开(公告)日：1999-12-14
申请号：US941639
申请日：1997-09-30
申请人： Adrianus J. M. Van Tuijl , Erik Van Der Ven
发明人： Adrianus J. M. Van Tuijl , Erik Van Der Ven
IPC分类号： H04N3/16 , G09G1/04 , H04N3/22 , H04N3/233 , H04N5/68
CPC分类号： H04N3/22 , H04N3/233
摘要： A series arrangement of a deflection coil (Lf) and a series resistor (Rs) is connected between an output of a first output amplifier (1) and an output of a second output amplifier (2) to be driven in a bridge configuration for generating a deflection current (If) through the deflection coil (Lf). Across the series resistor (Rs), a voltage is generated which corresponds to the deflection current (If). A differential amplifier (5) has a first input connected to a first end of the series resistor (Rs). A second input of the differential amplifier (5) is connected to a second end of the series resistor (Rs) via a conversion resistor (Rc). An input current (Ii) is generated through the conversion resistor (Rc). The polarity of the input current (Ii) is selected to obtain a voltage across the conversion resistor (Rc) which has an opposite polarity with respect to the voltage across the series resistor (Rs). The differential amplifier (5) has two outputs connected to respective inputs of the first and the second output amplifiers (1, 2) to drive the two output amplifiers (1, 2) in a feedback loop in such a manner that the voltage across the series arrangement of the conversion resistor (Rc) and the series resistor (Rs) is substantially zero. In this way, the voltage swing between the inputs of the differential amplifier (5) is very low and thus the offset voltage caused will be very low.
摘要翻译：偏转线圈（Lf）和串联电阻（Rs）的串联布置连接在第一输出放大器（1）的输出端和第二输出放大器（2）的输出端之间，以桥式结构驱动以产生通过偏转线圈（Lf）的偏转电流（If）。跨串联电阻（Rs）产生对应于偏转电流（If）的电压。差分放大器（5）具有连接到串联电阻（Rs）的第一端的第一输入端。差分放大器（5）的第二输入端通过转换电阻器（Rc）连接到串联电阻器（Rs）的第二端。通过转换电阻（Rc）产生输入电流（Ii）。选择输入电流（Ii）的极性以获得相对于串联电阻器（Rs）两端的电压具有相反极性的转换电阻器（Rc）两端的电压。差分放大器（5）具有连接到第一和第二输出放大器（1,2）的相应输入的两个输出，以在反馈回路中驱动两个输出放大器（1,2），使得转换电阻器（Rc）和串联电阻器（Rs）的串联布置基本为零。以这种方式，差分放大器（5）的输入之间的电压摆幅非常低，因此引起的偏移电压将非常低。

2. 发明授权

US4607233A Push-pull amplifier circuit with stable class AB operation 失效
标题翻译：具有稳定AB类操作的推挽放大电路
公开(公告)号：US4607233A
公开(公告)日：1986-08-19
申请号：US706375
申请日：1985-02-27
申请人： Adrianus J. M. Van Tuijl
发明人： Adrianus J. M. Van Tuijl
IPC分类号： H03F3/30 , H03F1/30 , H03F1/32 , H03F3/20 , H03F3/26
CPC分类号： H03F1/307 , H03F1/3217
摘要： To obtain class AB operation of a push-pull amplifier which uses a preamplifier and an output amplifier having complementary output transistors, the base-emitter voltage of the first output transistor is converted into a current by a voltage-to-current converter and this current is re-converted into a base-emitter voltage by a current-to-voltage converter and added to the base-emitter voltage of the second output transistor. The sum of said base-emitter voltages is maintained equal to a reference voltage generated across two diode-connected transistors (T.sub.7, T.sub.8) by a differential amplifier.
摘要翻译：为了获得使用具有互补输出晶体管的前置放大器和输出放大器的推挽放大器的AB类操作，第一输出晶体管的基极 - 发射极电压由电压 - 电流转换器转换成电流，并且该电流通过电流 - 电压转换器被重新转换为基极 - 发射极电压，并加到第二输出晶体管的基极 - 发射极电压上。所述基极 - 发射极电压的总和保持等于由差分放大器在两个二极管连接的晶体管（T7，T8）上产生的参考电压。

3. 发明授权

US4591804A Cascode current-source arrangement having dual current paths 失效
标题翻译：串联电流源布置具有双电流路径
公开(公告)号：US4591804A
公开(公告)日：1986-05-27
申请号：US703147
申请日：1985-02-19
申请人： Adrianus J. M. van Tuijl
发明人： Adrianus J. M. van Tuijl
IPC分类号： G05F3/26 , H03F3/04
CPC分类号： G05F3/265
摘要： A current source arrangement includes a first and a second transistor arranged in cascode between an output terminal and the negative power-supply terminal. The arrangement further includes a current mirror circuit, a current source connected to the positive power-supply terminal being connected to an input current path which comprises a third transistor connected as a diode, a fourth transistor connected as a diode, and the collector-emitter path of a fifth transistor, which input current path is coupled to a second current path comprising a sixth transistor whose base is connected to the base of the third transistor, a resistor, and a seventh transistor connected as a diode, whose base is connected to the base of the fifth and the second transistor. Further, the base of the first transistor is connected to the emitter of the sixth transistor. In this arrangement the collector-emitter voltage of the second transistor is equal to the collector-emitter voltage of the fifth transistor, which is equal to the voltage across the resistor. If the voltage across this resistor is substantially lower than one base-emitter voltage, a comparatively low voltage is obtained on the collector of the first transistor. Moreover, the ratio between the currents through the second and the fifth transistor is defined accurately by the ratio between the emitter areas of these transistors.
摘要翻译：电流源装置包括在输出端子和负电源端子之间以级联布置的第一和第二晶体管。该装置还包括电流镜电路，连接到正电源端子的电流源连接到输入电流路径，该输入电流路径包括作为二极管连接的第三晶体管，作为二极管连接的第四晶体管和集电极 - 发射极第五晶体管的路径耦合到第二电流路径，第二电流路径包括第六晶体管，第六晶体管的基极连接到第三晶体管的基极，电阻器和连接成二极管的第七晶体管，其基极连接到第五和第二晶体管的基极。此外，第一晶体管的基极连接到第六晶体管的发射极。在这种布置中，第二晶体管的集电极 - 发射极电压等于第五晶体管的集电极 - 发射极电压，其等于电阻器两端的电压。如果该电阻器两端的电压基本上低于一个基极 - 发射极电压，则在第一晶体管的集电极上获得较低的电压。此外，通过第二晶体管和第五晶体管的电流之间的比率由这些晶体管的发射极区域之间的比率精确地定义。

4. 发明授权

US5059888A Series voltage regulating circuit having a parallel stabilizer 失效
标题翻译：具有并联稳压器的系列电压调节电路
公开(公告)号：US5059888A
公开(公告)日：1991-10-22
申请号：US501648
申请日：1990-03-29
申请人： Adrianus J. M. Van Tuijl
发明人： Adrianus J. M. Van Tuijl
IPC分类号： G05F1/10 , G05F1/56 , G05F1/618
CPC分类号： G05F1/618
摘要： A voltage-regulating circuit comprises a series voltage stabilizer which includes a regulation element (Q.sub.1) arranged in series with an output for supplying an output voltage to a load (Z.sub.L). A comparison circuit (Q2-Q7) control the regulation element. The comparison circuit has a first input connected to a reference-voltage circuit (T3, D1) and a second input for receiving at least a part of the output voltage of the series stabilizer. A parallel stabilizer (D2) is arranged in parallel with the output of the series stabilizer. The parallel stabilizer is adapted to generate an output voltage equal to that of the series stabilizer.

5. 发明授权

US4633100A Darlington transistor arrangement 失效
标题翻译：达林顿晶体管布置
公开(公告)号：US4633100A
公开(公告)日：1986-12-30
申请号：US706066
申请日：1985-02-27
申请人： Adrianus J. M. van Tuijl
发明人： Adrianus J. M. van Tuijl
IPC分类号： H03F3/20 , H03F3/30 , H03F3/34 , H03F3/343 , H03F3/50 , H03K3/26 , H03F3/04
CPC分类号： H03F3/3066 , H03F3/3435
摘要： The emitter of an input transistor (T.sub.1) of a Darlington transistor is connected to the base of an output transistor (T.sub.2). The collector of the input transistor (T.sub.1) is connected to the input of a current amplifier circuit comprising a third transistor (T.sub.3) arranged as a diode and having a first resistor (R.sub.1) arranged in its emitter circuit, and a fourth transistor (T.sub.4) having its base is connected to that of the third transistor (T.sub.3) and having a second resistor (R.sub.2) arranged in the emitter circuit. The collector of the fourth transistor (T.sub.4) is connected to the base of the output transistor (T.sub.2). The ratio between the resistance values of the first and the second resistors (R.sub.1, R.sub.2) is larger than the ratio between the emitter areas of the fourth and the third transistor (T.sub.4, T.sub.3). Thus, for small currents a low and for large currents a high current gain is obtained, so that the current gain factor of the output transistor (T.sub.2) which decreases for large currents is compensated for partly. Moreover, the base current of the input transistor (T.sub.1) remains small in the case of large output currents.
摘要翻译：达林顿晶体管的输入晶体管（T1）的发射极连接到输出晶体管（T2）的基极。输入晶体管（T1）的集电极连接到包括布置为二极管并具有布置在其发射极电路中的第一电阻器（R1）的第三晶体管（T3）的电流放大器电路的输入端，以及第四晶体管（T4 ）与第三晶体管（T3）的基极连接，并且具有布置在发射极电路中的第二电阻器（R2）。第四晶体管（T4）的集电极连接到输出晶体管（T2）的基极。第一和第二电阻器（R1，R2）的电阻值之比大于第四和第三晶体管（T4，T3）的发射极区域之间的比率。因此，对于小电流，获得高电流增益的低电流和大电流，从而部分地补偿大电流减小的输出晶体管（T2）的电流增益因子。此外，在大输出电流的情况下，输入晶体管（T1）的基极电流保持较小。

6. 发明授权

US5057841A Analog-to-digital converter 失效
标题翻译：模拟数字转换器
公开(公告)号：US5057841A
公开(公告)日：1991-10-15
申请号：US548347
申请日：1990-06-29
申请人： Jacob J. Veerhoek , Adrianus J. M. Van Tuijl , Han M. Schuurmans
发明人： Jacob J. Veerhoek , Adrianus J. M. Van Tuijl , Han M. Schuurmans
IPC分类号： H03M1/12 , H03M1/06 , H03M1/38 , H03M1/46
CPC分类号： H03M1/0695 , H03M1/46
摘要： A successive approximation analog-to-digital converter whose susceptibility to errors is reduced by the use of overlapping measurement ranges in the successive conversion steps.

7. 发明申请

US20090115518A1 DIFFERENTIAL AMPLIFIER WITH INPUT STAGE INVERTING COMMON-MODE SIGNALS 审中-公开
标题翻译：具有反相共模信号的输入阶段的差分放大器
公开(公告)号：US20090115518A1
公开(公告)日：2009-05-07
申请号：US12294221
申请日：2007-03-21
申请人： Adrianus J. M. Van Tuijl
发明人： Adrianus J. M. Van Tuijl
IPC分类号： H03F3/45
CPC分类号： H03F3/45717 , H03F3/45192 , H03F2203/45078 , H03F2203/45366
摘要： To eliminate common-mode components in differential input signals without the necessity of introducing a transformer and a special feedback loop for eliminating common-mode components, a differential amplifier (1) comprises a first input stage (11) for receiving differential input signals comprising common-mode signals and for outputting first differential intermediate signals, a second input stage (12) for inverting the common-mode signals and for combining inverted common-mode signals and the first differential intermediate signals into second differential intermediate signals, and an output stage (13) for receiving the second differential intermediate signals and for outputting differential output signals. The first input stage (11) comprises a folded cascode stage with first and second transistors (31,32), the second input stage (12) comprises a mirror stage with third, fourth, fifth, sixth and seventh transistors (33,34,35,36,37), and the output stage (13) comprises a common main electrode stage with tenth and eleventh transistors (40,41).
摘要翻译：为了消除差分输入信号中的共模分量而不需要引入变压器和用于消除共模分量的专用反馈回路，差分放大器（1）包括第一输入级（11），用于接收差分输入信号，包括公共模式信号并用于输出第一差分中间信号;第二输入级（12），用于将共模信号反相并将反相共模信号和第一差分中间信号组合成第二差分中间信号;以及输出级（ 13），用于接收第二差分中间信号并输出差分输出信号。第一输入级（11）包括具有第一和第二晶体管（31,32）的折叠共源共栅级，第二输入级（12）包括具有第三，第四，第五，第六和第七晶体管（33,34， 35,36,37），并且输出级（13）包括具有第十和第十一晶体管（40,41）的公共主电极级。

8. 发明授权

US4952866A Voltage-to-current converters 失效
标题翻译：电压 - 电流转换器
公开(公告)号：US4952866A
公开(公告)日：1990-08-28
申请号：US392634
申请日：1989-08-11
申请人： Adrianus J. M. Van Tuijl
发明人： Adrianus J. M. Van Tuijl
IPC分类号： H03F3/34 , G05F1/56 , H03F3/343 , H03F3/345 , H03F3/45 , H03F3/50
CPC分类号： H03F3/345 , G05F1/561 , H03F3/343 , H03F3/45071 , H03F3/45076 , H03F3/50
摘要： A voltage-to-current converter in which the base-emitter voltage of an output transistor (T1) is compensated by means of the base-emitter junction of a transistor (T2) so that the voltage across an impedance (Z1a) in series with the output transistor is equal to the input voltage (Vi). The current through the impedance (Z1a) is then equal to the output current Io, each of which is then linearly proportional to the input voltage (Vi).

9. 发明授权

US4661781A Amplifier with floating inverting and non-inverting inputs and stabilized direct output voltage level 失效
标题翻译：具有浮置反相和非反相输入和稳定的直接输出电压电平的放大器
公开(公告)号：US4661781A
公开(公告)日：1987-04-28
申请号：US703146
申请日：1985-02-19
申请人： Adrianus J. M. Van Tuijl
发明人： Adrianus J. M. Van Tuijl
IPC分类号： H03F3/20 , H03F3/30 , H03F3/343 , H03F3/45 , H03F3/68
CPC分类号： H03F3/45197 , H03F3/3066 , H03F3/343 , H03F3/45098
摘要： An amplifier having floating inverting and non-inverting inputs and a stabilized direct output voltage level. The amplifier comprises a preamplifier (10) and an output amplifier stage (20). The preamplifier (10) comprises a differential amplifier which comprises a first and a second transistor (T.sub.1, T.sub.2) between whose emitters a first resistor (R.sub.1) is arranged and whose emitters are connected to the positive direct power-supply terminal (2) by a first and a second current source (I.sub.1 =I, I.sub.2 =I) respectively. The collector of the second transistor (T.sub.2) is connected to the negative power-supply terminal (3) via a third current source (I.sub.3 =3.5I) and is coupled to the output (7) of the arrangement via a second resistor (R.sub.2). Two transistors (T.sub.3, T.sub.4) having commoned bases carrying a reference voltage (V.sub.R) are arranged in cascade with the third current source (I.sub.3). The collectors of these transistors are connected to the positive power-supply terminal (2) via a fourth and a fifth current source (I.sub.4 = I, I.sub.5 =I) respectively and are coupled to the first and the second input (5,6) of the output amplifier (20) respectively. This output amplifier (20) comprises two opposite conductivity type transistors (T.sub.5, T.sub.6) whose collectors are connected to the output (7). The resistance value of the second resistor (R.sub.2) is such that the direct voltage at the output (7) as a result of the current flowing through this resistor (R.sub.2) in the quiescent state is equal to half the supply voltage.
摘要翻译：具有浮置反相和非反相输入和稳定的直接输出电压电平的放大器。放大器包括前置放大器（10）和输出放大器级（20）。前置放大器（10）包括差分放大器，该差分放大器包括第一和第二晶体管（T1，T2），在其发射极之间布置有第一电阻器（R1），其发射极通过以下方式连接到正直接供电端子（2）第一和第二电流源（I1 = I，I2 = I）。第二晶体管（T2）的集电极通过第三电流源（I3 = 3.5I）连接到负电源端子（3），并通过第二电阻器（R2）耦合到配置的输出（7））。具有参考电压（VR）的共用基极的两个晶体管（T3，T4）与第三电流源（I3）级联布置。这些晶体管的集电极分别经由第四和第五电流源（I4 = I，I5 = I）连接到正电源端子（2），并耦合到第一和第二输入端（5,6）的输出放大器（20）。该输出放大器（20）包括两个相反的导电型晶体管（T5，T6），其集电极连接到输出端（7）。第二电阻器（R2）的电阻值使得在静态下流过该电阻器（R2）的电流的输出（7）处的直流电压等于电源电压的一半。

10. 发明授权

US4605892A Current-source arrangement 失效
标题翻译：电流源安排
公开(公告)号：US4605892A
公开(公告)日：1986-08-12
申请号：US705763
申请日：1985-02-26
申请人： Evert Seevinck , Adrianus J. M. Van Tuijl
发明人： Evert Seevinck , Adrianus J. M. Van Tuijl
IPC分类号： G05F3/26 , G05F3/22 , G05F3/20
CPC分类号： G05F3/227
摘要： A current-source arrangement supplying a current which increases directly proportionally to the supply voltage (V.sub.S) and which is suitable for operation with supply voltages above approximately 0.7 V, comprises a first resistor (R.sub.10 =R) in which a current (V.sub.S -V.sub.BE)/R flows, which current is supplied by a first transistor (T.sub.10) via a first current-mirror circuit (T.sub.11, T.sub.12) and a second current-mirror circuit (T.sub.13, T.sub.14). A second resistor (R.sub.2 =R) is arranged in parallel with the base-emitter junction of the input transistor (T.sub.11) of the first current-mirror circuit (T.sub.11, T.sub.12), through which second resistor (R.sub.2) a current V.sub.BE /R flows which is supplied by the first transistor (T.sub.10) via the collector-base interconnection of the input transistor (T.sub.11). The total current flowing through the first transistor (T.sub.10) is then equal to V.sub.S /R. This current can be taken from the collector terminals (15A, 15B) of the transistors (T.sub.15A, T.sub.15B), whose base-emitter junctions are connected in parallel with the base-emitter junction of the first transistor (T.sub.10).
摘要翻译：提供电流源装置包括：第一电阻器（R10 = R），其中电流（VS-VBE）与电源电压（VS）直接成比例地增加并且适合于电源电压高于约0.7V的操作）/ R流动，该电流由第一晶体管（T10）经由第一电流镜电路（T11，T12）和第二电流镜电路（T13，T14）提供。第二电阻器（R2 = R）与第一电流镜电路（T11，T12）的输入晶体管（T11）的基极 - 发射极并联排列，第二电阻器（R2）通过电流VBE / R 由第一晶体管（T10）经由输入晶体管（T11）的集电极 - 基极互连提供的流。流过第一晶体管（T10）的总电流等于VS / R。该电流可以从其基极 - 发射结与第一晶体管（T10）的基极 - 发射极并联连接的晶体管（T15A，T15B）的集电极端子（15A，15B）获取。

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