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1. 发明授权

US11513883B2 Glitch absorption apparatus and method 有权
公开(公告)号：US11513883B2
公开(公告)日：2022-11-29
申请号：US17161832
申请日：2021-01-29
申请人： STMicroelectronics International N.V.
发明人： Charul Jain , Asif Rashid Zargar
IPC分类号： G06F11/07
摘要： An apparatus includes a primary processor and a secondary processor configured to receive a first signal, a second signal and a plurality of input signals, and perform same operations as each other based on the first signal, the second signal and the plurality of input signals, a comparison circuit configured to receive output signals of the primary processor and the secondary processor, and detect a lockstep mismatch between the primary processor and the secondary processor based on the output signals, a fault capturing circuit configured to receive the first signal and the second signal, and capture a fault signal generated by the comparison circuit, and a first glitch absorption device configured to receive the first signal and the second signal, and absorb glitches fed into the first glitch absorption device.

2. 发明授权

US09344123B2 Systems and methods for historical signal interference cancellation (SIC) 有权
标题翻译：用于历史信号干扰消除（SIC）的系统和方法
公开(公告)号：US09344123B2
公开(公告)日：2016-05-17
申请号：US13680894
申请日：2012-11-19
申请人： Huawei Technologies Co., Ltd.
发明人： Aaron James Callard , Hamidreza Farmanbar , Alex Stephenne , Ngoc Dung Dao
IPC分类号： H04B1/10 , H04L1/18 , H04L27/26 , H04L12/413 , H04B1/7103 , H04L25/03 , H04B15/00 , H04L1/00 , H04L5/00
CPC分类号： H04B1/1027 , H04B1/10 , H04B1/7103 , H04B15/00 , H04L1/1819 , H04L1/1845 , H04L5/0048 , H04L5/0053 , H04L5/0073 , H04L12/413 , H04L25/03006 , H04L27/2691 , H04L2001/0097
摘要： Historical decoding in accordance with signal interference cancellation (SIC) or joint processing may reduce the amount of data that is re-transported across a network following an unsuccessful attempt to decode a data transmission. In one example, historical decoding is performed in accordance with interference cancellation by communicating information related to interfering data (rather than information related to serving data) following a served receiver's unsuccessful attempt to decode an interference signal. The information related to the interfering data may be the information bits carried by the earlier interfering data transmission or parity information (e.g., forward error correction (FEC) bits, etc.) related to the earlier interfering data transmission.
摘要翻译：根据信号干扰消除（SIC）或联合处理的历史解码可以减少在不成功解码数据传输的尝试之后通过网络重新传输的数据量。在一个示例中，在服务的接收机的不成功尝试解码干扰信号之后，通过传送与干扰数据相关的信息（而不是与服务数据相关的信息），根据干扰消除来执行历史解码。与干扰数据相关的信息可以是与较早的干扰数据传输相关的早期干扰数据传输或奇偶校验信息（例如，前向纠错（FEC）比特等）携带的信息比特。

3. 发明授权

US09343061B2 Method and apparatus for converting text information 有权
标题翻译：用于转换文本信息的方法和装置
公开(公告)号：US09343061B2
公开(公告)日：2016-05-17
申请号：US13896909
申请日：2013-05-17
申请人： Huawei Device Co., LTD
发明人： Jiong Chen , Xiaohai Zhang
IPC分类号： H04M1/64 , G10L13/04 , H04M3/42 , H04W4/18
CPC分类号： G10L13/04 , H04M3/42068 , H04M3/42382 , H04M2201/39 , H04M2201/60 , H04W4/18
摘要： The present invention provides a method and an apparatus for converting text information. The method includes: receiving, by a first terminal, a call or data from a second terminal; obtaining, by the first terminal, according to a mapping relationship between identification information of the second terminal and voice characteristic parameters of an user of the second terminal, the voice characteristic parameters of the user of the second terminal corresponding to the identification information of the second terminal when the first terminal is in a working mode of text-to-voice conversion; and converting, by the first terminal, related text information about the call or data to audio information with the voice characteristic parameters of the user of the second terminal.
摘要翻译：本发明提供了一种用于转换文本信息的方法和装置。该方法包括：由第一终端接收来自第二终端的呼叫或数据; 通过第一终端根据第二终端的识别信息与第二终端的用户的语音特征参数之间的映射关系获得与第二终端的识别信息对应的第二终端的用户的语音特征参数终端当第一终端处于文本到语音转换的工作模式时; 以及由所述第一终端将所述呼叫或数据的相关文本信息转换为具有所述第二终端的用户的语音特征参数的音频信息。

4. 发明授权

US09337318B2 FinFET with dummy gate on non-recessed shallow trench isolation (STI) 有权
标题翻译：具有非凹槽浅沟槽隔离（STI）的伪栅极的FinFET
公开(公告)号：US09337318B2
公开(公告)日：2016-05-10
申请号：US13662194
申请日：2012-10-26
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chi-Wen Liu , Chao-Hsiung Wang
IPC分类号： H01L29/78 , H01L29/66
CPC分类号： H01L21/823878 , H01L21/76224 , H01L21/823821 , H01L29/66545 , H01L29/66795 , H01L29/6681 , H01L29/785
摘要： An embodiment fin field effect transistor (FinFET) device includes fins formed from a semiconductor substrate, a non-recessed shallow trench isolation (STI) region disposed between the fins, and a dummy gate disposed on the non-recessed STI region.
摘要翻译：实施例的鳍状场效应晶体管（FinFET）器件包括由半导体衬底形成的散热片，布置在散热片之间的非凹槽浅沟槽隔离（STI）区域和设置在非凹入STI区域上的虚设栅极。

5. 发明授权

US09337195B2 Semiconductor devices and methods of manufacture thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US09337195B2
公开(公告)日：2016-05-10
申请号：US14133375
申请日：2013-12-18
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Yu Chao Lin , Ming-Ching Chang , I-Yin Lu , Jih-Jse Lin , Chao-Cheng Chen
IPC分类号： H01L23/02 , H01L27/092 , H01L27/088 , H01L21/8234 , H01L21/8238 , H01L21/3213 , H01L21/311
CPC分类号： H01L27/0924 , H01L21/31144 , H01L21/32135 , H01L21/76805 , H01L21/76816 , H01L21/76895 , H01L21/76897 , H01L21/823431 , H01L21/823437 , H01L21/823821 , H01L21/823828 , H01L27/0886 , H01L27/0922 , H01L29/0649
摘要： Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a method of manufacturing a semiconductor device includes providing a workpiece including a gate dielectric and a gate disposed over the gate dielectric, and reshaping a top surface of the gate to form a gate with a rounded profile.
摘要翻译：公开了半导体器件及其制造方法。在一些实施例中，制造半导体器件的方法包括提供包括栅极电介质和设置在栅极电介质上的栅极的工件，以及重新形成栅极的顶表面以形成具有圆形轮廓的栅极。

6. 发明授权

US09337109B2 Multi-threshold voltage FETs 有权
标题翻译：多阈值电压FET
公开(公告)号：US09337109B2
公开(公告)日：2016-05-10
申请号：US13902326
申请日：2013-05-24
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Gerben Doornbos , Krishna Kumar Bhuwalka
IPC分类号： H01L29/82 , H01L21/00 , H01L27/092 , H01L21/336 , H01L21/8234 , H01L21/8238 , H01L27/06 , H01L29/10
CPC分类号： H01L21/823821 , H01L21/823412 , H01L27/0605 , H01L27/0924 , H01L29/1054
摘要： A multi-threshold voltage (Vt) field-effect transistor (FET) formed through strain engineering is provided. An embodiment integrated circuit device includes a first transistor including a first channel region over a first buffer, the first channel region formed from a III-V semiconductor material and a second transistor including a second channel region over a second buffer, the second channel region formed from the III-V semiconductor material, the second buffer and the first buffer having a lattice mismatch. A first strain introduced by a lattice mismatch between the III-V semiconductor material and the first buffer is different than a second strain introduced by a lattice mismatch between the III-V semiconductor material and the second buffer. Therefore, the threshold voltage of the first transistor is different than the threshold voltage of the second transistor.
摘要翻译：提供了通过应变工程形成的多阈值电压（Vt）场效应晶体管（FET）。实施例集成电路装置包括：第一晶体管，包括第一缓冲器上的第一沟道区，由III-V半导体材料形成的第一沟道区和在第二缓冲区上包括第二沟道区的第二晶体管，形成第二沟道区从III-V半导体材料，第二缓冲器和第一缓冲器具有晶格失配。由III-V族半导体材料和第一缓冲层之间的晶格失配引入的第一应变与由III-V族半导体材料和第二缓冲层之间的晶格失配导入的第二应变不同。因此，第一晶体管的阈值电压不同于第二晶体管的阈值电压。

7. 发明授权

US09337059B2 Apparatus and methods for annealing wafers 有权
标题翻译：用于退火晶圆的设备和方法
公开(公告)号：US09337059B2
公开(公告)日：2016-05-10
申请号：US13215909
申请日：2011-08-23
申请人： Yi-Chao Wang , Yu-Chang Lin , Li-Ting Wang , Tai-Chun Huang , Pei-Ren Jeng , Tze-Liang Lee
发明人： Yi-Chao Wang , Yu-Chang Lin , Li-Ting Wang , Tai-Chun Huang , Pei-Ren Jeng , Tze-Liang Lee
IPC分类号： H01L21/00 , H01L21/324 , H01L21/268 , H01L21/20 , H01L21/36 , H01L21/44
CPC分类号： H01L21/67115 , B23K26/352 , H01L21/2636 , H01L21/268 , H01L21/324
摘要： A method includes performing an anneal on a wafer. The wafer includes a wafer-edge region, and an inner region encircled by the wafer-edge region. During the anneal, a first power applied on a portion of the wafer-edge region is at least lower than a second power for annealing the inner region.
摘要翻译：一种方法包括在晶片上进行退火。晶片包括晶片边缘区域和由晶片边缘区域包围的内部区域。在退火期间，施加在晶片边缘区域的一部分上的第一功率至少低于用于退火内部区域的第二功率。

8. 发明授权

US09332443B2 Method and apparatus for positioning user equipment 有权
标题翻译：定位用户设备的方法和装置
公开(公告)号：US09332443B2
公开(公告)日：2016-05-03
申请号：US14187898
申请日：2014-02-24
申请人： Huawei Technologies Co., Ltd.
发明人： Dengkun Xiao , Jie Cui , Anjian Li
IPC分类号： H04W24/00 , H04W64/00 , G01S1/02 , G01S1/24
CPC分类号： H04W24/00 , G01S1/02 , G01S1/24 , H04W64/00
摘要： Embodiments of the present invention disclose a method and an apparatus for positioning a user equipment. The method includes receiving positioning measurement information sent by a base station. The positioning configuration information includes a sum of a difference between receiving time and sending time on the UE and a difference between receiving time and sending time on the base station. A round trip time between the intermediate node that sends the CRS and the UE is calculated according to the positing in formation. A position of the UE is determined using position coordinates of the intermediate node that sends the CRS and the round trip time.
摘要翻译：本发明的实施例公开了一种用于定位用户设备的方法和装置。该方法包括接收基站发送的定位测量信息。定位配置信息包括UE的接收时间和发送时间之差以及基站上的接收时间与发送时间之差。根据建立的结果计算发送CRS的中间节点与UE之间的往返时间。使用发送CRS的中间节点的位置坐标和往返时间来确定UE的位置。

9. 发明授权

US09332330B2 Surface mountable microphone package, a microphone arrangement, a mobile phone and a method for recording microphone signals 有权
标题翻译：表面安装麦克风封装，麦克风布置，移动电话和用于记录麦克风信号的方法
公开(公告)号：US09332330B2
公开(公告)日：2016-05-03
申请号：US13947930
申请日：2013-07-22
申请人： Infineon Technologies AG
发明人： Klaus Elian , Horst Theuss , Thomas Mueller
IPC分类号： H04R11/04 , H04R1/04 , H01L29/84
CPC分类号： H04R1/04 , B81B2201/0257 , H04R2201/00 , H04R2499/11
摘要： A surface mountable microphone package includes a first microphone and a second microphone. Furthermore, the surface mountable microphone package includes a first opening for the first microphone and a second opening for the second microphone. The first opening and the second opening are arranged on opposite sides of the surface mountable microphone package.
摘要翻译：表面安装式麦克风封装包括第一麦克风和第二麦克风。此外，表面可安装麦克风封装包括用于第一麦克风的第一开口和用于第二麦克风的第二开口。第一开口和第二开口布置在可表面安装的麦克风包装的相对侧上。

10. 发明授权

US09331179B2 Metal gate and gate contact structure for FinFET 有权
公开(公告)号：US09331179B2
公开(公告)日：2016-05-03
申请号：US14617729
申请日：2015-02-09
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chi-Wen Liu , Chao-Hsiung Wang
IPC分类号： H01L21/00 , H01L29/66 , H01L21/8234 , H01L27/088 , H01L21/28 , H01L29/78 , H01L21/84 , H01L27/12 , H01L21/768 , H01L21/283
CPC分类号： H01L29/6681 , H01L21/28008 , H01L21/283 , H01L21/76897 , H01L21/823431 , H01L21/845 , H01L27/0886 , H01L27/1211 , H01L29/66545 , H01L29/785
摘要： An embodiment includes a substrate, wherein a portion of the substrate extends upwards, forming a fin, a gate dielectric over a top surface and sidewalls of the fin, a liner overlaying the gate dielectric, and an uninterrupted metallic feature over the liner a portion of the liner overlaying the gate dielectric, wherein the liner extends from a top surface of the uninterrupted metallic feature and covers sidewalls of the metallic feature, and wherein the gate dielectric, liner, and uninterrupted metallic feature collectively form a gate, a gate contact barrier, and a gate contact.

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