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    • 5. 发明公开
    • Liquid cartridge, printer, and method for controlling printer
    • Flüssigkeitspatrone,Drucker,und Verfahren zum Steuern eines Druckers
    • EP1557269A1
    • 2005-07-27
    • EP05001100.6
    • 2005-01-20
    • SEIKO EPSON CORPORATION
    • Takei, Toshiki
    • B41J2/165B41J2/175
    • B41J29/02B41J2/16523B41J2/17509B41J2/17546
    • A liquid cartridge includes an ink cartridge having a first housing portion for containing a liquid and a waste liquid storage cartridge having a second housing portion for containing a waste liquid, and a rewritable nonvolatile storage portion which stores a first threshold, a second threshold, liquid amount information and waste liquid amount information. The first threshold indicates a near liquid end state in which the liquid in the first housing portion is near to end. The second threshold indicates a near full state in which the waste liquid in the second housing portion is near to full. The liquid amount information indicates a liquid amount of the liquid contained in the first housing portion. The waste liquid amount information indicates a waste liquid amount of the waste liquid contained in the second housing portion. The ink cartridge and the waste liquid cartridge are integrally formed.
    • 液体盒包括具有用于容纳液体的第一容纳部分和用于容纳废液的第二容纳部分的废液储存盒的墨盒,以及存储第一阈值,第二阈值,液体的可重写非易失性存储部分 量信息和废液量信息。 第一阈值表示第一壳体部分中的液体接近结束的近液体终止状态。 第二阈值表示第二壳体部分中的废液接近满的接近完全状态。 液体量信息表示包含在第一壳体部分中的液体的液体量。 废液量信息表示包含在第二壳体部分中的废液的废液量。 墨盒和废液盒一体形成。
    • 8. 发明公开
    • Reference voltage generation circuit, display drive circuit, and display device
    • 参考电压产生电路,显示驱动电路和显示装置
    • EP1551004A2
    • 2005-07-06
    • EP05006584.6
    • 2003-01-28
    • SEIKO EPSON CORPORATION
    • Morita, Akira
    • G09G3/36
    • G09G3/3688G09G3/2011G09G3/32G09G3/3233G09G3/325G09G3/3614G09G3/3685G09G3/3696G09G5/06G09G2300/0842G09G2300/0861G09G2310/0248G09G2310/0251G09G2310/027G09G2310/04G09G2320/0276
    • A reference voltage generation circuit that generates multi-valued reference voltages for driving a liquid crystal display comprises: first to fourth ladder resistor circuit (312, 322, 332, 342) between first and second power source lines. First to i-th reference voltage output switching circuits (VSW1-VSWi) are respectively inserted between first to i-th division nodes (ND 1 -ND i ) of the first ladder resistor circuit (312), where i is an integer larger than or equal to 2, and first to i-th reference voltage output nodes (VND 1 -VND i ). (i + 1)th to 2i-th reference voltage output switching circuits (VSW(i+1)-VSW2i) are respectively inserted between (i + 1)th to 2i-th division nodes (ND i+1 -ND 2i ) of the second ladder resistor circuit (322) and the first to i-th reference voltage output nodes. (2i + 1)th to 3i-th reference voltage output switching circuits (VSW(2i+1)-VSW(3i)) are respectively inserted between (2i + 1)th to 3i-th division nodes (ND 2i+1 -ND 3i ) of the third ladder resistor circuit (332) and the first to i-th reference voltage output nodes. (3i + 1)th to 4i-th reference voltage output switching circuits (VSW(3i+1)-VSW(4i)) are respectively inserted between (3i + 1)th to 4i-th division nodes (ND 3i+1 -ND 4i ) of the fourth ladder resistor circuit (342) and the first to i-th reference voltage output nodes. When polarity inversion of a voltage outputted by a polarity inversion drive system to a signal electrode at a given polarity inversion period is repeated: the first to i-th reference voltage output switching circuits are switched on during a given control period in a positive polarity driving period and switched off during a given control period in a negative polarity driving period; the (i + 1)th to 2i-th reference voltage output switching circuits are switched off during a given control period in the positive polarity driving period and switched on during a given control period in the negative polarity driving period; the (2i + 1)th to 3i-th reference voltage output switching circuits are switched on during the positive polarity driving period and switched off during the negative polarity driving period; and the (3i + 1)th to 4i-th reference voltage output switching circuits are switched on during the positive polarity driving period and switched off during the negative polarity driving period.
    • 产生用于驱动液晶显示器的多值参考电压的参考电压产生电路包括:在第一和第二电源线之间的第一至第四梯形电阻电路(312,322,332,342)。 第一到第i参考电压输出切换电路(VSW1-VSWi)分别插入在第一梯形电阻电路(312)的第一到第i分割节点(ND1-NDi)之间,其中i是大于或等于 到2,并且第一到第i参考电压输出节点(VND1-VNDi)。 在第(i + 1)到第2i个分割节点(NDi + 1-ND2i)之间分别插入第(i + 1)到第2i个参考电压输出切换电路(VSW(i + 1)-VSW2i) 第二梯度电阻器电路(322)和第一至第i参考电压输出节点。 (2i + 1)至第3i分割节点(ND2i + 1-ND3i)之间分别插入第2i + 1至第3i参考电压输出切换电路(VSi(2i + 1) )的第三梯形电阻器电路(332)和第一至第i参考电压输出节点。 在第(3i + 1)至第4i分割节点(ND3i + 1-ND4i)之间分别插入第(3i + 1)至第4i参考电压输出切换电路(VSW(3i + 1)-VSW(4i) )的第四梯形电阻器电路(342)和第一至第i参考电压输出节点。 当重复由极性反转驱动系统输出到给定极性反转周期中的信号电极的极性反转时:第一至第i参考电压输出开关电路在正极性驱动的给定控制周期期间接通 并且在给定的控制周期期间在负极性驱动周期期间断开; 第(i + 1)至第2i参考电压输出开关电路在正极性驱动时段的给定控制时段期间被关断并且在负极性驱动时段的给定控制时段期间被开启; (2i + 1)至第3i参考电压输出开关电路在正极性驱动时段期间接通并且在负极性驱动时段期间断开; 和第(3i + 1)至第4i参考电压输出开关电路在正极性驱动时段期间接通并且在负极性驱动时段期间断开。
    • 9. 发明公开
    • Receiving device
    • 接收设备
    • EP1548944A2
    • 2005-06-29
    • EP04029184.1
    • 2004-12-09
    • Seiko Epson Corporation
    • Uematsu, Akira
    • H03K19/0185H04L25/02
    • H04L25/0278H04L25/0272H04L25/0292
    • Described is a receiving device in which the input impedance is matched to the characteristic impedance of a transmission line, even with the receiving device composed with the MOS transistor. The receiving device is for data transfer by means of the differential-current driven model. It comprises a receiving node (6, 7) for receiving a differential current signal; a current-voltage conversion means (Q P1 , Q P2 ) for converting current into a voltage corresponding to the differential current signal from the receiving node (6, 7); an impedance matching means (11, 13) for matching the input impedance to the characteristic impedance, applied in between the receiving node (6, 7) and the current-voltage conversion means (Q P1 , Q P2 ), including a low impedance circuit means (12, 14) that enables generation of a low impedance which is lower than the characteristic impedance of the transmission line (4, 5) that is connected to the receiving node (6, 7) as an input impedance of the receiving node (6, 7); and a comparator (COMP) into which a differential-voltage signal from the current-voltage conversion means (Q P1 , Q P2 ) is input as a comparison signal, and which outputs the comparison result thereof as an output data.
    • 描述了一种接收设备,其中输入阻抗与传输线的特性阻抗相匹配,即使是由MOS晶体管组成的接收设备。 接收设备用于通过差分电流驱动模型进行数据传输。 它包括用于接收差分电流信号的接收节点(6,7) 电流 - 电压转换装置(QP1,QP2),用于将电流转换成与来自接收节点(6,7)的差分电流信号对应的电压; 在接收节点(6,7)和电流 - 电压转换装置(QP1,QP2)之间施加的用于使输入阻抗与特性阻抗匹配的阻抗匹配装置(11,13),包括低阻抗电路装置( (6,7)的输入阻抗的传输线路(4,5)的特性阻抗低的低阻抗产生,所述接收节点(6,7) 7); 和比较器(COMP),其中输入来自电流 - 电压转换装置(QP1,QP2)的差分电压信号作为比较信号,并将其比较结果作为输出数据输出。