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    • 4. 发明申请
    • WIRELESS RECEIVER
    • 无线接收器
    • WO2011018626A2
    • 2011-02-17
    • PCT/GB2010/001533
    • 2010-08-12
    • CASCODA LIMITEDBRUSHNER, Wolfgang
    • BRUSHNER, Wolfgang
    • H04L27/00
    • H04L27/0002H04B1/7075H04B1/709H04L7/042H04L27/0014H04L27/2014H04L27/22H04L27/233H04L27/368H04L2027/003H04L2027/0065H04L2027/0095
    • A wireless receiver designed to conform to the standard IEEE 802.15.4. The receiver comprises an analog front-end and a digital decoder. The analog components of the front end include one or more amplifiers and an analog-to-digital converter (ADC). The digital decoder receives the output of the ADC and demodulates it in a demodulator which is driven at an a chip frequency by an internal or external clock. The demodulator comprises a sampler operable to sample the digital signal at a sampling frequency and a correlation unit operable to process a set of bits, referred to as a chip code, in the sampled digitised signal and output therefrom a set of correlation values. The set of correlation values is an indicator of likely mapping between the chip code that has been processed and a set of possible chip codes defined according to the standard. The demodulator further comprises a symbol selection unit and a frequency correction unit. The symbol selection unit has the function of deciding which symbol has been received based on an analysis of each set of correlation values. The frequency correction unit is operable to make adjustments to the chip frequency based on the correlation values output from the correlation unit, specifically to increase or decrease the chip frequency based on a measurement of whether the maximum correlation value among each set of correlation values occurs earlier or later than predicted. This scheme has the advantage that phase and frequency compensation is done after correlation avoiding the need for coherent demodulation while at the same time not requiring the stringent specifications of a conventional non-coherent demodulation scheme.
    • 设计符合标准IEEE 802.15.4的无线接收器。 接收器包括一个模拟前端和一个数字解码器。 前端的模拟组件包括一个或多个放大器和一个模数转换器(ADC)。 数字解码器接收ADC的输出并在由内部或外部时钟以芯片频率驱动的解调器中对其解调。 解调器包括可操作以采样频率对数字信号进行采样的采样器以及可操作用于处理采样数字化信号中称为芯片代码的一组比特并从中输出一组相关值的相关单元。 该组相关值是已处理的码片码与根据标准定义的一组可能的码片码之间的可能映射的指示符。 解调器还包括符号选择单元和频率校正单元。 符号选择单元具有基于对每组相关值的分析来判断接收到哪个符号的功能。 频率校正单元可操作用于基于从相关单元输出的相关值来对码片频率进行调整,具体地基于对每一组相关值之间的最大相关值是否出现的测量来增加或减少码片频率 或晚于预测。 该方案的优点在于,在相关之后进行相位和频率补偿,避免了相干解调的需要,同时不需要传统非相干解调方案的严格规范。

    • 8. 发明申请
    • VOLUME RENDERING APPARATUS AND METHOD
    • 体积渲染装置和方法
    • WO2006056741A1
    • 2006-06-01
    • PCT/GB2005/004345
    • 2005-11-11
    • VOXAR LIMITEDDAY, TimPAPAGEORGIOU, PavlosCRAYFORD, Dominic
    • DAY, TimPAPAGEORGIOU, PavlosCRAYFORD, Dominic
    • G06T15/00
    • G06T15/08G06T2200/28G06T2210/41
    • An apparatus and method for rendering multiplanar reformatting (MPR) images of volume data to be displayed to a user. The apparatus may comprise a conventional personal computer system having a central processing unit (CPU) coupled to a system memory for storing the volume data and a graphics processing unit (GPU) having a GPU memory connected to the computer bus. The computer system CPU is configured to predict an MPR image which may be required for display at a future time and to identify blocks of voxels comprising the volume data which will be needed to render the predicted MPR image. The CPU is further operable to retrieve these blocks from the system memory and to queue them for transfer to the GPU memory. The transfer of blocks from the queue to the GPU memory is controlled by a scheduler such that at least some of the queued blocks are transferred to the GPU memory prior to the predicted MPR image becoming required for display. The GPU retrieves blocks from the GPU memory and renders corresponding image parts for assembly into the predicted MPR image should it become required for display.
    • 一种用于将用于显示的卷数据的多平面重新格式化(MPR)图像进行渲染的装置和方法。 该装置可以包括具有耦合到用于存储音量数据的系统存储器的中央处理单元(CPU)的传统个人计算机系统和具有连接到计算机总线的GPU存储器的图形处理单元(GPU)。 计算机系统CPU被配置为预测可能需要在未来时间显示的MPR图像,并且识别包括将要用于呈现预测的MPR图像的体数据的体素块。 CPU进一步可操作以从系统存储器检索这些块并将其排队以传送到GPU存储器。 将块从队列传送到GPU存储器由调度器控制,使得在预测的MPR图像变得需要显示之前,排队的块中的至少一些被传送到GPU存储器。 如果需要显示,GPU将从GPU存储器中检索块,并将相应的图像部件组合到预测的MPR图像中。
    • 10. 发明申请
    • POSITIONER DEVICE
    • 定位装置
    • WO2005081330A2
    • 2005-09-01
    • PCT/GB2005/000320
    • 2005-01-31
    • THORLABS, INC.DIXON, Michael, JohnHERBERT, Terence, James
    • DIXON, Michael, JohnHERBERT, Terence, James
    • H01L41/09
    • H02N2/028B41J25/001G12B5/00H02N2/043Y10T74/18992Y10T74/20348Y10T74/20582
    • A positioner (2) for moving a sample platform (6) relative to a base (4) is described. The positioner is driven by a piezoelectric arranged to expand and contract along a drive axis, the piezoelectric element has an input end coupled to the base and an output end coupled to first (14) and second (16) output levers extending away from the drive axis of the piezoelectric element in opposing directions. The output levers each have an inner arm arranged to be acted on by the piezoelectric element as it expands and an outer arm to which the sample platform is mounted via platform supports (26, 28). The output levers are mounted such that the piezoelectric element acts on the inner arms of the output levers to cause the outer arms to move in a plane containing the drive axis. This motion of the output levers is communicated via the platform supports to the sample platform, so moving it relative to the base along a direction parallel to the drive axis.
    • 描述了用于相对于基座(4)移动样品平台(6)的定位器(2)。 定位器由布置成沿着驱动轴线膨胀和收缩的压电体驱动,压电元件具有联接到基座的输入端和耦合到远离驱动器的第一(14)和第二(16)输出杆的输出端 压电元件的轴向相反。 输出杆各自具有布置成在压电元件膨胀时被作用在其上的内臂和通过平台支撑件(26,28)安装样品平台的外臂。 输出杆被安装成使得压电元件作用在输出杆的内臂上,以使外臂在包含驱动轴的平面内移动。 输出杆的这种运动通过平台支撑件传送到样品平台,从而沿平行于驱动轴的方向相对于底座移动。