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1. 发明申请

WO2012066761A1 METHOD OF PRODUCING EPITAXIAL WAFER AND THE EPITAXIAL WAFER 审中-公开
标题翻译：生产外延波浪和外延波形的方法
公开(公告)号：WO2012066761A1
公开(公告)日：2012-05-24
申请号：PCT/JP2011/006327
申请日：2011-11-11
申请人： SUMCO CORPORATION , MASUDA, Sumihisa , NARAHARA, Kazuhiro
发明人： MASUDA, Sumihisa , NARAHARA, Kazuhiro
IPC分类号： H01L21/304 , H01L21/02 , H01L21/20
CPC分类号： H01L21/02021 , C30B25/186 , C30B29/06 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/02658 , H01L29/30
摘要： The present invention provides a method of producing an epitaxial wafer having a highly flat rear surface without polishing top and rear surfaces of the epitaxial wafer after forming an epitaxial film. A method of producing an epitaxial wafer 100 according to the present invention comprises a step of preparing a semiconductor wafer 10 having a beveled portion 11 formed on its end portion, a first surface 12b, a second surface 12a opposite to the first surface 12b, and edges 13b and 13a on both of the first surface12b and the second surface12a, the each edge 13a and 13b is boundary with the beveled portion 11; a step of processing of rolling off an outer peripheral portion 14 of the first surface 12b to form a roll-off region, the outer peripheral portion 14 is extending outward of the wafer from a predetermined position P inner than the position of the edge 13b on the first surface 12b; and a step of forming a first epitaxial film 20 on the second surface 12a.
摘要翻译：本发明提供一种制造具有高平坦后表面的外延晶片的方法，而不会在形成外延膜之后抛光外延晶片的顶表面和后表面。根据本发明的制造外延晶片100的方法包括制备半导体晶片10的步骤，半导体晶片10具有形成在其端部上的斜面部分11，第一表面12b，与第一表面12b相对的第二表面12a，以及在第一表面12b和第二表面12a上的边缘13b和13a，每个边缘13a和13b与斜面部分11是边界; 处理滚动第一表面12b的外周部分14以形成滚降区域的步骤，外周部分14从比边缘13b的位置内侧的预定位置P向晶片外延伸第一表面12b; 以及在第二表面12a上形成第一外延膜20的步骤。

2. 发明申请

US20180328859A1 WAFER INSPECTION METHOD AND WAFER INSPECTION APPARATUS 审中-公开
公开(公告)号：US20180328859A1
公开(公告)日：2018-11-15
申请号：US15757856
申请日：2016-08-03
申请人： SUMCO CORPORATION
发明人： Tatsuya OSADA , Masahiko EGASHIRA , Tomokatsu UCHINO
IPC分类号： G01N21/95 , G01N21/64
CPC分类号： G01N21/9501 , G01B11/30 , G01N21/6489 , G01N21/956
摘要： Provided is a wafer inspection method capable of examining whether pits are formed in wafer surfaces. The wafer inspection method includes the steps of: choosing defects of a wafer using a first optical system; selecting potential pits from the chosen defects; and classifying the potential pits into pits and defects other than the pits using a second optical system.

3. 发明公开

EP4450683A1 INDUCTION HEATING COIL AND SINGLE CRYSTAL PRODUCTION DEVICE USING SAME 审中-实审
公开(公告)号：EP4450683A1
公开(公告)日：2024-10-23
申请号：EP22907081.8
申请日：2022-11-08
申请人： Sumco Corporation
发明人： SUGITA, Yoshinori , SHIMOMURA, Koichi , UEDA, Ryosuke
IPC分类号： C30B13/20 , H05B6/10 , H05B6/40
CPC分类号： Y02P10/25 , C30B13/20 , H05B6/10 , H05B6/40
摘要： To provide an induction heating coil capable of reducing a variation in the height of the melt surface of a raw material rod and thus stably growing a single crystal and a single crystal manufacturing apparatus using the same.
An induction heating coil 20 comprises an annular coil body 21 that has an opening 22 in the center thereof and that has a first end 21e1 and a second end 21e2 separated from each other by a slit 23 extending in a substantially radial direction from the opening 22. The slit 23 is an oblique slit that obliquely cuts the coil body 21 from an upper surface 21a side thereof to a lower surface 21b side such that a corner on the upper surface 21a side of the first end 21e1 has an acute angle and that a corner on the upper surface 21a side of the second end 21e2 has an obtuse angle. The upper surface 21a of the coil body 21 has an upper stage surface 21a1 and a lower stage surface 21a2, the lower stage surface 21a2 is provided at a slit neighborhood area on the first end 21e1 side, and the upper stage surface 21a1 is provided in an area excluding a formation area of the lower stage surface 21a2.

4. 发明公开

EP3731260A1 METHOD FOR PRODUCING GROUP III NITRIDE SEMICONDUCTOR SUBSTRATE 审中-实审
公开(公告)号：EP3731260A1
公开(公告)日：2020-10-28
申请号：EP18892096.1
申请日：2018-10-02
申请人： Sumco Corporation
发明人： MATSUMOTO Koji , ONO Toshiaki , AMANO Hiroshi , HONDA Yoshio
IPC分类号： H01L21/205 , C23C16/34 , C30B25/02 , C30B29/38
摘要： [Problem] To suppress diffusion of a group III material into an Si substrate during the time when a group III nitride semiconductor layer is grown on the Si substrate, with an AlN buffer layer being interposed therebetween.
[Solution] A method for manufacturing a group III nitride semiconductor substrate comprises: a step (S12A) for growing a first AlN buffer layer 21 on an Si substrate 10; a step (S12B) for growing a second AlN buffer layer 22 on the first AlN buffer layer 21 at a temperature higher than a growth temperature of the first AlN buffer layer 21; and a step (S13) for growing a group III nitride semiconductor layer 30 on the second AlN buffer layer 22. The growth temperature of the first AlN buffer layer 21 is 400-600°C.

5. 发明授权

EP1758168B1 SOI SUBSTRATE AND METHOD FOR PRODUCING SAME 有权
公开(公告)号：EP1758168B1
公开(公告)日：2020-02-19
申请号：EP05743926.7
申请日：2005-05-25
申请人： SUMCO CORPORATION
发明人： MORITA, Etsurou, Sumco Corporation , SANO, Ritarou, Sumco Corporation , ENDO, Akihiko, Sumco Corporation
IPC分类号： H01L27/12 , H01L21/02 , H01L21/3065 , H01L21/762

6. 发明授权

EP1667207B1 BONDED WAFER AND ITS MANUFACTURING METHOD 审中-实审
公开(公告)号：EP1667207B1
公开(公告)日：2019-07-17
申请号：EP04787750.1
申请日：2004-09-08
申请人： SUMCO Corporation
发明人： ENDO, Akihiko c/o Sumco Corporation , NISHIHATA, Hideki c/o Sumco Corporation
IPC分类号： H01L21/02 , H01L27/12

8. 发明授权

EP2226155B1 Cylindrical grinder and cylindrical grinding method of ingot 有权
公开(公告)号：EP2226155B1
公开(公告)日：2019-05-08
申请号：EP10154263.7
申请日：2010-02-22
申请人： SUMCO Corporation
发明人： Kaito, Ryoichi
IPC分类号： B24B5/04 , B24B5/50 , B24B41/06

9. 发明授权

EP1592056B1 METHOD FOR INSPECTION, PROCESS FOR MAKING ANALYTIC PIECE, METHOD FOR ANALYSIS, ANALYZER, PROCESS FOR PRODUCING SOI WAFER, AND SOI WAFER 有权转让
公开(公告)号：EP1592056B1
公开(公告)日：2018-12-26
申请号：EP03756661.9
申请日：2003-10-16
申请人： SUMCO CORPORATION
发明人： OKUBO, Akira Sumitomo Mitsubishi Silicon Corp. , KONDO, Hideyuki Sumitomo Mitsubishi Silicon Corp.
IPC分类号： H01L21/66 , H01L21/265 , H01L27/12 , G01N23/225
CPC分类号： G01N23/225
摘要： An inspection method is provided for accurate measurement of conductive materials as defects within a silicon oxide film base material embedded in a SOI wafer sample. In the method, the internal state of a sample 2 is inspected by measuring an conductive material within an insulating base material 11 formed upon the sample 2. Ions or electrons are irradiated upon the surface of the inspection region of the base material 11. A surface image is imaged with secondary electrons emitted from the surface 11a and the vicinity of the surface. The inspection region is etched and a surface image is imaged successively with secondary electrons emitted from a surface 11b and from its vicinity, renewed successively at the etched depth. The conductive material within the base material 11 is measured based upon the accumulated surface images.

10. 发明授权

EP1437765B1 PRODUCTION METHOD FOR SEMICONDUCTOR SUBSTRATE AND PRODUCTION METHOD FOR FIELD EFFECT TRANSISTOR 有权
公开(公告)号：EP1437765B1
公开(公告)日：2018-12-26
申请号：EP02767854.9
申请日：2002-08-23
申请人： SUMCO CORPORATION
发明人： SHIONO, Ichiro , MIZUSHIMA,Kazuki , YAMAGUCHI, Kenji
IPC分类号： H01L21/205 , H01L21/336
CPC分类号： H01L29/165 , H01L21/02381 , H01L21/0245 , H01L21/02502 , H01L21/02532 , H01L21/0262 , H01L29/1054 , H01L29/66916
摘要： Production of a semiconductor substrate having an silicon-germanium (SiGe) layers (2,3) formed on an silicon substrate (1) comprises heat treating at temperatures exceeding epitaxial growth temperature while or after SiGe layers are formed by epitaxial growth and polishing out surface unevenness produced by the heat treatment after the SiGe layers are formed.

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