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1. 发明申请

WO2014066997A1 A REVERSE OPTICAL PROXIMITY CORRECTION METHOD 审中-公开
标题翻译：反向光学近似校正方法
公开(公告)号：WO2014066997A1
公开(公告)日：2014-05-08
申请号：PCT/CA2013/050772
申请日：2013-10-11
申请人： SIDENSE CORPORATION
发明人： KURJANOWICZ, Wlodek
IPC分类号： G03F9/00 , H01L21/027 , H01L21/31
CPC分类号： H01L27/11206 , G03F1/36 , H01L21/31144 , H01L23/5252 , H01L2924/0002 , H01L2924/00
摘要： A method for fabricating an anti-fuse memory cell having a semiconductor structure with a minimized area. The method includes providing a reference pattern for the semiconductor structure, and applying a reverse OPC technique that includes inverting selected corners of the reference pattern. The reverse OPC technique uses photolithographic distortions to provide a resulting fabricated pattern that is intentionally distorted relative to the reference pattern. By inverting corners of a geometric reference pattern, the resulting distorted pattern will have an area that is reduced relative to the original reference pattern. This technique is advantageous for reducing the area of a selected region of a semiconductor structure which may otherwise not be possible through normal design parameters.
摘要翻译：一种制造具有最小面积的半导体结构的反熔丝存储单元的方法。该方法包括提供用于半导体结构的参考图案，以及应用包括反转参考图案的所选角的反向OPC技术。反向OPC技术使用光刻失真来提供相对于参考图案有意失真的结果制造图案。通过反转几何参考图案的角，所得到的失真图案将具有相对于原始参考图案减小的面积。该技术有利于减小半导体结构的选定区域的面积，否则可能通过正常的设计参数是不可能的。

2. 发明申请

WO2015149182A1 ANTI-FUSE MEMORY CELL 审中-公开
标题翻译：防静电记忆体细胞
公开(公告)号：WO2015149182A1
公开(公告)日：2015-10-08
申请号：PCT/CA2015/050266
申请日：2015-04-02
申请人： SIDENSE CORPORATION
发明人： KURJANOWICZ, Wlodek
IPC分类号： H01L21/02 , G11C17/16 , H01L21/316 , H01L21/8247 , H01L27/115
CPC分类号： G11C17/16 , H01L21/823462 , H01L23/5252 , H01L27/11206
摘要： An anti-fuse memory cell having a variable thickness gate oxide. The variable thickness gate oxide is formed by depositing a first oxide over a channel region of the anti-fuse memory cell, removing the first oxide in a thin oxide area of the channel region, and then thermally growing a second oxide in the thin oxide area. The remaining first oxide defines a thick oxide area of the channel region. The second oxide growth occurs under the remaining first oxide, but at a rate less than thermal oxide growth in the thin oxide area. This results in a combined thickness of the first oxide and the second oxide in the thick oxide area being greater than second oxide in the thin oxide area.
摘要翻译：具有可变厚度栅极氧化物的反熔丝存储单元。可变厚度栅极氧化物是通过在抗熔丝存储单元的沟道区域上沉积第一氧化物，去除沟道区域的薄氧化物区域中的第一氧化物，然后在薄氧化物区域中热生长第二氧化物。剩余的第一氧化物限定沟道区的厚氧化物区域。第二氧化物生长发生在剩余的第一氧化物之下，但是以低于薄氧化物区域中的氧化物生长的速率发生。这导致厚氧化物区域中的第一氧化物和第二氧化物的组合厚度大于薄氧化物区域中的第二氧化物。

3. 发明申请

US20080038879A1 SPLIT-CHANNEL ANTIFUSE ARRAY ARCHITECTURE 有权
标题翻译：分裂通道抗体阵列架构
公开(公告)号：US20080038879A1
公开(公告)日：2008-02-14
申请号：US11877229
申请日：2007-10-23
申请人： Wlodek KURJANOWICZ
发明人： Wlodek KURJANOWICZ
IPC分类号： H01L21/82
CPC分类号： H01L21/28211 , G11C17/16 , G11C17/18 , H01L23/5252 , H01L27/10 , H01L27/101 , H01L27/112 , H01L27/11206 , H01L29/42368 , H01L29/4238 , H01L29/42384 , H01L29/7833 , H01L2924/0002 , H01L2924/00
摘要： An anti-fuse memory cell having a variable thickness gate oxide. The variable thickness gate oxide has a thick gate oxide portion and a thin gate oxide portion, where the thing gate oxide portion has at least one dimension less than a minimum feature size of a process technology. The thin gate oxide can be rectangular in shape or triangular in shape. The anti-fuse transistor can be used in a two-transistor memory cell having an access transistor with a gate oxide substantially identical in thickness to the thick gate oxide of the variable thickness gate oxide of the anti-fuse transistor.
摘要翻译：具有可变厚度栅极氧化物的反熔丝存储单元。可变厚栅极氧化物具有厚的栅极氧化物部分和薄的栅极氧化物部分，其中栅极氧化物部分具有小于工艺技术的最小特征尺寸的至少一个尺寸。薄栅氧化物的形状可以是矩形或三角形。反熔丝晶体管可以用于具有存取晶体管的双晶体管存储单元，栅极氧化物的厚度与抗熔丝晶体管的可变厚栅极氧化物的厚栅极氧化物的厚度基本相同。

4. 发明申请

US20070165441A1 HIGH SPEED OTP SENSING SCHEME 有权
标题翻译：高速OTP感应方案
公开(公告)号：US20070165441A1
公开(公告)日：2007-07-19
申请号：US11618330
申请日：2006-12-29
申请人： Wlodek Kurjanowicz , Steven Smith
发明人： Wlodek Kurjanowicz , Steven Smith
IPC分类号： G11C7/00 , G11C17/00
CPC分类号： G11C17/16 , G11C17/18 , H01L21/28211 , H01L23/5252 , H01L27/10 , H01L27/101 , H01L27/112 , H01L27/11206 , H01L29/42368 , H01L29/4238 , H01L29/42384 , H01L29/7833 , H01L2924/0002 , H01L2924/00
摘要： A high speed sensing scheme for a non-volatile memory array is disclosed. The memory array includes non volatile memory cells arranged in a complementary bitline configuration includes precharge circuits for precharging the bitlines to a first voltage level such as VSS, a reference circuits for applying a reference charge on the reference bitlines of the complementary bitline pairs, and bitline sense amplifiers for sensing a voltage differential between the complementary bitline pairs. A voltage on the data bitline being changed when a programmed non-volatile memory cell connected to an activated wordline couples the wordline voltage to the data bitline.
摘要翻译：公开了一种用于非易失性存储器阵列的高速感测方案。存储器阵列包括以互补位线配置布置的非易失性存储单元，包括用于将位线预充电到诸如VSS的第一电压电平的预充电电路，用于在补充位线对的参考位线上施加参考电荷的参考电路，以及位线用于感测互补位线对之间的电压差的读出放大器。当连接到激活的字线的编程的非易失性存储器单元将字线电压耦合到数据位线时，数据位线上的电压被改变。

5. 发明授权

US08735297B2 Reverse optical proximity correction method 有权
标题翻译：反向光学邻近校正方法
公开(公告)号：US08735297B2
公开(公告)日：2014-05-27
申请号：US13662842
申请日：2012-10-29
申请人： Sidense Corporation
发明人： Wlodek Kurjanowicz
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： G11C17/16 , G11C17/18 , H01L23/5252 , H01L27/101 , H01L27/112 , H01L27/11206 , H01L2924/0002 , H01L2924/00
摘要： A method for fabricating an anti-fuse memory cell having a semiconductor structure with a minimized area. The method includes providing a reference pattern for the semiconductor structure, and applying a reverse OPC technique that includes inverting selected corners of the reference pattern. The reverse OPC technique uses photolithographic distortions to provide a resulting fabricated pattern that is intentionally distorted relative to the reference pattern. By inverting corners of a geometric reference pattern, the resulting distorted pattern will have an area that is reduced relative to the original reference pattern. This technique is advantageous for reducing the area of a selected region of a semiconductor structure which may otherwise not be possible through normal design parameters.
摘要翻译：一种制造具有最小面积的半导体结构的反熔丝存储单元的方法。该方法包括提供用于半导体结构的参考图案，以及应用包括反转参考图案的所选角的反向OPC技术。反向OPC技术使用光刻失真来提供相对于参考图案有意失真的结果制造图案。通过反转几何参考图案的角，所得到的失真图案将具有相对于原始参考图案减小的面积。该技术有利于减小半导体结构的选定区域的面积，否则可能通过正常的设计参数是不可能的。

6. 发明申请

US20070257331A1 ANTI-FUSE MEMORY CELL 有权
标题翻译：防静电记忆体细胞
公开(公告)号：US20070257331A1
公开(公告)日：2007-11-08
申请号：US11762552
申请日：2007-06-13
申请人： Wlodek KURJANOWICZ , Steven SMITH
发明人： Wlodek KURJANOWICZ , Steven SMITH
IPC分类号： H01L29/423 , H01L21/44
CPC分类号： G11C17/16 , H01L23/5252 , H01L27/101 , H01L27/112 , H01L27/11206 , H01L2924/0002 , H01L2924/00
摘要： An anti-fuse memory cell having a variable thickness gate oxide. The variable thickness gate oxide has a thick gate oxide portion and a thin gate oxide portion, where the thing gate oxide portion has at least one dimension less than a minimum feature size of a process technology. The thin gate oxide can be rectangular in shape or triangular in shape. The anti-fuse transistor can be used in a two-transistor memory cell having an access transistor with a gate oxide substantially identical in thickness to the thick gate oxide of the variable thickness gate oxide of the anti-fuse transistor.
摘要翻译：具有可变厚度栅极氧化物的反熔丝存储单元。可变厚栅极氧化物具有厚的栅极氧化物部分和薄的栅极氧化物部分，其中栅极氧化物部分具有小于工艺技术的最小特征尺寸的至少一个尺寸。薄栅氧化物的形状可以是矩形或三角形。反熔丝晶体管可以用于具有存取晶体管的双晶体管存储单元，栅极氧化物的厚度与抗熔丝晶体管的可变厚栅极氧化物的厚栅极氧化物的厚度基本相同。

7. 发明申请

US20140209989A1 ANTI-FUSE MEMORY CELL 有权
标题翻译：防静电记忆体细胞
公开(公告)号：US20140209989A1
公开(公告)日：2014-07-31
申请号：US14244499
申请日：2014-04-03
申请人： SIDENSE CORPORATION
发明人： Wlodek KURJANOWICZ
IPC分类号： H01L29/78 , H01L27/105 , H01L29/66
CPC分类号： H01L27/1052 , G11C17/16 , G11C17/18 , H01L23/5252 , H01L27/11206 , H01L2924/0002 , H01L2924/00
摘要： An anti-fuse memory cell having a variable thickness gate oxide. The variable thickness gate oxide is formed by depositing a first oxide over a channel region of the anti-fuse memory cell, removing the first oxide in a thin oxide area of the channel region, and then thermally growing a second oxide in the thin oxide area. The remaining first oxide defines a thick oxide area of the channel region. The second oxide growth occurs under the remaining first oxide, but at a rate less than thermal oxide growth in the thin oxide area. This results in a combined thickness of the first oxide and the second oxide in the thick oxide area being greater than second oxide in the thin oxide area.
摘要翻译：具有可变厚度栅氧化物的反熔丝存储单元。可变厚度栅极氧化物是通过在抗熔丝存储单元的沟道区域上沉积第一氧化物，去除沟道区域的薄氧化物区域中的第一氧化物，然后在薄氧化物区域中热生长第二氧化物。剩余的第一氧化物限定沟道区的厚氧化物区域。第二氧化物生长发生在剩余的第一氧化物之下，但是以低于薄氧化物区域中的氧化物生长的速率发生。这导致厚氧化物区域中的第一氧化物和第二氧化物的组合厚度大于薄氧化物区域中的第二氧化物。

8. 发明申请

US20100244115A1 ANTI-FUSE MEMORY CELL 有权
标题翻译：防静电记忆体细胞
公开(公告)号：US20100244115A1
公开(公告)日：2010-09-30
申请号：US12814124
申请日：2010-06-11
申请人： Wlodek KURJANOWICZ , Steven SMITH
发明人： Wlodek KURJANOWICZ , Steven SMITH
IPC分类号： H01L29/78 , H01L21/768 , H01L21/336 , H01L23/525
CPC分类号： G11C17/16 , H01L23/5252 , H01L27/101 , H01L27/112 , H01L27/11206 , H01L2924/0002 , H01L2924/00
摘要： An anti-fuse memory cell having a variable thickness gate oxide. The variable thickness gate oxide has a thick gate oxide portion and a thin gate oxide portion, where the thing gate oxide portion has at least one dimension less than a minimum feature size of a process technology. The thin gate oxide can be rectangular in shape or triangular in shape. The anti-fuse transistor can be used in a two-transistor memory cell having an access transistor with a gate oxide substantially identical in thickness to the thick gate oxide of the variable thickness gate oxide of the anti-fuse transistor.
摘要翻译：具有可变厚度栅极氧化物的反熔丝存储单元。可变厚栅极氧化物具有厚的栅极氧化物部分和薄的栅极氧化物部分，其中栅极氧化物部分具有小于工艺技术的最小特征尺寸的至少一个尺寸。薄栅氧化物的形状可以是矩形或三角形。反熔丝晶体管可以用于具有存取晶体管的双晶体管存储单元，栅极氧化物的厚度与抗熔丝晶体管的可变厚栅极氧化物的厚栅极氧化物的厚度基本相同。

9. 发明申请

US20130059238A1 REVERSE OPTICAL PROXIMITY CORRECTION METHOD 有权
标题翻译：反向光学近似校正方法
公开(公告)号：US20130059238A1
公开(公告)日：2013-03-07
申请号：US13662842
申请日：2012-10-29
申请人： Sidense Corporation
发明人： Wlodek KURJANOWICZ
IPC分类号： G03F1/36 , G06F17/50 , G03F7/20
CPC分类号： G11C17/16 , G11C17/18 , H01L23/5252 , H01L27/101 , H01L27/112 , H01L27/11206 , H01L2924/0002 , H01L2924/00
摘要： A method for fabricating an anti-fuse memory cell having a semiconductor structure with a minimized area. The method includes providing a reference pattern for the semiconductor structure, and applying a reverse OPC technique that includes inverting selected corners of the reference pattern. The reverse OPC technique uses photolithographic distortions to provide a resulting fabricated pattern that is intentionally distorted relative to the reference pattern. By inverting corners of a geometric reference pattern, the resulting distorted pattern will have an area that is reduced relative to the original reference pattern. This technique is advantageous for reducing the area of a selected region of a semiconductor structure which may otherwise not be possible through normal design parameters.
摘要翻译：一种制造具有最小面积的半导体结构的反熔丝存储单元的方法。该方法包括提供用于半导体结构的参考图案，以及应用包括反转参考图案的所选角的反向OPC技术。反向OPC技术使用光刻失真来提供相对于参考图案有意失真的结果制造图案。通过反转几何参考图案的角，所得到的失真图案将具有相对于原始参考图案减小的面积。该技术有利于减小半导体结构的选定区域的面积，否则可能通过正常的设计参数是不可能的。

10. 发明授权

US08026574B2 Anti-fuse memory cell 有权
标题翻译：防熔丝存储单元
公开(公告)号：US08026574B2
公开(公告)日：2011-09-27
申请号：US12814124
申请日：2010-06-11
申请人： Wlodek Kurjanowicz , Steven Smith
发明人： Wlodek Kurjanowicz , Steven Smith
IPC分类号： H01L29/00
CPC分类号： G11C17/16 , H01L23/5252 , H01L27/101 , H01L27/112 , H01L27/11206 , H01L2924/0002 , H01L2924/00
摘要： An anti-fuse memory cell having a variable thickness gate oxide. The variable thickness gate oxide has a thick gate oxide portion and a thin gate oxide portion, where the thing gate oxide portion has at least one dimension less than a minimum feature size of a process technology. The thin gate oxide can be rectangular in shape or triangular in shape. The anti-fuse transistor can be used in a two-transistor memory cell having an access transistor with a gate oxide substantially identical in thickness to the thick gate oxide of the variable thickness gate oxide of the anti-fuse transistor.
摘要翻译：具有可变厚度栅极氧化物的反熔丝存储单元。可变厚栅极氧化物具有厚的栅极氧化物部分和薄的栅极氧化物部分，其中栅极氧化物部分具有小于工艺技术的最小特征尺寸的至少一个尺寸。薄栅氧化物的形状可以是矩形或三角形。反熔丝晶体管可以用于具有存取晶体管的双晶体管存储单元，栅极氧化物的厚度与抗熔丝晶体管的可变厚栅极氧化物的厚栅极氧化物的厚度基本相同。

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