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1. 发明专利

FR2691881B1 未知
公开(公告)号：FR2691881B1
公开(公告)日：1994-09-09
申请号：FR9207221
申请日：1992-06-05
申请人： CIRAD SAR , CEMAGREF , ENSIA SIARC , CEMAGREF , ENSIA SIARC
发明人： MAROUZE CLAUDE , GIROUX FRANCOIS , BONICEL JEAN-FANCOIS , THAUNAY PATRICE , CLAUDE MAROUZE , FRANCOIS GIROUX , JEAN-FANCOIS BONICEL , PATRICE THAUNAY
IPC分类号： A23B4/26 , A23B7/08 , A23P1/00 , A23B7/022 , B01F7/04 , B01F7/24

2. 发明申请

WO1991018448A1 BiCMOS DIGITAL DRIVER CIRCUIT 审中-公开
标题翻译： BiCMOS数字驱动电路
公开(公告)号：WO1991018448A1
公开(公告)日：1991-11-28
申请号：PCT/US1991003192
申请日：1991-05-08
申请人： SIARC
发明人： SIARC , EL GAMAL, Abbas
IPC分类号： H03K19/01
CPC分类号： H03K19/09448
摘要： In one embodiment of the invention, a CMOS device (32) inverts an input signal and provides this inverted input signal into the base of an NPN bipolar transistor (Q3) whose collector is coupled to a positive power supply voltage. The input signal coupled to the input of the CMOS device is also coupled to the gate of a large N-channel MOSFET (Q4) having its drain coupled to the emitter of the bipolar transistor and its source coupled to ground. The common node (36) of the bipolar transistor and the N-channel MOSFET provides the output signal of the driver. This driver uses much less area than a standard two-bipolar transistor BiCMOS driver with substantially equal performance.

3. 发明申请

WO1991018447A1 BASIC CELL FOR BiCMOS GATE ARRAY 审中-公开
标题翻译： BiCMOS门阵列的基本单元
公开(公告)号：WO1991018447A1
公开(公告)日：1991-11-28
申请号：PCT/US1991003191
申请日：1991-05-08
申请人： SiARC
发明人： SiARC , EL GAMAL, Abbas
IPC分类号： H03K19/01
CPC分类号： H03K19/09448 , H01L27/11896 , H03K19/1735
摘要： An improved cell (20) for use in a mask programmable gate array is disclosed herein. The preferred cell comprises two compute sections, each comprising two pairs of medium size P (44 and 46) and N-channel (50 and 52), two small N-channel transistors (54 and 56), and a single small P-channel transistor (48). Each cell also comprises a high efficiency drive section containing a single bipolar pull-up transistor (58), a large N-channel pull-down transistor (62), and a small P-channel transistor (60). By using this cell, an extremely high compute capability per die area is achieved.

4. 发明申请

WO1992022924A1 BASIC CELL ARCHITECTURE FOR MASK PROGRAMMABLE GATE ARRAY 审中-公开
标题翻译：用于可编程门阵列的基本单元架构
公开(公告)号：WO1992022924A1
公开(公告)日：1992-12-23
申请号：PCT/US1992005003
申请日：1992-06-11
申请人： SIARC
发明人： SIARC , EL GAMAL, Abbas
IPC分类号： H01L27/02
CPC分类号： H01L27/11896 , H01L27/11807 , H03K19/09448 , H03K19/1735
摘要： A highly efficient CMOS cell structure for use in a metal mask programmable gate array, such as a sea-of-gates type gate array, is disclosed herein. In a basic cell, in accordance with one embodiment of the invention, three or more sizes of N-channel transistors (24-35) and three or more sizes of P-channel transistors (18-23 and 36-41) are used. The larger size transistors are incorporated in a drive (12) section of a cell, while the smaller size transistors are incorporated in each compute section (12) of a cell. The particular transistors in the compute and drive sections and the arrangements of the compute and drive sections provide a highly efficient use of silicon real estate while enabling the formation of a wide variety of macrocells to be formed.
摘要翻译：本文公开了一种用于金属掩模可编程门阵列的高效CMOS单元结构，例如海门型门阵列。在基本单元中，根据本发明的一个实施例，使用三个或更多个尺寸的N沟道晶体管（24-35）和三个或更多个尺寸的P沟道晶体管（18-23和36-41）。较大尺寸的晶体管被结合在单元的驱动（12）部分中，而较小尺寸的晶体管被结合在单元的每个计算部分（12）中。计算和驱动部分中的特定晶体管以及计算和驱动部分的布置提供了硅实体的高效利用，同时能够形成要形成的各种宏单元。

5. 发明专利

AU7899191A BASIC CELL FOR BICMOS GATE ARRAY 未知
公开(公告)号：AU7899191A
公开(公告)日：1991-12-10
申请号：AU7899191
申请日：1991-05-08
申请人： SIARC
发明人： GAMAL ABBAS EL
IPC分类号： H01L21/82 , H01L21/8249 , H01L27/06 , H01L27/10 , H01L27/118 , H03K3/356 , H03K19/08 , H03K19/0944 , H03K19/173 , H03K19/177 , H03K19/01 , H03K19/003 , H03K19/082 , H03K19/094

6. 发明专利

FR2691882A1 Dehydration and impregnation of morsels of food by gentle mixing - by hydraulic action of recirculated hot sugar or salt soln. 未知
公开(公告)号：FR2691882A1
公开(公告)日：1993-12-10
申请号：FR9207222
申请日：1992-06-05
申请人： CIRAD SAR , CEMAGREF , ENSIA SIARC
发明人： CLAUDE MAROUZE , FRANCOIS GIROUX , JEAN-FRANCOIS BONICEL , PATRICE THAUNAY
IPC分类号： A23B4/26 , A23B7/08 , A23P1/00 , A23B7/022 , B01F5/00
摘要： Small pieces of food prods. (10) are dehydrated and impregnated by a conc. soln. of sugar or salt at a temp. of 30-70 deg.C. Dehydration and impregnation takes place in a vessel (1) filled with a soln. of higher density than that of the prods., to a depth (2) sufficient to completely immerse the prods. The soln. is circulated to maintain a constant concn. around the pieces of prod. Pieces of prod. are moved downwards by a flux of soln. injected by nozzles (11) above the liq. surface. This jet also impregnates prods. at the surface. Prods. are allowed to rise, according to their own buoyancy, to the surface. This circulation continues until the prods. are completely dehydrated. USE/ADVANTAGE - Dehydration of small pieces of food prods. of animal or vegetable origin, particularly fragile prods. of low density (about 0.8) such as strawberries or bananas. A high concn. gradient is maintained at the prod.-soln. interface by mixing. Prods. are not damaged by the gentle action, avoiding oxidn. reactions which produce undesirable enzymatic browning. Residence time can be controlled, according to the geometry and size of the pieces. Prods. can be placed in and out of the vessel without damage.

7. 发明专利

AU2238692A BASIC CELL ARCHITECTURE FOR MASK PROGRAMMABLE GATE ARRAY 未知
公开(公告)号：AU2238692A
公开(公告)日：1993-01-12
申请号：AU2238692
申请日：1992-06-11
申请人： SIARC
发明人： ABBAS EL GAMAL
IPC分类号： H01L21/82 , H01L27/118 , H03K19/0944 , H03K19/173
摘要： A highly efficient CMOS cell structure for use in a metal mask programmable gate array, such as a sea-of-gates type gate array, is disclosed herein. In a basic cell, in accordance with one embodiment of the invention, three or more sizes of N-channel transistors and three or more sizes of P-channel transistors are used. The larger size transistors are incorporated in a drive section of a cell, while the smaller size transistors are incorporated in each compute section of a cell. The particular transistors in the compute and drive sections and the arrangements of the compute and drive sections provide a highly efficient use of silicon real estate while enabling the formation of a wide variety of macrocells to be formed.

8. 发明专利

AU7987891A BICMOS DIGITAL DRIVER CIRCUIT 未知
公开(公告)号：AU7987891A
公开(公告)日：1991-12-10
申请号：AU7987891
申请日：1991-05-08
申请人： SIARC
发明人： GAMAL ABBAS EL
IPC分类号： H03K17/567 , H03K19/01 , H03K19/08 , H03K19/0944 , H03K19/003 , H03K19/082 , H03K19/094
摘要： In one embodiment of the invention, an inverter inverts an input signal and provides this inverted input signal into the base of an NPN bipolar transistor, acting as a pull-up device, whose collector is coupled to a positive power supply voltage. The input signal coupled to the input of the inverter is also coupled to the gate of a large N-channel MOSFET, acting as a pull-down device, having its drain coupled to the emitter of the bipolar transistor and its source coupled to ground. The common node of the bipolar transistor and the N-channel MOSFET provides the output signal of the driver. This driver uses much less area than a standard two-bipolar transistor BiCMOS driver with substantially equal performance. A small P-channel MOSFET having its gate connected to the input signal may be connected across the base and emitter of the bipolar transistor to provide a full output voltage at the output of the driver.

9. 发明专利

FR2691881A1 Dehydration and impregnation of pieces of food - by gentle mixing by mechanical and hydraulic action, in hot soln. of sugar or salt 未知
公开(公告)号：FR2691881A1
公开(公告)日：1993-12-10
申请号：FR9207221
申请日：1992-06-05
申请人： CIRAD SAR , CEMAGREF , ENSIA SIARC
发明人： CLAUDE MAROUZE , FRANCOIS GIROUX , JEAN-FANCOIS BONICEL , PATRICE THAUNAY
IPC分类号： A23B4/26 , A23B7/08 , A23P1/00 , A23B7/022 , B01F7/04 , B01F7/24
摘要： Small pieces of food products (12) are dehydrated and impregnated by a concentrated soln. of sugar or salt (15) at a temp. of 30-70 deg.C. Dehydration and impregnation takes place in a vessel (1) filled with a soln. (15) of higher density than that of the products, to a depth (7) sufficient to completely immerse the products. The soln. is circulated to maintain a constant concn. around the pieces of product. Pieces of product are moved slowly downwards by a mechanical agitator (2), then allowed to rise, according to their own bouyancy, to the surface. This circulation continues until the products are completely dehydrated. USE/ADVANTAGE - Dehydration of small pieces of food products of animal or vegetable origin, particularly fragile products of low density (about 0.8) such as strawberries or bananas. A high concn. gradient is maintained at the product-soln. interface by mixing. Products are not damaged by the gentle action, avoiding oxidn. reactions which produce undesirable enzymatic browning. Residence time can be controlled, according to the geometry and size of the pieces. Products can be put in and out of the vessel without damage.

10. 发明授权

US5289021A Basic cell architecture for mask programmable gate array with 3 or more size transistors 失效
标题翻译：具有3个或更多尺寸晶体管的掩模可编程门阵列的基本单元架构
公开(公告)号：US5289021A
公开(公告)日：1994-02-22
申请号：US717140
申请日：1991-06-18
申请人： Abbas El Gamal
发明人： Abbas El Gamal
IPC分类号： H01L21/82 , H01L27/118 , H03K19/0944 , H03K19/173 , H01L27/02 , H01L27/10
CPC分类号： H01L27/11896 , H01L27/11807 , H03K19/09448 , H03K19/1735
摘要： A highly efficient CMOS cell structure for use in a metal mask programmable gate array, such as a sea-of-gates type gate array, is disclosed herein. In a basic cell, in accordance with one embodiment of the invention, three or more sizes of N-channel transistors and three or more sizes of P-channel transistors are used. The larger size transistors are incorporated in a drive section of a cell, while the smaller size transistors are incorporated in each compute section of a cell. The particular transistors in the compute and drive sections and the arrangements of the compute and drive sections provide a highly efficient use of silicon real estate while enabling the formation of a wide variety of macrocells to be formed.
摘要翻译：本文公开了一种用于金属掩模可编程门阵列的高效CMOS单元结构，例如海门型门阵列。在基本单元中，根据本发明的一个实施例，使用三个或更多个尺寸的N沟道晶体管和三个或更多个尺寸的P沟道晶体管。较大尺寸的晶体管被并入电池的驱动部分，而较小尺寸的晶体管被结合在电池的每个计算部分中。计算和驱动部分中的特定晶体管以及计算和驱动部分的布置提供了硅实现高效率的使用，同时能够形成要形成的各种宏单元。

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