专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2003034491A2 SEMICONDUCTOR COMPONENT 审中-公开
标题翻译：半导体元件
公开(公告)号：WO2003034491A2
公开(公告)日：2003-04-24
申请号：PCT/JP2002/010611
申请日：2002-10-11
申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD. , KOBAYASHI, Tsuyoshi , MURAMATSU, Shigetsugu , KAZAMA, Takuya
发明人： KOBAYASHI, Tsuyoshi , MURAMATSU, Shigetsugu , KAZAMA, Takuya
IPC分类号： H01L23/485
CPC分类号： H01L24/06 , H01L23/525 , H01L23/528 , H01L24/48 , H01L24/49 , H01L25/0657 , H01L2224/0401 , H01L2224/05599 , H01L2224/06153 , H01L2224/16145 , H01L2224/32225 , H01L2224/48227 , H01L2224/4943 , H01L2224/73265 , H01L2224/85399 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01061 , H01L2924/01078 , H01L2924/01082 , H01L2924/12041 , H01L2224/45099 , H01L2924/00
摘要： A semiconductor component having electrode terminals 14 formed in rectangular planar shapes arranged in parallel on an electrode forming surface of a semiconductor chip and formed with rerouting patterns 16 electrically connected with the electrode terminals 14 through vias on the surface of an electrical insulating layer covering the electrode forming surface, characterized in that the planar arrangement of the via pads 20 formed on the surface of the electrical insulating layer is made an arrangement alternately offset to one side and the other side of the longitudinal direction of the electrode terminals 14 and in that rerouting patterns 16 are provided connected to the via pads 20. The present invention enables easy formation of rerouting patterns even when the electrode terminals are arranged at fine intervals.
摘要翻译：在半导体芯片的电极形成表面上平行排列的矩形平面形状中形成有电极端子14并且形成有通过表面上的通孔与电极端子14电连接的重布线图案16的半导体组件覆盖电极形成表面的电绝缘层，其特征在于，形成在电绝缘层表面上的通孔焊盘20的平面布置交替地偏移到电绝缘层的纵向方向的一侧和另一侧电极端子14，并且其中提供了与路径焊盘20相连的重新布线图形16.本发明即使在电极端子以精细间隔排列时也能够容易地形成重新布线图形。

2. 发明申请

WO1996035249A1 DISCHARGE TUBE WITH COATED DISCHARGE SURFACE 审中-公开
标题翻译：放电管与涂层放电表面
公开(公告)号：WO1996035249A1
公开(公告)日：1996-11-07
申请号：PCT/JP1996001200
申请日：1996-05-01
申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD. , MACHIDA, Kazuhiko
发明人： SHINKO ELECTRIC INDUSTRIES CO., LTD.
IPC分类号： H01T01/20
CPC分类号： H01T1/22
摘要： A discharge tube (10) comprising two electrodes (14a and 14b) opposed to each other via intervening insulators (12), wherein the discharge surfaces of the electrodes (14a and 14b) are each coated with a coating agent (16) containing 0.01-60 wt.% of at least one alkali metal salt selected among potassium bromide, potassium fluoride and sodium fluoride in order to attain a stable starting voltage even under a surge voltage with a short rise time.
摘要翻译：一种放电管（10），包括通过插入绝缘体（12）彼此相对的两个电极（14a和14b），其中电极（14a和14b）的放电表面各自涂覆有包含0.01- 60重量％的至少一种选自溴化钾，氟化钾和氟化钠的碱金属盐，以便即使在短时间的浪涌电压下也能获得稳定的起始电压。

3. 发明申请

WO1994011902A1 LEAD FRAME AND SEMICONDUCTOR DEVICE USING SAME 审中-公开
标题翻译：引导框架和使用相同的半导体器件
公开(公告)号：WO1994011902A1
公开(公告)日：1994-05-26
申请号：PCT/JP1993001677
申请日：1993-11-16
申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD. , KURAISHI, Fumio , YUMOTO, Kazuhito , HAYASHI, Mamoru
发明人： SHINKO ELECTRIC INDUSTRIES CO., LTD.
IPC分类号： H01L23/495
CPC分类号： H01L23/49558 , H01L21/4846 , H01L23/24 , H01L23/4334 , H01L23/49572 , H01L24/48 , H01L24/49 , H01L2224/16245 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2924/00014 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： In a lead frame adapted to be used for a semiconductor device, a plurality of inner leads (18) are made of a thin conductive material for easily forming a fine pattern of the inner leads. A plurality of outer leads (20) are integrally formed with the respective inner leads. The outer leads are coated with metal layers to increase the thickness thereof, so that a desired strength of the outer leads is obtained. A semiconductor chip (24) is electrically connected to the inner leads. The semiconductor chip and a part of the lead frame including the inner leads are hermetically sealed with a resin (26) and, thus, a semiconductor device is obtained.
摘要翻译：在适于用于半导体器件的引线框架中，多个内引线（18）由薄导电材料制成，用于容易地形成内引线的精细图案。多个外引线（20）与相应的内引线一体地形成。外部引线用金属层涂覆以增加其厚度，从而获得外部引线所需的强度。半导体芯片（24）电连接到内引线。半导体芯片和包括内部引线的引线框架的一部分用树脂（26）气密密封，从而获得半导体器件。

4. 发明申请

WO1997028296A1 AQUEOUS SOLUTION FOR FORMING METAL COMPLEXES, TIN-SILVER ALLOY PLATING BATH, AND PROCESS FOR PRODUCING PLATED OBJECT USING THE PLATING BATH 审中-公开
标题翻译：用于形成金属复合物的水溶液，镀锡合金镀层，以及使用镀层制造生产镀层物体的工艺
公开(公告)号：WO1997028296A1
公开(公告)日：1997-08-07
申请号：PCT/JP1997000209
申请日：1997-01-30
申请人： NAGANOKEN , SHINKO ELECTRIC INDUSTRIES CO., LTD. , ARAI, Susumu , WATANABE, Tohru , HIGASHI, Mitsutoshi
发明人： NAGANOKEN , SHINKO ELECTRIC INDUSTRIES CO., LTD.
IPC分类号： C25D03/56
CPC分类号： H01L24/10 , C25D3/60 , C25D3/64 , H01L23/49866 , H01L24/13 , H01L2224/03912 , H01L2224/0401 , H01L2224/13 , H01L2224/13099 , H01L2924/01006 , H01L2924/01011 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01058 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/15747 , H05K3/244 , H05K3/3473 , H01L2924/00
摘要： A tin-silver alloy plating bath characterized by comprising as the fundamental ingredients a tin compound, a silver compound, and complexing agents therefor consisting of a pyrophosphoric acid compound and an iodine compound. The bath is capable of depositing a tin-silver alloy coating having any desired composition at a high current efficiency without using any cyanide harmful to the human body. The plating bath is so stable as to withstand air agitation. The tin-silver alloy coating deposited from the plating bath is satisfactory in appearance, tight adhesion, and solder wettability, and is superior as a lead-free solder plating alloy.
摘要翻译：一种锡 - 银合金电镀浴，其特征在于，以锡化合物，银化合物为基本成分，以及由焦磷酸化合物和碘化合物构成的络合剂。该浴能够以高电流效率沉积具有任何所需组成的锡 - 银合金涂层，而不使用对人体有害的任何氰化物。镀浴非常稳定，可以承受空气搅拌。从镀浴沉积的锡 - 银合金涂层外观令人满意，粘合性好，焊料润湿性好，作为无铅焊料镀层合金优越。

5. 发明申请

WO1997022146A1 SEMICONDUCTOR PACKAGE WITH MULTILAYERED CIRCUIT AND SEMICONDUCTOR DEVICE 审中-公开
标题翻译：具有多层电路和半导体器件的半导体封装
公开(公告)号：WO1997022146A1
公开(公告)日：1997-06-19
申请号：PCT/JP1996003590
申请日：1996-12-06
申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD. , SASAKI, Masayuki , HANABUSA, Takayoshi
发明人： SHINKO ELECTRIC INDUSTRIES CO., LTD.
IPC分类号： H01L23/12
CPC分类号： H01L23/13 , H01L21/4857 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L2224/16 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/16195
摘要： In a semiconductor package provided with a multilayered circuit formed by the so-called build-up system. A semiconductor chip is firmly fixed. The yield and the reliability such as of the durability of a semiconductor device is improved. The semiconductor package is provided with an insulating core substrate (10). On one side of the substrate (10), a semiconductor chip mounting area (20) where semiconductor chips (14) are mounted is provided and a wiring pattern (12) composed of metallic foil is formed. One end of the pattern (12) is extended into the area (20) and layers having thin film wiring patterns (22) connected to the pattern (12) are formed through thin film insulating layers (18) over the area surrounding the chip mounting area (20). The chip mounting area (20) is in a recess defined by the pattern (22) and the insulating layers (18).
摘要翻译：在具有由所谓的建立系统形成的多层电路的半导体封装中。半导体芯片牢固地固定。提高了半导体器件的耐久性等产率和可靠性。半导体封装设置有绝缘芯基板（10）。在基板（10）的一侧，设置安装半导体芯片（14）的半导体芯片安装区域（20），形成由金属箔构成的布线图案（12）。图案（12）的一端延伸到区域（20）中，并且连接到图案（12）的具有薄膜布线图案（22）的层通过在芯片安装件周围的区域上的薄膜绝缘层（18）形成区域（20）。芯片安装区域（20）位于由图案（22）和绝缘层（18）限定的凹部中。

6. 发明申请

WO2003069670A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2003069670A1
公开(公告)日：2003-08-21
申请号：PCT/JP2003/001265
申请日：2003-02-06
申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD. , TSUKADA, Futoshi , MASAKI, Keiichi
发明人： TSUKADA, Futoshi , MASAKI, Keiichi
IPC分类号： H01L23/29
CPC分类号： G01L19/141 , G01L19/147 , G06K9/0002 , H01L21/565 , H01L23/16 , H01L23/31 , H01L23/3107 , H01L24/48 , H01L2224/05599 , H01L2224/45099 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/85399 , H01L2924/00014 , H01L2924/181 , H01L2924/1815 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor element, such as a pressure sensor, having an upper surface, so that a part of the upper surface is exposed to the outside, while this element is in use. The element is sealed with a sealing resin. The sealing resin has a second, upper surface and a recess, so that said part of the first, upper surface of the semiconductor element is exposed outside at the bottom of said recess which is opened at the second, upper second surface. A releasable protective member has a shape corresponding to the recess and is placed in the recess, so that, when said protective member is in the recess, a bottom surface thereof is in contact with the part of the first, upper face of the protective member and the upper face of the resin coincides with the second surface of the sealing resin.
摘要翻译：具有上表面的半导体元件，例如压力传感器，使得在使用该元件时，上表面的一部分暴露于外部。元件用密封树脂密封。密封树脂具有第二上表面和凹部，使得半导体元件的第一上表面的所述部分在位于第二上第二表面处的所述凹部的底部暴露在外部。可释放的保护构件具有与凹部对应的形状并且被放置在凹部中，使得当所述保护构件在凹部中时，其底表面与保护构件的第一上表面的一部分接触并且树脂的上表面与密封树脂的第二表面重合。

7. 发明申请

WO2003034491A3 SEMICONDUCTOR COMPONENT 审中-公开
公开(公告)号：WO2003034491A3
公开(公告)日：2003-04-24
申请号：PCT/JP2002/010611
申请日：2002-10-11
申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD. , KOBAYASHI, Tsuyoshi , MURAMATSU, Shigetsugu , KAZAMA, Takuya
发明人： KOBAYASHI, Tsuyoshi , MURAMATSU, Shigetsugu , KAZAMA, Takuya
IPC分类号： H01L23/485
摘要： A semiconductor component having electrode terminals 14 formed in rectangular planar shapes arranged in parallel on an electrode forming surface of a semiconductor chip and formed with rerouting patterns 16 electrically connected with the electrode terminals 14 through vias on the surface of an electrical insulating layer covering the electrode forming surface, characterized in that the planar arrangement of the via pads 20 formed on the surface of the electrical insulating layer is made an arrangement alternately offset to one side and the other side of the longitudinal direction of the electrode terminals 14 and in that rerouting patterns 16 are provided connected to the via pads 20. The present invention enables easy formation of rerouting patterns even when the electrode terminals are arranged at fine intervals.

8. 发明申请

WO1999004354A1 A LICENSE MANAGEMENT SYSTEM 审中-公开
标题翻译：许可管理系统
公开(公告)号：WO1999004354A1
公开(公告)日：1999-01-28
申请号：PCT/JP1997002460
申请日：1997-07-15
申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD. , SILICON AUTOMATION SYSTEMS PVT. LTD. , SEKIGAWA, Kazunari , SATO, Tomomi , PATEL, Supriya, K. , SANKOLLI, Sanjay, D.
发明人： SHINKO ELECTRIC INDUSTRIES CO., LTD. , SILICON AUTOMATION SYSTEMS PVT. LTD.
IPC分类号： G06F17/60
CPC分类号： G06Q30/04
摘要： A license management system for software which drives a single computer or a plurality of computers includes: an application program for requesting a decision of the number of license which it needs to drive itself and for receiving issuance of the license; a number of license decision unit for determining the necessary number of licenses in accordance with the request from the application program; and a license management unit for issuing the number of licenses which was determined by the number of license decision unit. Further, the number of license decision unit has means for determining the number of licenses based on the following multi-nominal function, LK = f (x1, x2, ....., xn), where, LK is the number of licences, and x1 to xn are parameters which are needed to determine the number of licenses. According to the present invention, it is possible to provide a license management system enabling issuance of a license in which the sales strategy of a software maker was considered.
摘要翻译：用于驱动单个计算机或多个计算机的软件的许可证管理系统包括：应用程序，用于请求对其需要驱动的许可证的数量的决定并且用于接收许可证的发放; 许多许可证决定单元，用于根据应用程序的请求确定必要的许可数量; 以及许可证管理单元，用于发布由许可证决定单元的数量确定的许可证的数量。此外，许可证决定单元的数量具有用于基于以下多标称函数LK = f（x1，x2，...，xn）来确定许可证数量的装置，其中，LK是许可证的数量，而x1到xn是确定许可证数量所需的参数。根据本发明，可以提供能够发行软件生产者的销售策略的许可证的许可证管理系统。

9. 发明申请

WO1998025302A1 SEMICONDUCTOR DEVICE SEALED WITH RESIN, AND ITS MANUFACTURE 审中-公开
标题翻译：用树脂密封的半导体器件及其制造
公开(公告)号：WO1998025302A1
公开(公告)日：1998-06-11
申请号：PCT/JP1997004450
申请日：1997-12-04
申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD. , SAKAGUCHI, Noboru , MIYAJIMA, Yoshinori , HIZUME, Toru
发明人： SHINKO ELECTRIC INDUSTRIES CO., LTD.
IPC分类号： H01L23/28
CPC分类号： H01L23/3107 , H01L23/3114 , H01L23/49816 , H01L2224/50 , H01L2924/3025
摘要： A semiconductor device which can improve production efficiency and also can seal exposed parts such as a lead without fail and can prevent chipping. This device possesses a semiconductor chip (10), an insulating member (20) which is bonded to the side of the face (10a), where an electrode terminal (12) is formed, of the semiconductor chip (10), a wiring pattern (30) whose one end side is formed into a land part (32) connected with the side of an external connection terminal and provided on the insulating member (20) and whose other end side is formed into a lead part (34) connected with the electrode terminal (12), and a resin-sealed part (50) which seals the face (10a) where the electrode terminal is formed, the lead (34), and the side face of the semiconductor chip (10), being filled and hardened in the gap between the face (10) where the electrode terminal is formed and a cover member (52) which is formed larger in external form than the semiconductor chip (10) so that it may cover the face (10a) where the electrode terminal is formed and the top of the lead (34) and also cover the vicinity of the outer edge of the semiconductor chip (10).
摘要翻译：一种可以提高生产效率并且还能够一次性地密封诸如导线的暴露部件的半导体器件，并且可以防止碎裂。该装置具有半导体芯片（10），与半导体芯片（10）的形成有电极端子（12）的面（10a）侧的绝缘构件（20），布线图案（30），其一端形成为与外部连接端子侧连接并设置在所述绝缘构件（20）上并且另一端侧形成为与所述绝缘构件（20）连接的引线部（34）的接地部（32）电极端子（12）和密封形成电极端子的面（10a）的树脂密封部（50），引线（34）和半导体芯片（10）的侧面被填充并且在形成有电极端子的面（10）和形成为比半导体芯片（10）大的外部形状的盖构件（52）之间的间隙中硬化，使得其可以覆盖面（10a），其中形成电极端子和引线（34）的顶部并且还覆盖半导体的外边缘附近芯片（10）。

10. 发明专利

AU4395699A Ic card and ic card antenna and antenna frame 未知
公开(公告)号：AU4395699A
公开(公告)日：2000-04-17
申请号：AU4395699
申请日：1999-07-01
申请人： SHINKO ELECTRIC INDUSTRIES CO LTD
发明人： KASAHARA TETSUICHIRO , TSUKIOKA HIROKAZU , HANIUDA HIROFUMI
IPC分类号： G06K19/07 , B42D15/10 , G06K19/00 , G06K19/077 , H01Q1/38 , H01Q7/00
摘要： There is provided an antenna frame (40) for an IC card (10), wherein a plane coil (14) formed by punching or etching a thin metallic sheet in which a conductor line (12) is substantially wound a plurality of times on the same plane is supported by an outside frame (44) formed in such a manner that a predetermined interval (42) is left between the outermost conductor (12a) of the plane coil (14) and the outside frame (44). The outermost conductor (12a) of the plane coil (14) is connected with a support portion (46) extending from an inside edge of the outside frame (44), and the conductors (12) on the circumferences adjacent to each other in the inward and outward direction of the plane coil (14) are connected with each other by connecting pieces (54).

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式