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    • 81. 发明授权
    • Method of setting-up and controlling synchronization within a modem
    • 在调制解调器内设置和控制同步的方法
    • US06577650B1
    • 2003-06-10
    • US09364132
    • 1999-07-30
    • Christopher Neville TateLeslie Derek HumphreyRoger James WilliamsonIgor Kajetan Czajkowski
    • Christopher Neville TateLeslie Derek HumphreyRoger James WilliamsonIgor Kajetan Czajkowski
    • H04J306
    • H04L5/0048H04L5/1469H04L27/2655H04L27/2657H04L27/2662H04L27/2675
    • To facilitate acquisition of lock in a multiple sub-channel carrier scheme, a plurality of time-continuous pilots (102) on known sub-channels are made available to an addressed unit across the frequency spectrum. The addressed unit is then able to select one of these pilots for training purposes and specifically for frequency and phase acquisition (106). The selection is based, typically, on the pilot with either the best signal to noise ratio or the first pilot to satisfy the minimum quality requirements for effective training. Discontinuous carriers, of which there can be several, are then used to identify a symbol boundary at the addressed unit. Once acquisition has been established, the pilots can, if desired, be released to carry low-bit rate traffic, although it is preferable to retain pilot tones for use within the system. Selection of the pilot from one of a number of alternative sub-channels distributed through the spectrum therefore ensures accurate synchronisation irrespective of whether portions of the spectrum are generally noisy and unclean.
    • 为了便于在多子载波方案中获取锁定,已知子信道上的多个时间连续的导频(102)对频谱上的寻址单元是可用的。 所寻址的单元然后能够选择这些导频中的一个用于训练目的,特别是用于频率和相位采集(106)。 该选择通常是基于具有最佳信噪比的飞行员或第一飞行员来满足有效训练的最低质量要求。 然后使用其中可以有几个的不连续载波来识别寻址单元的符号边界。 一旦获取已经建立,如果需要,导频可以被释放以携带低比特率业务,尽管优选地保留在系统内使用的导频音。 因此,通过频谱分配的多个备选子信道之一选择导频,可以确保准确的同步,而不管频谱的各个部分是否一般噪声和不清洁。
    • 83. 发明授权
    • Clock recovery in a packet-based data network
    • 基于数据包的数据网络中的时钟恢复
    • US06574225B2
    • 2003-06-03
    • US09544737
    • 2000-04-07
    • John C. ReynoldsMike D. Nakamura
    • John C. ReynoldsMike D. Nakamura
    • H04J306
    • H04J3/0632H04J3/0658H04L12/403H04N21/4305
    • A method for recovering clock signals includes generating a media sync signal to synchronize processing of digital media, and generating a transmission reference clock signal to define a duration of a transaction through a packet-based data network. The media sync and transmission clock signals may have different frequency and phase. The media is sent to a slave node of the network. The media sync and transmission clock signals are correlated to generate phase correlation information, and the phase correlation information is also sent to the slave node. Accordingly, a relatively low cost and reliable clock recovery technique suitable for synchronizing media streams across a packet-based data network is disclosed.
    • 一种用于恢复时钟信号的方法包括产生媒体同步信号以同步数字媒体的处理,并且通过基于分组的数据网络生成传输参考时钟信号以定义事务的持续时间。 媒体同步和传输时钟信号可能具有不同的频率和相位。 媒体被发送到网络的从节点。 媒体同步传输时钟信号被相关联以产生相位相关信息,相位相关信息也被发送到从节点。 因此,公开了一种适用于跨基于分组的数据网络同步媒体流的相对低成本且可靠的时钟恢复技术。
    • 86. 发明授权
    • Low latency, low power deserializer
    • 低延迟,低功耗解串器
    • US06535527B1
    • 2003-03-18
    • US09302193
    • 1999-04-29
    • Michael L. Duffy
    • Michael L. Duffy
    • H04J306
    • H03M9/00H03L7/06H04J3/0685H04L7/033H04L7/0331H04L7/04Y10S370/914
    • An apparatus comprising a first circuit, a deserializer circuit and a framer circuit. The first circuit may be configured to present a clock signal and a data signal having a second data rate in response to an input signal having a first data rate. The deserializer circuit may comprise (a) a parallel register bank configured to generate an output signal in response to (i) the clock signal, (ii) the data signal and (iii) one or more select signals and (b) a state machine configured to generate the one or more select signals in response to one or more control signals. The framer circuit may be configured to generate the one or more control signals in response to (i) one or more input control signals and (ii) the output signal.
    • 一种包括第一电路,解串行器电路和成帧器电路的装置。 第一电路可以被配置为响应于具有第一数据速率的输入信号呈现具有第二数据速率的时钟信号和数据信号。 解串行器电路可以包括(a)并行寄存器组,其被配置为响应于(i)时钟信号,(ii)数据信号和(iii)一个或多个选择信号而产生输出信号,以及(b)状态机 被配置为响应于一个或多个控制信号而生成所述一个或多个选择信号。 成帧器电路可以被配置为响应于(i)一个或多个输入控制信号和(ii)输出信号而产生一个或多个控制信号。
    • 87. 发明授权
    • Method and apparatus for carrying packetized voice and data in wireless communication networks
    • 用于在无线通信网络中传送分组语音和数据的方法和装置
    • US06529527B1
    • 2003-03-04
    • US09612075
    • 2000-07-07
    • Tao ChenNikolai K. N. LeungRaymond Tah-Sheng Hsu
    • Tao ChenNikolai K. N. LeungRaymond Tah-Sheng Hsu
    • H04J306
    • H04W28/06H04L1/18
    • A method and apparatus for reducing transmission delay in a wireless communication system that carries packetized voice and data information. Interruptions in the traffic channels cause loss of synchronization between a header compressor and a header decompressor. Rather than transmitting resynchronization information on the traffic channel, the information dropped by an interruption is re-transmitted on a non-traffic channel in parallel with the traffic channel. At the remote station, information from the traffic channel and the non-traffic channel is reassembled before input into the decompressor. Alternatively, the non-traffic channel can be used to carry overflow information so that a higher average data rate can be achieved than the average data rate of the traffic channel alone.
    • 一种在携带分组语音和数据信息的无线通信系统中减少传输延迟的方法和装置。 业务信道中的中断导致报头压缩器和报头解压缩器之间的同步丢失。 不是在业务信道上发送再同步信息,而是在与业务信道并行的非业务信道上重新发送由中断丢弃的信息。 在远程站处,在输入到解压缩器之前重新组合来自业务信道和非业务信道的信息。 或者,非业务信道可以用于承载溢出信息,使得可以实现比单独的业务信道的平均数据速率更高的平均数据速率。
    • 88. 发明授权
    • Apparatus and method for data decoding
    • 数据解码装置及方法
    • US06516005B1
    • 2003-02-04
    • US09224052
    • 1998-12-31
    • Shu MurayamaTakeshi MioHiroshi HonmaSusumu Oka
    • Shu MurayamaTakeshi MioHiroshi HonmaSusumu Oka
    • H04J306
    • H04N21/4307H04N21/4341
    • The object of this invention is to realize the correct and prompt synchronization of data in decoding and reproducing multiplexed coded data multiplexed with a plurality of media coded data in the unit of packet without regard to the configuration or characteristics of the apparatus. To achieve a data decoder that can synchronize the video and audio data correctly, the timing controller obtains a buffering time indicated by the time difference between the decoding end time and the specified presentation time contained in the data, and data buffering is performed by buffer memory. The video decoding end time is latched from the system time counter according to a timing pulse generated by the video decoder when the first decoded data is output from video decoder after the data decoder is activated.
    • 本发明的目的是在数据单元内实现解码和再现与多个媒体编码数据多路复用的多路复用编码数据中的数据的正确和迅速的同步,而不考虑设备的配置或特性。 为了实现能够正确同步视频和音频数据的数据解码器,定时控制器获得由解码结束时间和包含在数据中的指定呈现时间之间的时间差指示的缓冲时间,并且数据缓冲由缓冲存储器 。 在数据解码器被激活之后,当从视频解码器输出第一解码数据时,根据由视频解码器产生的定时脉冲,从系统时间计数器锁存视频解码结束时间。