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    • 81. 发明授权
    • Semiconductor device
    • 半导体器件
    • US08284151B2
    • 2012-10-09
    • US13039378
    • 2011-03-03
    • Munehiro AzamiShou NagaoYoshifumi Tanada
    • Munehiro AzamiShou NagaoYoshifumi Tanada
    • G09G3/36H03K19/0175
    • H01L29/786H03K19/01714H03K19/01721
    • There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance (205) is provided between a gate and a source of a TFT (203) connected to an output node, and a circuit formed of TFTs (201) and (202) has a function to bring a node α into a floating state. When the node α is in the floating state, a potential of the node α is caused higher than VDD by using gate-source capacitance coupling of the TFT (203) through the capacitance (205), thus an output signal having an amplitude of VDD-GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.
    • 提供了一种半导体器件,其中可以通过仅使用一种导电类型的TFT构成电路并且可以正常获得输出信号的电压振幅来减小制造步骤。 电容(205)设置在连接到输出节点的TFT(203)的栅极和源极之间,并且由TFT(201)和(202)形成的电路具有使节点α成为浮置状态的功能 。 当节点α处于浮置状态时,通过使用TFT(203)通过电容(205)的栅源电容耦合,使节点α的电位高于VDD,因此具有VDD的幅度的输出信号 通常可以获得-GND,而不会由于TFT的阈值引起振幅衰减。
    • 82. 发明授权
    • Pulse output circuit, shift register and display device
    • 脉冲输出电路,移位寄存器和显示装置
    • US08264445B2
    • 2012-09-11
    • US12575642
    • 2009-10-08
    • Munehiro AzamiShou NagaoYoshifumi Tanada
    • Munehiro AzamiShou NagaoYoshifumi Tanada
    • G09G3/36
    • G11C19/28G02F1/13306G02F1/1333G09G3/36G09G3/3688G09G2310/0286G09G2330/021H01L27/1214H01L27/124
    • A drive circuit of a display device, which comprise only single conductive TFTs and in which amplitude of an output signal is normal, is provided.A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node á rises. When the potential of the node á reaches (VDD−VthN), the node á became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105. An output at the subsequent stage is then inputted to TFTs 102 and 103 to turn the TFTs 102 and 103 ON, while the potential of the node á drops down to turn the TFT 105 OFF. A TFT 106 turns ON at the same time so that the potential of the output node would reach the level L.
    • 提供了仅包括单个导电TFT并且输出信号的幅度正常的显示装置的驱动电路。 脉冲被输入到TFT 101和104,使得TFT将导通,然后节点á的电位升高。 当节点á的电位达到(VDD-VthN)时,节点á变为浮动状态。 因此,TFT 105然后导通,并且输出节点的电位随着时钟信号达到电平H而升高。另一方面,TFT 105的栅电极的电位由于电容107的操作而进一步上升,因为 输出节点的电位上升,使得输出节点的电位将高于(VDD + VthN)。 因此,输出节点的电位上升到VDD而没有由TFT105的阈值引起的电压降。然后,后级的输出被输入到TFT 102和103,以使TFT 102和103接通,同时 节点á下降以关闭TFT 105。 TFT 106同时导通,使得输出节点的电位达到电平L.
    • 84. 发明授权
    • Semiconductor device
    • 半导体器件
    • US07903079B2
    • 2011-03-08
    • US12552718
    • 2009-09-02
    • Munehiro AzamiShou NagaoYoshifumi Tanada
    • Munehiro AzamiShou NagaoYoshifumi Tanada
    • G09G3/36H03K19/0175
    • H01L29/786H03K19/01714H03K19/01721
    • There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance (205) is provided between a gate and a source of a TFT (203) connected to an output node, and a circuit formed of TFTs (201) and (202) has a function to bring a node α into a floating state. When the node α is in the floating state, a potential of the node α is caused higher than VDD by using gate-source capacitance coupling of the TFT (203) through the capacitance (205), thus an output signal having an amplitude of VDD-GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.
    • 提供了一种半导体器件,其中可以通过仅使用一种导电类型的TFT构成电路并且可以正常获得输出信号的电压振幅来减小制造步骤。 电容(205)设置在连接到输出节点的TFT(203)的栅极和源极之间,并且由TFT(201)和(202)形成的电路具有使节点α成为浮置状态的功能 。 当节点α处于浮置状态时,通过使用TFT(203)通过电容(205)的栅源电容耦合,使节点α的电位高于VDD,因此具有VDD的幅度的输出信号 通常可以获得-GND,而不会由于TFT的阈值引起振幅衰减。
    • 85. 发明授权
    • Light emitting device
    • 发光装置
    • US07808002B2
    • 2010-10-05
    • US11773172
    • 2007-07-03
    • Shunpei YamazakiJun KoyamaTatsuya AraoMunehiro Azami
    • Shunpei YamazakiJun KoyamaTatsuya AraoMunehiro Azami
    • H01L29/04
    • H01L27/3265H01L27/124H01L27/1255H01L27/3246H01L27/3258H01L27/3262H01L27/3276H01L29/78633
    • A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
    • 提供一种可以防止由于泄漏或其它原因引起的栅极电压变化并且同时可以防止开口率降低的发光器件。 电容器存储器由连接布线,绝缘膜和电容布线形成。 连接布线形成在栅电极和像素的TFT的有源层上,并与有源层连接。 绝缘膜形成在连接布线上。 电容布线形成在绝缘膜上。 这种结构使得电容器存储与TFT重叠,从而在保持开口率降低的同时增加电容器存储的容量。 因此,可以避免由于泄漏或其他原因导致的栅极电压的变化,以防止OLED的亮度变化和模拟驱动中屏幕的闪烁。
    • 90. 发明申请
    • Pulse Output Circuit, Shift Register and Display Device
    • 脉冲输出电路,移位寄存器和显示器件
    • US20060202940A1
    • 2006-09-14
    • US11420404
    • 2006-05-25
    • Munehiro AzamiShou NagaoYoshifumi Tanada
    • Munehiro AzamiShou NagaoYoshifumi Tanada
    • G09G3/36
    • G11C19/28G02F1/13306G02F1/1333G09G3/36G09G3/3688G09G2310/0286G09G2330/021H01L27/1214H01L27/124
    • A drive circuit of a display device, which comprise only single conductive TFTs and in which amplitude of an output signal is normal, is provided. A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node á rises. When the potential of the node á reaches (VDD−VthN), the node á became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105. An output at the subsequent stage is then inputted to TFTs 102 and 103 to turn the TFTs 102 and 103 ON, while the potential of the node á drops down to turn the TFT 105 OFF. A TFT 106 turns ON at the same time so that the potential of the output node would reach the level L.
    • 提供了仅包括单个导电TFT并且输出信号的幅度正常的显示装置的驱动电路。 脉冲被输入到TFT 101和104,使得TFT将导通,然后节点á的电位升高。 当节点á的电位达到(VDD-VthN)时,节点á变为浮动状态。 因此,TFT 105然后导通,并且输出节点的电位随着时钟信号达到电平H而上升。另一方面,由于电容107的操作,TFT 105的栅电极的电位进一步上升, 输出节点的电位上升,使得输出节点的电位将高于(VDD + VthN)。 因此,输出节点的电位上升到VDD而没有由TFT105的阈值引起的电压降。然后,后级的输出被输入到TFT 102和103,以使TFT 102和103接通,同时 节点á下降以关闭TFT 105。 TFT 106同时导通,使得输出节点的电位达到电平L.