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    • 82. 发明申请
    • Magnetic head coil system and damascene/reactive ion etching method for manufacturing the same
    • 磁头线圈系统和镶嵌/反应离子蚀刻方法制造相同
    • US20050152064A1
    • 2005-07-14
    • US11040387
    • 2005-01-20
    • Daniel BedellRichard HsiaoJames JarrattPatrick WebbSue Zhang
    • Daniel BedellRichard HsiaoJames JarrattPatrick WebbSue Zhang
    • G11B5/17G11B5/31G11B5/147
    • G11B5/313G11B5/3123G11B5/3163Y10T29/49021Y10T29/49032Y10T29/4906Y10T29/49064Y10T29/49073
    • A system and method are provided for manufacturing a coil structure for a magnetic head. Initially, an insulating layer is deposited with a photoresist layer deposited on the insulating layer. Moreover, a silicon dielectric layer is deposited on the photoresist layer as a hard mask. The silicon dielectric layer is then masked. A plurality of channels is subsequently formed in the silicon dielectric layer using reactive ion etching (i.e. CF4/CHF3). The silicon dielectric layer is then used as a hard mask to transfer the channel pattern in the photoresist layer using reactive ion etching with, for example, H2/N2/CH3F/C2H4 reducing chemistry. To obtain an optimal channel profile with the desired high aspect ratio, channel formation includes a first segment defining a first angle and a second segment defining a second angle. Thereafter, a conductive seed layer is deposited in the channels and the channels are filled with a conductive material to define a coil structure. Chemical-mechanical polishing may then be used to planarize the conductive material.
    • 提供一种用于制造用于磁头的线圈结构的系统和方法。 首先,沉积有沉积在绝缘层上的光致抗蚀剂层的绝缘层。 此外,硅介电层作为硬掩模沉积在光致抗蚀剂层上。 然后掩蔽硅介电层。 随后使用反应离子蚀刻(即CF 4 / CH 3)3在硅介电层中形成多个通道。 然后将硅介电层用作硬掩模,以使用例如H 2/2 N 2 / CH的反应离子蚀刻将光致抗蚀剂层中的沟道图案转印 还原化学反应。 为了获得具有期望的高纵横比的最佳通道轮廓,通道形成包括限定第一角度的第一段和限定第二角度的第二段。 此后,导电种子层沉积在通道中,并且通道填充有导电材料以限定线圈结构。 然后可以使用化学机械抛光来平坦化导电材料。
    • 84. 发明授权
    • Method of making magnetic head having narrow pole tip and fine pitch coil
    • 制造具有窄极尖和细间距线圈的磁头的方法
    • US06741422B2
    • 2004-05-25
    • US09884574
    • 2001-06-18
    • Richard HsiaoHugo Alberto Emilio Santini
    • Richard HsiaoHugo Alberto Emilio Santini
    • G11B531
    • G11B5/3163G11B5/012G11B5/17G11B5/3116G11B5/313Y10T29/49046
    • Following the deposition of an insulation layer, a patterned P2 pole tip seed layer is deposited. Significantly, the pole tip seed layer is not deposited beneath the induction coil area of the magnetic head. A dielectric layer is next deposited and a patterned RIE etching mask that includes both a P2 pole tip trench opening and an induction coil trench opening is fabricated upon the dielectric layer. Thereafter, in a single RIE etching step, the P2 pole tip trench is etched through the dielectric material down to the seed layer, and the induction coil trench is etched through the dielectric material down to the insulation layer. The P2 pole tip is first electroplated up into its trench, an induction coil seed layer is next deposited, and the induction coil is then electroplated up into the induction coil trench.
    • 在沉积绝缘层之后,沉积图案化的P2极端子种子层。 重要的是,极尖种子层没有沉积在磁头的感应线圈区域之下。 接下来沉积电介质层,并且在电介质层上制造包括P2极尖沟槽开口和感应线圈沟槽开口的图案化RIE蚀刻掩模。 此后,在单个RIE蚀刻步骤中,通过电介质材料将P2极尖沟槽蚀刻到种子层,并且感应线圈沟槽通过电介质材料被蚀刻到绝缘层。 首先将P2极端电镀到其沟槽中,然后沉积感应线圈种子层,然后将感应线圈电镀到感应线圈沟槽中。
    • 85. 发明授权
    • Device and method of reducing ESD damage in thin film read heads which enables measurement of gap resistances and method of making
    • 减薄薄膜读取头中的ESD损伤的装置和方法,能够测量间隙电阻和制作方法
    • US06678127B2
    • 2004-01-13
    • US09753804
    • 2001-01-02
    • Richard HsiaoJames D. JarrattEmo Hilbrand KlaassenIan Robson McFadyenTimothy J. Moran
    • Richard HsiaoJames D. JarrattEmo Hilbrand KlaassenIan Robson McFadyenTimothy J. Moran
    • G11B540
    • B82Y10/00G11B5/33G11B5/3967G11B5/40G11B5/455G11B33/10G11B2005/0013Y10T29/49032Y10T29/49036Y10T29/49039Y10T29/49043Y10T29/49044Y10T29/49071Y10T29/49073Y10T29/49078
    • A first read gap layer has a resistance RG1 between a first shield layer and one of the first and second lead layers of a read head and the second read gap layer has a resistance RG2 between a second shield layer and said one of the first and second lead layers of the read head. A connection is provided via a plurality of resistors between a first node and each of the first and second shield layers wherein the plurality of resistors includes at least first and second resistors RS1 and RS2 and the first node is connected to said one of the first and second lead layers. A second node is located between the first and second resistors RS1 and RS2. An operational amplifier has first and second inputs connected to the first and second nodes respectively so as to be across the first resistor RS1 and has an output connected to the first node for maintaining the first and second nodes at a common voltage potential. In a first embodiment the first and second shield layers are shorted together. A test instrument is then employed for determining the combined parallel resistance of the resistors RS1 and RS2 by having a first side of the test instrument connected to the first node and the second side connected to each of the first and second shield layers. In the second embodiment a third resistor RS3 is connected between the second node and one of the shield layers, such as the second shield layer. The test instrument can determine the resistances of the first and second gap layers separately by being connected between the first node and the first shield layer for the resistance of the first gap layer or between the first node and the second shield layer for the resistance of the second gap layer.
    • 第一读取间隙层在第一屏蔽层和读取头的第一和第二引线层中的一个之间具有电阻RG1,并且第二读取间隙层在第二屏蔽层和第一和第二引线之间的电阻RG2 读头的引导层。 通过第一节点和第一和第二屏蔽层中的每一个之间的多个电阻器提供连接,其中多个电阻器至少包括第一和第二电阻器RS1和RS2,并且第一节点连接到第一和第二屏蔽层中的所述第一和第二屏蔽层 第二铅层。 第二节点位于第一和第二电阻器RS1和RS2之间。 运算放大器具有分别连接到第一和第二节点的第一和第二输入,以跨过第一电阻器RS1并且具有连接到第一节点的输出,用于将第一和第二节点维持在共同的电压电位。 在第一实施例中,第一和第二屏蔽层被短路在一起。 然后通过使测试仪器的第一侧连接到第一节点并且第二侧连接到第一和第二屏蔽层中的每一个,然后采用测试仪器来确定电阻器RS1和RS2的组合并联电阻。 在第二实施例中,第三电阻器RS3连接在第二节点和其中一个屏蔽层之间,例如第二屏蔽层。 测试仪器可以通过连接在第一节点和第一屏蔽层之间来分别确定第一和第二间隙层的电阻,用于第一间隙层的电阻或第一节点和第二屏蔽层之间的电阻, 第二间隙层。
    • 86. 发明授权
    • Method of making a read sensor for a merged magnetic head with self-aligned low resistance leads
    • 制造具有自对准低电阻引线的合并磁头的读取传感器的方法
    • US06655007B2
    • 2003-12-02
    • US09761002
    • 2001-01-16
    • Richard Hsiao
    • Richard Hsiao
    • G11B5127
    • B82Y10/00G11B5/3116G11B5/3163G11B5/3173G11B5/3967Y10T29/49025Y10T29/49032Y10T29/49039Y10T29/49041Y10T29/49043Y10T29/49046Y10T29/49052
    • A method of making read sensor with self-aligned low resistance leads is provided. In the method a masking step has been eliminated by employing first, second and third protective capping layers in the construction of the read sensor and first and second lead layers. The first capping layer serves as a protective layer for the read sensor sites, the second capping layer protects low resistance lead layer portions during removal of the first capping layer from high resistance lead layer sites and then serves as a sacrificial layer during removal of spin valve material from the low resistance lead layer sites. The third capping layer protects the first and second lead layers during milling of low resistance lead layer material in field regions about the read sensor and first and second lead layers. The method aligns front edges of the low resistance lead layer portions with a rear edge of the read sensor so as to lower the overall resistance of the lead layers.
    • 提供了一种制造具有自对准低电阻引线的读取传感器的方法。 在该方法中,通过在读取传感器和第一和第二引线层的结构中采用第一,第二和第三保护盖层来消除掩模步骤。 第一覆盖层用作读取传感器位置的保护层,第二覆盖层在从第一覆盖层从高电阻引线层位置移除期间保护低电阻引线层部分,然后在去除自旋阀期间用作牺牲层 材料从低电阻铅层位置。 第三覆盖层在围绕读取传感器和第一和第二引线层的场区域中研磨低电阻引线层材料期间保护第一和第二引线层。 该方法将低电阻引线层部分的前边缘与读取传感器的后边缘对齐,以降低引线层的总体电阻。
    • 87. 发明授权
    • Thin film magnetic head
    • 薄膜磁头
    • US06621660B2
    • 2003-09-16
    • US09764019
    • 2001-01-16
    • Richard HsiaoNeil Leslie RobertsonPatrick Rush Webb
    • Richard HsiaoNeil Leslie RobertsonPatrick Rush Webb
    • G11B5147
    • G11B5/3163G11B5/3116G11B5/313G11B5/3133Y10T29/4906
    • The electroplated components of a magnetic head of the present invention are fabricated utilizing a seed layer that is susceptible to reactive ion etch removal techniques. A preferred seed layer is comprised of tungsten or titanium. Following the electroplating of the components utilizing a fluorine species reactive ion etch process the seed layer is removed, and significantly, the fluorine RIE process creates a gaseous tungsten or titanium fluoride compound removal product. The problem of seed layer redeposition along the sides of the electroplated components is overcome because the gaseous fluoride compound is not redeposited. The present invention also includes an enhanced two part seed layer, where the lower part is tungsten, titanium or tantalum and the upper part is composed of the material that constitutes the component to be electroplated.
    • 本发明的磁头的电镀部件利用易受反应离子蚀刻去除技术影响的晶种层来制造。 优选的种子层由钨或钛组成。 在利用氟物质反应离子蚀刻工艺对组分进行电镀之后,除去种子层,并且显着地,氟RIE工艺产生气态钨或氟化钛化合物去除产物。 由于气态氟化物不再沉积,克服了沿着电镀部件侧面的种子层再沉积的问题。 本发明还包括增强的两部分种子层,其中下部是钨,钛或钽,并且上部由构成待电镀部件的材料构成。
    • 89. 发明授权
    • Thin film inductive write head with minimal organic insulation material
and method for its manufacture
    • 薄膜感应写头,具有最小的有机绝缘材料及其制造方法
    • US6074566A
    • 2000-06-13
    • US933194
    • 1997-09-16
    • Richard HsiaoHugo Alberto Emilio SantiniClinton David Snyder
    • Richard HsiaoHugo Alberto Emilio SantiniClinton David Snyder
    • G11B5/31B44C1/22
    • G11B5/3163G11B5/3106G11B5/3133Y10T29/49052
    • A thin film inductive write head has minimal organic insulation material in contact with the encapsulating overcoat. The process for its fabrication includes a reactive ion etching (RIE) process to remove the organic insulative material while still allowing the head top pole piece to be planar. The organic insulation material is removed by RIE down to the head gap layer in the region between the ABS and the coil. The etching is done with the top or second pole piece acting as a mask so that the planarized organic insulation material is still maintained over the portion of the coil that is located between the two pole pieces. Thus the organic insulation material is still present in this region as the planarization layer onto which the ferromagnetic layer for the second pole piece was deposited. This allows the encapsulating overcoat to be deposited directly on the gap layer, which is formed of the same material as the overcoat, rather than on the organic insulation material, in a substantial portion of the write head structure. In a further embodiment the write head also has the organic insulation material removed down to the gap layer between the coil turns in the portion of the coil that does not lie beneath the second pole piece. The region between the coil turns in this portion of the coil is filled with overcoat material during the head encapsulation process.
    • 薄膜感应写头具有与封装外涂层接触的最小有机绝缘材料。 其制造方法包括反应离子蚀刻(RIE)工艺以去除有机绝缘材料,同时仍允许顶部顶部极片为平面的。 有机绝缘材料通过RIE在ABS和线圈之间的区域中被去除到头部间隙层。 用顶部或第二极靴作为掩模进行蚀刻,使得平面化的有机绝缘材料仍然保持在位于两个极片之间的线圈的部分上。 因此,有机绝缘材料在该区域中仍然存在于其上沉积有第二极片的铁磁层的平坦化层。 这允许封装外涂层直接沉积在与外涂层相同的材料形成的间隙层上,而不是在写头结构的实质部分中而不是在有机绝缘材料上沉积。 在进一步的实施例中,写入头还具有向下移动到不在第二极片下方的线圈部分的线圈之间的间隙层的有机绝缘材料。 在头部封装工艺期间,该线圈的该部分中的线圈匝之间的区域被外涂层材料填充。
    • 90. 发明授权
    • High resolution lead to shield short-resistant read head
    • 高分辨率导致屏蔽短路读头
    • US5978183A
    • 1999-11-02
    • US988812
    • 1997-12-11
    • Richard HsiaoTsann LinHugo Alberto Emilio Santini
    • Richard HsiaoTsann LinHugo Alberto Emilio Santini
    • G11B5/012G11B5/31G11B5/39G11B5/40
    • B82Y25/00B82Y10/00G11B5/3903G11B5/3967G11B2005/3996G11B5/012G11B5/313G11B5/3133G11B5/3163G11B5/40
    • An MR read head has first and second lead layers protected by first, second and third insulation layers in addition to the first and second insulative gap layers substantially all the way from the side edges of an MR sensor to terminals. The first and second insulation layers do not extend outside of the first and second lead layer sites so that greater heat dissipation can be realized from the MR sensor. Each lead layer comprises first and second lead layer films. Where these films overlap for electrical connection their top and bottom surfaces are protected by the first and second insulation layers and their edges are protected by the third insulation layer. Where the first lead layer film extends from the second lead layer film toward the respective terminal its bottom surface is protected by the first insulation layer and its top surface and its side edges are protected by the third insulation layer. Only three masks are required for fabricating or constructing these components. The first liftoff mask is employed for defining the first insulation layer and the first lead layer film. The second liftoff mask is employed for depositing the second lead layer film on the first lead layer film with an end of the second lead layer film for defining the track width of the MR sensor and making a contiguous junction with a respective side edge of the MR sensor and then depositing a second insulation layer on the second lead layer film. A third liftoff mask is employed for masking the MR sensor site and the second lead layer film of the first and second lead layers so that the height of the MR sensor can be defined and the third insulation layer deposited.
    • 除了基本上从MR传感器的侧边缘到端子的所有第一和第二绝缘间隙层之外,MR读取头具有由第一,第二和第三绝缘层保护的第一和第二引线层。 第一绝缘层和第二绝缘层不延伸到第一和第二引线层位置的外部,从而可以从MR传感器实现更大的散热。 每个引线层包括第一和第二引线层膜。 当这些膜重叠用于电连接时,其顶表面和底表面被第一和第二绝缘层保护,并且它们的边缘被第三绝缘层保护。 在第一引线层膜从第二引线层膜朝向各个端子延伸的情况下,其底表面被第一绝缘层及其顶表面保护,并且其侧边缘被第三绝缘层保护。 制造或构造这些部件只需要三个掩模。 采用第一剥离掩模来限定第一绝缘层和第一引线层膜。 第二剥离掩模用于在第一引线层膜上沉积第二引线层膜,第二引线层膜用于限定MR传感器的磁道宽度,并与MR的相应侧边缘形成连续的连接 传感器,然后在第二引线层膜上沉积第二绝缘层。 采用第三剥离掩模掩蔽第一和第二引线层的MR传感器位置和第二引线层膜,从而可以限定MR传感器的高度,并沉积第三绝缘层。