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    • 84. 发明授权
    • Flow velocity measuring apparatus and methods using sensors for measuring larger and smaller flow quantities
    • 使用传感器测量更大和更小流量的流速测量装置和方法
    • US06446503B1
    • 2002-09-10
    • US09577882
    • 2000-05-25
    • Kazumitsu NukuiHideo KatoKen TashiroMitunori KomakiMasahiko MatushitaKazuhiro Yamada
    • Kazumitsu NukuiHideo KatoKen TashiroMitunori KomakiMasahiko MatushitaKazuhiro Yamada
    • G01F700
    • G01F7/00
    • A flowmeter capable of measuring an accurate quantity of flow over a wide range of the quantity of flow. A measurement zone (15) for smaller quantity of flow and a measurement zone (16) for larger quantity of flow are determined inside a flow path (13) of a pipe (10). Regulating strainers (14) for regulating the flow of a gas (20) are disposed inside the measurement zone (15) for smaller quantity of flow by dividing the flow path (13) into a plurality of narrower flow paths (14A). A mean flow velocity of the gas (20) flowing through each of a plurality of narrower flow paths (14A) becomes substantially equal. A part of the gas (20) reaches nozzles (22a, 22b) erected across flow velocity sensors (15a, 15b) for smaller quantity of flow and is accelerated by the operation of these nozzles. The flow velocity sensors (15a, 15b) inside the measurement zone (15) for smaller quantity of flow output signals corresponding to the flow velocity of the gas (20) passed through the narrower flow path (14a) and accelerated by the nozzles (22a, 22b) in the range of the smaller quantity of flow. Flow velocity sensors (16a, 16b) for larger quantity of flow in the measurement zone (16) for lager quantity of flow output signals corresponding to the flow velocity of the gas (20) in the range of the larger quantity of flow.
    • 一种流量计,能够在宽的流量范围内测量准确的流量。 在管道(10)的流路(13)内确定用于较小流量的测量区域(15)和用于较大流量的测量区域(16)。 用于调节气体(20)流动的调节过滤器(14)通过将流动路径(13)分成多个更窄的流动路径(14A)而设置在测量区域15的内部,用于较小的流量。 流过多个较窄流路(14A)中的每一个的气体(20)的平均流速基本相等。 气体(20)的一部分到达用于较少流量的跨越流速传感器(15a,15b)竖立的喷嘴(22a,22b),并且通过这些喷嘴的操作而加速。 用于对应于通过较窄流路(14a)并被喷嘴(22a)加速的气体(20)的流速的较小量的流量输出信号的测量区域(15)内部的流速传感器(15a,15b) ,22b)在较小流量的范围内。 用于在大量流量范围内对应于气体(20)的流速的较大量的流量输出信号的用于测量区域(16)中较大流量的流速传感器(16a,16b)。
    • 86. 发明授权
    • Semiconductor storage device with automatic write/erase function
    • 具有自动写入/擦除功能的半导体存储设备
    • US06222779B1
    • 2001-04-24
    • US09460644
    • 1999-12-15
    • Hidetoshi SaitoHideo KatoNaoto TomitaTokumasa Hara
    • Hidetoshi SaitoHideo KatoNaoto TomitaTokumasa Hara
    • G11C700
    • G11C16/16G11C16/12
    • A semiconductor storage device, which has an automatic write/erase function, and uses a potential obtained by boosting a power supply voltage upon write/erase, has a write division control circuit which shifts the selection timings of bit lines upon write, so as to decrease the number of bits to be written simultaneously, thereby reducing the consumption current and compensating for insufficient current supply performance of a power supply circuit in case the power supply voltage is low, and refers to the contents of erase flags upon pre-programming in erase, and erase only blocks that require erases, while, when the power supply voltage is high as the power supply voltage has a wide range or the write time is short as in an acceleration test, the number of bits to be selected at the same time is increased to prevent an increase in write/erase time.
    • 具有自动写入/擦除功能并且使用通过在写入/擦除时提高电源电压而获得的电位的半导体存储装置具有写入分配控制电路,其在写入时移位位线的选择定时,以便 减少要同时写入的位数,从而降低消耗电流并补偿在电源电压低的情况下电源电路的电流供应不足,并且在擦除预编程时参考擦除标志的内容 ,并且仅擦除需要擦除的块,而当电源电压为高电平时,电源电压具有较大的范围或写入时间短于加速度测试时,同时选择的位数 增加以防止写入/擦除时间的增加。
    • 88. 发明授权
    • Semiconductor memory device
    • 半导体存储器件
    • US6094701A
    • 2000-07-25
    • US99841
    • 1998-06-19
    • Yoshio MochizukiHideo Kato
    • Yoshio MochizukiHideo Kato
    • G11C17/18G06F12/06G11C7/10G11C8/04G06F12/02
    • G11C7/1018
    • A semiconductor memory device is provided with a determination circuit and an address adder. The determination circuit determines whether a read start address selects upper-address banks B5-B8 or lower-address banks B1-B4. When the determination circuit determines that the lower-address banks are selected, the address adder increments a column address by 1. From the upper-address banks, data are read from the columns corresponding to the read start address. From the lower-address banks, data are read from the columns that are next to the columns corresponding to the read start address. Even when the upper-address banks are designated by the read start address, the data output from the lower-address banks corresponds to the next columns. Since there is no busy time during data output, successive access is enabled and the access cycle time can be as short as possible.
    • 半导体存储器件具有确定电路和地址加法器。 确定电路确定读取开始地址是否选择上位地址库B5-B8或低地址段B1-B4。 当确定电路确定选择了较低地址组时,地址加法器将列地址递增1.从高地址组中,从与读取起始地址对应的列中读取数据。 从较低地址库中,从与读取起始地址对应的列的旁边的列中读取数据。 即使通过读取起始地址指定高地址组,从低地址组输出的数据对应于下一列。 由于在数据输出期间没有繁忙时间,所以连续访问被使能,并且访问周期时间可以尽可能短。
    • 89. 发明授权
    • Semiconductor storage apparatus with copy guard function
    • 具有防拷功能的半导体存储设备
    • US5924123A
    • 1999-07-13
    • US844947
    • 1997-04-23
    • Yoshio MochizukiHideo Kato
    • Yoshio MochizukiHideo Kato
    • G11C17/00G06F12/14G06F21/00G06F12/00
    • G06F12/1433G06F12/1408G06F21/79
    • For copy guard, an ROM comprises an address data determining circuit, an address sequence monitoring circuit, an error address data generating circuit, and an output selection circuit. The address sequence monitoring circuit monitors the addresses stored in the address data determining circuit and input addresses to determine whether or not the input addresses are in a predetermined sequence of the addresses in the address data determining circuit. The output selection circuit outputs data read from said memory cell array when the address sequence monitoring circuit determines that the address sequence of the input addresses coincides with the predetermined sequence of the addresses stored in the address data determining circuit and outputs error data generated by the error data generating circuit when a determination is made that the sequence of the input addresses does not coincide with the predetermined sequence.
    • 对于复制保护,ROM包括地址数据确定电路,地址序列监视电路,错误地址数据产生电路和输出选择电路。 地址序列监视电路监视存储在地址数据确定电路中的地址和输入地址,以确定输入地址是否在地址数据确定电路中的地址的预定顺序中。 当地址序列监视电路确定输入地址的地址序列与存储在地址数据确定电路中的地址的预定序列一致时,输出选择电路输出从所述存储单元阵列读取的数据,并输出由该错误产生的错误数据 当确定输入地址的序列与预定序列不一致时,数据产生电路。