专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

81. 发明申请

US20090104522A1 STORAGE BATTERY AND PRODUCTION METHOD THEREOF 失效
标题翻译：储存电池及其生产方法
公开(公告)号：US20090104522A1
公开(公告)日：2009-04-23
申请号：US11914853
申请日：2006-05-19
申请人： Shuji Sugimoto , Fuminori Ozaki , Takashi Yokoyama
发明人： Shuji Sugimoto , Fuminori Ozaki , Takashi Yokoyama
IPC分类号： H01M2/08 , H01M2/02
CPC分类号： H01M2/266 , H01M2/22 , H01M10/04 , H01M10/28 , Y02E60/124 , Y02P70/54
摘要： A storage battery includes: a bottomed metal case (10) accommodating an electrolyte and a collector (7) having a flat plate connected to one side of an electrode assembly (5) containing a strip-shaped positive electrode plate (1), a strip-shaped negative electrode plate (2), and a separator (6); a sealing plate (11) sealing upside of the bottomed metal case; and a lead terminal (9) electrically connecting the sealing plate to the collector, wherein the collector has at least one projection (13) and the collector and the lead terminal are electrically connected with each other via the projection. This construction eliminates the problem of increased contact resistance between the lead terminal and the collector and realizes a storage battery having high current discharging performance in which the contact resistance is reduced.
摘要翻译：蓄电池包括：容纳电解质的有底金属外壳（10）和具有与包含带状正电极板（1）的电极组件（5）的一侧连接的平板的集电器（7），带形状的负极板（2）和隔膜（6）; 密封板（11），其密封有底金属壳体的上侧; 以及将密封板电连接到集电器的引线端子（9），其中集电器具有至少一个突起（13），并且集电器和引线端子经由突起彼此电连接。这种结构消除了引线端子和集电极之间的接触电阻增加的问题，并实现了具有降低接触电阻的高电流放电性能的蓄电池。

82. 发明申请

US20080227118A1 Protein Immobilization Method and Quantification Method 审中-公开
标题翻译：蛋白质固定化方法和定量方法
公开(公告)号：US20080227118A1
公开(公告)日：2008-09-18
申请号：US10585985
申请日：2005-01-21
申请人： Naoyuki Kohno , Hitoshi Uemori , Takahiro Nishibu , Kazunari Hirayasu , Yoshiteru Kobayashi , Takashi Yokoyama
发明人： Naoyuki Kohno , Hitoshi Uemori , Takahiro Nishibu , Kazunari Hirayasu , Yoshiteru Kobayashi , Takashi Yokoyama
IPC分类号： G01N33/543 , C07K17/00 , G01N33/567 , C07C315/00 , C07C61/00 , C07C29/00 , G01N33/68
CPC分类号： C07K17/02 , G01N33/543 , G01N33/6896 , G01N2800/2828
摘要： The present invention relates to a method for immobilizing a protein in a sample, which could not easily be immobilized by the conventional immobilization method, to a solid-phase; a method for quantitative determination of protein wherein an effect of inhibitory substance coexisting in a sample prepared using the immobilization method can be reduced; and a rapid and highly precise method for detecting an abnormal PrP and a method for determining BSE using the immobilization method as compared with the conventional method. The present invention provides: “a method for immobilizing a protein to a solid-phase comprising contacting the protein with the solid-phase having hydrophobic surface in the presence of a lower alcohol, and a halogenocarboxylic acid and/or a long chain alkyl sulfate, and an immobilizing reagent solution to be used therefor; a method for quantitative determination of protein comprising contacting a protein-staining solution with the solid-phase immobilized with a protein by the immobilization method, and determining a degree of color development generated thereby; an immunoblotting method wherein the solid-phase immobilized with a protein by the immobilization method is used; and a method for detecting an abnormal PrP a method for determining BSE by using the immobilization method.”
摘要翻译：本发明涉及通过常规固定方法将样品中的蛋白质固定化为固相的方法，用于定量测定蛋白质的方法，其中可以减少使用固定化方法制备的样品中共存的抑制物质的作用; 以及用于检测异常PrP的快速且高精度的方法以及与常规方法相比使用固定方法确定BSE的方法。本发明提供：“将蛋白质固定在固相中的方法，包括在低级醇和卤代羧酸和/或长链烷基硫酸盐的存在下使蛋白质与具有疏水性表面的固相接触，和用于其的固定试剂溶液;一种用于定量测定蛋白质的方法，包括通过固定方法使蛋白质染色溶液与固定有蛋白质的固相接触，并确定由此产生的显色程度;免疫印迹使用通过固定化方法固定有蛋白质的固相的方法;以及通过使用固定化方法来检测异常PrP的方法来测定BSE的方法。

83. 发明授权

US07304343B2 Semiconductor memory device and manufacturing method for the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US07304343B2
公开(公告)日：2007-12-04
申请号：US11084648
申请日：2005-03-16
申请人： Fujio Masuoka , Shinji Horii , Takuji Tanigami , Takashi Yokoyama
发明人： Fujio Masuoka , Shinji Horii , Takuji Tanigami , Takashi Yokoyama
IPC分类号： H01L29/76
CPC分类号： H01L29/66825 , H01L27/115 , H01L27/11556 , H01L29/7887 , H01L29/7923
摘要： The present invention provides a semiconductor memory device including: a semiconductor substrate of a first conductivity type; and a memory cell including: (i) a columnar semiconductor portion formed on the substrate, (ii) at least two charge-storage layers formed around a periphery of the columnar semiconductor portion and divided in a direction vertical to the semiconductor substrate, and (iii) a control gate that covers at least a portion of charge-storage layers, wherein the memory cell is capable of holding two-bit or more data.
摘要翻译：本发明提供一种半导体存储器件，包括：第一导电类型的半导体衬底; 以及存储单元，包括：（i）形成在所述基板上的柱状半导体部，（ii）形成在所述柱状半导体部的周围的并且沿与所述半导体基板垂直的方向分割的至少两个电荷存储层，和 iii）覆盖电荷存储层的至少一部分的控制栅极，其中所述存储器单元能够保持两位或更多数据。

84. 发明授权

US07263046B2 Photo-detector amplifier circuit for optical disk device 失效
标题翻译：用于光盘设备的光电检测放大器电路
公开(公告)号：US07263046B2
公开(公告)日：2007-08-28
申请号：US11523017
申请日：2006-09-19
申请人： Takanori Okuda , Takashi Yokoyama
发明人： Takanori Okuda , Takashi Yokoyama
IPC分类号： G11B7/00 , H01L31/00
CPC分类号： G11B7/005 , G11B7/0045 , G11B7/13
摘要： A two-stage amplifier of a first-stage amplifier 21 and second-stage amplifiers 22 and 23 is provided. A writing mode and reproducing modes are switched in the first-stage amplifier 21 by switching a parallel circuit of a feedback capacitor Cf1w and a feedback resistor Rf1w and a parallel circuit of a feedback capacitor Cf1r and a feedback resistor Rf1r. The second-stage amplifier 23 is provided with feedback resistors Rf22 and Rf23 that are connected to each other in parallel. The feedback resistor Rf23 is connected in the feedback loop by a switch transistor QSW only when reproducing a high-reflective disk. This enables an amplifier gain to be suitably set for each of writing, low-reflective disk reproducing, and high-reflective disk reproducing. As a result, desirable reproducing characteristics can be obtained for the low-reflective disk while accommodating high-speed writing with a large laser power.
摘要翻译：提供了第一级放大器21和第二级放大器22和23的两级放大器。通过切换反馈电容器Cf 1 w和反馈电阻器Rf 1 w的并联电路以及反馈电容器Cf 1 r的并联电路和反馈电阻器Rf的并联电路，在第一级放大器21中切换写入模式和再现模式 1 r。第二级放大器23设置有并联连接的反馈电阻器Rf 22和Rf 23。只有在再现高反射盘时，反馈电阻Rf 23才被开关晶体管QSW连接在反馈回路中。这使得能够针对写入，低反射盘再现和高反射盘再现中的每一个适当地设置放大器增益。结果，对于低反射盘可以获得期望的再现特性，同时以大的激光功率容纳高速写入。

85. 发明授权

US07217654B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07217654B2
公开(公告)日：2007-05-15
申请号：US10969429
申请日：2004-10-21
申请人： Seiji Nagahara , Kazutoshi Shiba , Nobuaki Hamanaka , Tatsuya Usami , Takashi Yokoyama
发明人： Seiji Nagahara , Kazutoshi Shiba , Nobuaki Hamanaka , Tatsuya Usami , Takashi Yokoyama
IPC分类号： H01L21/4763
CPC分类号： H01L21/02063 , H01L21/31116 , H01L21/31138 , H01L21/76807 , H01L21/76808 , H01L21/76811 , H01L21/76825 , H01L21/76828 , H01L21/76831
摘要： A method of manufacturing a semiconductor device having a damascene structure contains a process of forming a first interlayer insulating film (6) and a second interlayer insulating film (4) formed of a low dielectric-constant film on a substrate, forming via holes (9) by using a first resist pattern (1a) formed on the second interlayer insulating film, conducting an organic peeling treatment using organic peeling liquid containing amine components and then forming a second resist pattern (1b) on the second interlayer insulating film. After the wet treatment, before a second antireflection coating (2b) is coated so as to be located below the second resist pattern is coated, at least one of an annealing treatment, a plasma treatment, a UV treatment and an organic solvent treatment is carried out to remove amine components which inhibit the catalysis reaction of acid occurring in the resist at the light exposure, thereby preventing degradation of the resolution of the second resist pattern (1b).
摘要翻译：一种制造具有镶嵌结构的半导体器件的方法包括在衬底上形成第一层间绝缘膜（6）和由低介电常数膜形成的第二层间绝缘膜（4）的工艺，形成通孔（9 ）通过使用形成在第二层间绝缘膜上的第一抗蚀剂图案（1a），使用含有胺成分的有机剥离液进行有机剥离处理，然后在第二层间绝缘膜上形成第二抗蚀剂图案（1b）。在湿处理之后，涂覆第二抗反射涂层（2b）以便位于第二抗蚀图案下方的涂层，退火处理，等离子体处理，UV处理和有机溶剂处理中的至少一个是进行以除去抑制在曝光时在抗蚀剂中发生的酸的催化反应的胺成分，从而防止第二抗蚀剂图案（1b）的分辨率的劣化。

86. 发明申请

US20070096331A1 Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070096331A1
公开(公告)日：2007-05-03
申请号：US11640349
申请日：2006-12-18
申请人： Seiji Nagahara , Kazutoshi Shiba , Nobuaki Hamanaka , Tatsuya Usami , Takashi Yokoyama
发明人： Seiji Nagahara , Kazutoshi Shiba , Nobuaki Hamanaka , Tatsuya Usami , Takashi Yokoyama
IPC分类号： H01L23/48
CPC分类号： H01L21/02063 , H01L21/31116 , H01L21/31138 , H01L21/76807 , H01L21/76808 , H01L21/76811 , H01L21/76825 , H01L21/76828 , H01L21/76831
摘要： A method of manufacturing a semiconductor device having a damascene structure contains a process of forming a first interlayer insulating film and a second interlayer insulating film formed of a low dielectric constant film on a substrate, forming via holes by using a first resist pattern formed on the second interlayer insulating film, conducting an organic peeling treatment using organic peeling liquid containing amine components and then forming a second resist pattern on the second interlayer insulating film. After the wet treatment before a second antireflection coating is coated so as to be located below the second resist pattern is coated, at least one of an annealing treatment, a plasma treatment, a UV treatment and an organic solvent treatment is carried out to remove amine components which inhibit the catalysis reaction of acid occurring in the resist at the light exposure, thereby preventing degradation of the resolution of the second resist pattern.
摘要翻译：一种制造具有镶嵌结构的半导体器件的方法包括在基板上形成第一层间绝缘膜和由低介电常数膜形成的第二层间绝缘膜的工艺，通过使用形成在第一层上绝缘膜上的第一抗蚀剂图案形成通孔第二层间绝缘膜，使用含有胺成分的有机剥离液进行有机剥离处理，然后在第二层间绝缘膜上形成第二抗蚀剂图案。在第二抗反射涂层涂布第二抗蚀剂图案之下的湿处理之后，涂覆第二抗蚀图案，进行退火处理，等离子体处理，UV处理和有机溶剂处理中的至少一种以除去胺抑制在曝光时在抗蚀剂中发生的酸的催化反应的成分，从而防止第二抗蚀剂图案的分辨率的劣化。

87. 发明申请

US20070019517A1 Photo-detector amplifier circuit for optical disk device 失效
公开(公告)号：US20070019517A1
公开(公告)日：2007-01-25
申请号：US11523017
申请日：2006-09-19
申请人： Takanori Okuda , Takashi Yokoyama
发明人： Takanori Okuda , Takashi Yokoyama
IPC分类号： G11B7/00
CPC分类号： G11B7/005 , G11B7/0045 , G11B7/13
摘要： A two-stage amplifier of a first-stage amplifier 21 and second-stage amplifiers 22 and 23 is provided. A writing mode and reproducing modes are switched in the first-stage amplifier 21 by switching a parallel circuit of a feedback capacitor Cf1w and a feedback resistor Rf1w and a parallel circuit of a feedback capacitor Cf1r and a feedback resistor Rf1r. The second-stage amplifier 23 is provided with feedback resistors Rf22 and Rf23 that are connected to each other in parallel. The feedback resistor Rf23 is connected in the feedback loop by a switch transistor QSW only when reproducing a high-reflective disk. This enables an amplifier gain to be suitably set for each of writing, low-reflective disk reproducing, and high-reflective disk reproducing. As a result, desirable reproducing characteristics can be obtained for the low-reflective disk while accommodating high-speed writing with a large laser power.

88. 发明授权

US07133346B2 Photo-detector amplifier circuit for optical disk device 失效
标题翻译：用于光盘设备的光电检测放大器电路
公开(公告)号：US07133346B2
公开(公告)日：2006-11-07
申请号：US10294573
申请日：2002-11-15
申请人： Takanori Okuda , Takashi Yokoyama
发明人： Takanori Okuda , Takashi Yokoyama
IPC分类号： G11B7/00 , H01L31/00
CPC分类号： G11B7/005 , G11B7/0045 , G11B7/13
摘要： A two-stage amplifier of a first-stage amplifier 21 and second-stage amplifiers 22 and 23 is provided. A writing mode and reproducing modes are switched in the first-stage amplifier 21 by switching a parallel circuit of a feedback capacitor Cf1w and a feedback resistor Rf1w and a parallel circuit of a feedback capacitor Cf1r and a feedback resistor Rf1r. The second-stage amplifier 23 is provided with feedback resistors Rf22 and Rf23 that are connected to each other in parallel. The feedback resistor Rf23 is connected in the feedback loop by a switch transistor QSW only when reproducing a high-reflective disk. This enables an amplifier gain to be suitably set for each of writing, low-reflective disk reproducing, and high-reflective disk reproducing. As a result, desirable reproducing characteristics can be obtained for the low-reflective disk while accommodating high-speed writing with a large laser power.
摘要翻译：提供了第一级放大器21和第二级放大器22和23的两级放大器。通过切换反馈电容器Cf 1 w和反馈电阻器Rf 1 w的并联电路以及反馈电容器Cf 1 r的并联电路和反馈电阻器Rf的并联电路，在第一级放大器21中切换写入模式和再现模式 1 r。第二级放大器23设置有并联连接的反馈电阻器Rf 22和Rf 23。只有在再现高反射盘时，反馈电阻Rf 23才被开关晶体管QSW连接在反馈回路中。这使得能够针对写入，低反射盘再现和高反射盘再现中的每一个适当地设置放大器增益。结果，对于低反射盘可以获得期望的再现特性，同时以大的激光功率容纳高速写入。

89. 发明授权

US07079513B2 Communication system 失效
标题翻译：通讯系统
公开(公告)号：US07079513B2
公开(公告)日：2006-07-18
申请号：US10894060
申请日：2004-07-20
申请人： Kenichi Sakamoto , Tsutomu Kusaki , Masaru Murakami , Takashi Yokoyama
发明人： Kenichi Sakamoto , Tsutomu Kusaki , Masaru Murakami , Takashi Yokoyama
IPC分类号： H04Q7/00 , H04L12/28
CPC分类号： H04B7/022 , H04W36/18
摘要： A communication system includes a control unit, a switch and a diversity hand-over processing unit connected to the control unit and the switch for receiving both a first communication signal received from a radio base station which outputs the hand-over instruction, and a second communication signal received from another radio base station to which the communication signal will be hand-over so as to output one of the first and second communication signals to the associated interface circuit. The diversity hand-over processing unit transmits the communication signal received through the radio base station from the mobile station on the reception side for communication to both the interface circuit associated with the radio base station as a source of hand-over and the interface circuit associated with the radio base station as a destination of hand-over.
摘要翻译：通信系统包括：控制单元，开关和分配移交处理单元，连接到控制单元和开关，用于接收从输出切换指令的无线电基站接收的第一通信信号;以及第二从另一无线电基站接收到通信信号的通信信号，通信信号将被切换到其中，以将第一和第二通信信号中的一个输出到相关联的接口电路。分集处理单元将从无线基站接收到的通信信号从接收侧的移动台发送到与无线基站相关联的接口电路作为切换源，并且接口电路相关联以无线电基站为切换目的地。

90. 发明申请

US20050035399A1 Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：US20050035399A1
公开(公告)日：2005-02-17
申请号：US10912751
申请日：2004-08-04
申请人： Fujio Masuoka , Shinji Horii , Takuji Tanigami , Takashi Yokoyama , Noboru Takeuchi
发明人： Fujio Masuoka , Shinji Horii , Takuji Tanigami , Takashi Yokoyama , Noboru Takeuchi
IPC分类号： H01L27/108 , H01L21/265 , H01L21/28 , H01L21/336 , H01L21/8247 , H01L27/115 , H01L29/06 , H01L29/423 , H01L29/78 , H01L29/786 , H01L29/788 , H01L29/792
CPC分类号： H01L21/26586 , H01L27/115 , H01L27/11556 , H01L29/0623 , H01L29/0646 , H01L29/0649 , H01L29/0657 , H01L29/40114 , H01L29/40117 , H01L29/42384 , H01L29/42392 , H01L29/66484 , H01L29/66666 , H01L29/66742 , H01L29/66825 , H01L29/66833 , H01L29/7828 , H01L29/78642 , H01L29/78648 , H01L29/78696
摘要： A semiconductor device comprising a memory cell which includes: a pillar-shaped semiconductor layer of a first conductive type formed on a semiconductor substrate; source and drain diffusion layers of a second conductive type formed in upper and lower portions of the pillar-shaped semiconductor layer; a semiconductor layer of the second conductive type or a cavity formed inside the pillar-shaped semiconductor layer; and a gate electrode formed on a side face of the pillar-shaped semiconductor layer via a gate insulating film, or a control gate electrode formed on the side face of the pillar-shaped semiconductor layer via a charge accumulation layer.
摘要翻译：一种半导体器件，包括存储单元，其包括：形成在半导体衬底上的第一导电类型的柱状半导体层; 在柱状半导体层的上部和下部形成的第二导电类型的源极和漏极扩散层; 第二导电类型的半导体层或形成在柱状半导体层内部的空腔; 以及经由栅极绝缘膜形成在柱状半导体层的侧面上的栅电极，或者经由电荷累积层形成在柱状半导体层的侧面上的控制栅电极。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式