专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

81. 发明授权

US08710580B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08710580B2
公开(公告)日：2014-04-29
申请号：US13689026
申请日：2012-11-29
申请人： Kiwamu Sakuma , Haruka Kusai , Shosuke Fujii , Li Zhang , Masahiro Kiyotoshi , Masao Shingu
发明人： Kiwamu Sakuma , Haruka Kusai , Shosuke Fujii , Li Zhang , Masahiro Kiyotoshi , Masao Shingu
IPC分类号： H01L45/00 , H01L27/115 , H01L21/265
CPC分类号： H01L27/1157 , H01L21/265 , H01L21/845 , H01L27/11551 , H01L27/11578 , H01L27/1211 , H01L27/2436 , H01L27/2481 , H01L29/42332 , H01L29/7881 , H01L29/792 , H01L45/04
摘要： According to one embodiment, a semiconductor device includes first to n-th semiconductor layers (n is a natural number equal to or more than 2) being stacked in order from a surface of an insulating layer in a first direction perpendicular to the surface of the insulating layer, the first to n-th semiconductor layers extending in a second direction parallel to the surface of the insulating layer, the first to n-th semiconductor layers being insulated from each other, a common electrode connected to the first to n-th semiconductor layers in a first end of the second direction thereof, and a layer select transistor which uses the first to n-th semiconductor layers as channels and which selects one of the first to n-th semiconductor layers.
摘要翻译：根据一个实施例，半导体器件包括第一至第n半导体层（n为等于或大于2的自然数），从绝缘层的表面依次堆叠在与第绝缘层，所述第一至第n半导体层在与所述绝缘层的表面平行的第二方向上延伸，所述第一至第n半导体层彼此绝缘，公共电极连接到所述第一至第n 半导体层，其第二方向的第一端，以及使用第一至第n半导体层作为沟道并选择第一至第n半导体层之一的层选择晶体管。

82. 发明授权

US08569829B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US08569829B2
公开(公告)日：2013-10-29
申请号：US12784032
申请日：2010-05-20
申请人： Masahiro Kiyotoshi
发明人： Masahiro Kiyotoshi
IPC分类号： H01L27/115
CPC分类号： H01L27/11578 , H01L27/11575 , H01L27/11582 , H01L29/7926
摘要： A nonvolatile semiconductor memory device according to an embodiment includes memory strings which have a plurality of transistors including gate electrode films formed over sides of columnar semiconductor films on gate dielectric films in a height direction of the semiconductor films, and which are arranged in a matrix shape substantially perpendicularly above a substrate. The gate electrode films of the transistors at same height of the memory strings arranged in a first direction are connected to one another. A distance between the semiconductor films at least in a forming position of the transistor at an uppermost layer of the memory strings adjacent to each other in the first direction is smaller than double of thickness of the gate dielectric films.
摘要翻译：根据实施例的非易失性半导体存储器件包括具有多个晶体管的存储器串，所述多个晶体管包括形成在半导体膜的高度方向上的栅极电介质膜上的柱状半导体膜的侧面上的栅电极膜，并且以矩阵形状基本上垂直于基底上方。在沿第一方向布置的存储器串的相同高度处的晶体管的栅极电极膜彼此连接。在第一方向上彼此相邻的存储器串的最上层的晶体管的至少形成位置的半导体膜之间的距离小于栅极电介质膜的厚度的两倍。

83. 发明授权

US08557705B2 Method of manufacturing semiconductor device and apparatus for manufacturing semiconductor device 有权
公开(公告)号：US08557705B2
公开(公告)日：2013-10-15
申请号：US13236306
申请日：2011-09-19
申请人： Takeshi Hizawa , Nobuhide Yamada , Yoshihiro Ogawa , Masahiro Kiyotoshi
发明人： Takeshi Hizawa , Nobuhide Yamada , Yoshihiro Ogawa , Masahiro Kiyotoshi
IPC分类号： H01L21/311
CPC分类号： H01L21/02076 , H01L21/02164 , H01L21/02222 , H01L21/02282 , H01L21/02301 , H01L21/02326 , H01L21/28273 , H01L27/11524
摘要： A method of manufacturing a semiconductor device in which an insulating film is filled between patterns etched into a workpiece structure is disclosed. The method includes cleaning etch residues residing between the etched patterns by a first chemical liquid; rinsing the workpiece structure cleaned by the first chemical liquid by a rinse liquid; and coating the workpiece structure rinsed by the rinse liquid with a coating liquid for formation of the insulating film. The cleaning to the coating are carried out within the same processing chamber such that a liquid constantly exists between the patterns of the workpiece structure.

84. 发明申请

US20120184078A1 METHOD FOR MANUFACTURING SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：制造半导体存储器件的方法
公开(公告)号：US20120184078A1
公开(公告)日：2012-07-19
申请号：US13218868
申请日：2011-08-26
申请人： Masahiro Kiyotoshi
发明人： Masahiro Kiyotoshi
IPC分类号： H01L21/336
CPC分类号： H01L27/11582 , H01L27/1157 , H01L27/11573 , H01L27/11575 , H01L29/7926
摘要： According to one embodiment, a method for manufacturing a semiconductor memory device, includes forming a stacked body on a substrate by alternately stacking a first insulating film and a second insulating film, making a through-hole extending in a stacking direction of the first insulating film and the second insulating film to pierce the stacked body, forming at least a portion of a blocking insulating film, a charge trap film, and a tunneling dielectric film of a MONOS on an inner surface of the through-hole, forming a channel semiconductor on the tunneling dielectric film, making a trench in the stacked body, removing the second insulating film by performing etching via the trench, and filling a conductive material into a space made by the removing of the second insulating film.
摘要翻译：根据一个实施例，一种用于制造半导体存储器件的方法包括：通过交替堆叠第一绝缘膜和第二绝缘膜，在衬底上形成层叠体，形成沿着第一绝缘膜的层叠方向延伸的通孔并且第二绝缘膜刺穿层叠体，在通孔的内表面上形成MONOS的阻挡绝缘膜，电荷阱膜和隧道电介质膜的至少一部分，在通孔的内表面上形成沟道半导体所述隧道电介质膜在所述层叠体中形成沟槽，通过经由所述沟槽进行蚀刻来除去所述第二绝缘膜，并且将导电材料填充到通过去除所述第二绝缘膜而形成的空间中。

85. 发明授权

US07915156B2 Semiconductor memory device and method for manufacturing the same 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US07915156B2
公开(公告)日：2011-03-29
申请号：US12391953
申请日：2009-02-24
申请人： Kenji Aoyama , Eiji Ito , Masahiro Kiyotoshi , Tadashi Iguchi , Moto Yabuki
发明人： Kenji Aoyama , Eiji Ito , Masahiro Kiyotoshi , Tadashi Iguchi , Moto Yabuki
IPC分类号： H01L21/336
CPC分类号： H01L27/11521 , H01L21/28273 , H01L21/764 , H01L29/66825
摘要： A semiconductor memory device has a semiconductor substrate, a plurality of word lines formed at predetermined intervals on the semiconductor substrate, each word line having a gate insulating film, a charge storage layer, a first insulating film, and a controlling gate electrode which are stacked in order, and including a metal oxide layer above the level of the gate insulating film, a second insulating film covering a side of the word line and a surface of the semiconductor substrate between the word lines, and having a film thickness of 15 nm or less, and a third insulating film formed between the word lines adjacent to each other such that a region below the level of the metal oxide layer has a cavity.
摘要翻译：半导体存储器件具有半导体衬底，在半导体衬底上以预定间隔形成的多个字线，每个字线具有栅极绝缘膜，电荷存储层，第一绝缘膜和控制栅电极，它们被堆叠并且包括位于栅极绝缘膜的高度之上的金属氧化物层，覆盖字线的一侧的第二绝缘膜和字线之间的半导体衬底的表面，并且具有15nm的膜厚度或并且形成在彼此相邻的字线之间的第三绝缘膜，使得低于金属氧化物层的电平的区域具有空腔。

86. 发明申请

US20090267123A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20090267123A1
公开(公告)日：2009-10-29
申请号：US12426509
申请日：2009-04-20
申请人： Soichi YAMAZAKI , Koji Yamakawa , Masahiro Kiyotoshi
发明人： Soichi YAMAZAKI , Koji Yamakawa , Masahiro Kiyotoshi
IPC分类号： H01L27/115 , H01L27/108
CPC分类号： H01L27/11507 , H01L27/0207 , H01L27/11504 , H01L28/55
摘要： A semiconductor device includes: a semiconductor substrate; a plurality of transistors on the semiconductor substrate, each of the transistors has a source and drain region; an interlayer insulating film on the semiconductor substrate and the plurality of transistors; and at least three capacitors on the interlayer insulation film, each of them has a top electrode, a bottom electrode and an insulating film interposed therebetween; wherein the 1st and 2nd capacitors have an shared electrode, with the top electrodes of the 1st and 2nd capacitors, which has a 1st longer direction, the 2nd and 3rd capacitors have an shared electrode, with the bottom electrodes of the 2nd and 3rd capacitors, which has a 2nd longer direction different from the 1st direction.
摘要翻译：半导体器件包括：半导体衬底; 半导体衬底上的多个晶体管，每个晶体管具有源极和漏极区域; 半导体衬底上的层间绝缘膜和所述多个晶体管; 和层间绝缘膜上的至少三个电容器，它们各自具有插入其间的顶部电极，底部电极和绝缘膜; 其中第一和第二电容器具有共享电极，第一和第二电容器的顶电极具有第一较长方向，第二和第三电容器具有共享电极，第二和第三电容器的底部电极，其具有与第一方向不同的第二较长方向。

87. 发明授权

US07598151B2 Semiconductor device fabrication method 有权
标题翻译：半导体器件制造方法
公开(公告)号：US07598151B2
公开(公告)日：2009-10-06
申请号：US11798956
申请日：2007-05-18
申请人： Takeshi Hoshi , Masahiro Kiyotoshi
发明人： Takeshi Hoshi , Masahiro Kiyotoshi
IPC分类号： H01L21/76
CPC分类号： C23C18/125 , C23C18/06 , C23C18/122 , C23C18/1245 , C23C18/1275 , H01L21/02164 , H01L21/02222 , H01L21/02282 , H01L21/02337 , H01L21/3125 , H01L21/3141 , H01L21/31612
摘要： According to the present invention, there is provided a semiconductor device fabrication method having:coating a semiconductor substrate with a silazane perhydride polymer solution prepared by dispersing a silazane perhydride polymer in a solvent containing carbon, thereby forming a coating film;forming a polysilazane film by volatilizing the solvent by heat-treating the coating film; andinserting the semiconductor substrate into a predetermined furnace, lowering a pressure in the furnace, and oxidizing the polysilazane film while the pressure in the furnace is raised by supplying steam into the furnace, thereby forming a silicon oxide film.
摘要翻译：根据本发明，提供了一种半导体器件制造方法，其具有：通过将硅氮烷二酸酐聚合物分散在含有碳的溶剂中而制备的硅氮烷聚合物溶液涂覆半导体衬底，从而形成涂膜; 通过对涂膜进行热处理使溶剂挥发而形成聚硅氮烷膜; 并且将半导体衬底插入预定的炉中，降低炉中的压力，并且通过向炉中供应蒸汽来升高炉中的压力来氧化聚硅氮烷膜，由此形成氧化硅膜。

88. 发明申请

US20090206409A1 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090206409A1
公开(公告)日：2009-08-20
申请号：US12219880
申请日：2008-07-30
申请人： Osamu Arisumi , Masahiro Kiyotoshi
发明人： Osamu Arisumi , Masahiro Kiyotoshi
IPC分类号： H01L27/088
CPC分类号： H01L21/022 , H01L21/02126 , H01L21/02164 , H01L21/02274 , H01L21/02282 , H01L21/312 , H01L21/31612 , H01L21/76801 , H01L21/76826 , H01L21/76828 , H01L21/76837
摘要： A method of manufacturing a semiconductor device, includes forming a first insulating film containing silicon oxide as a main ingredient, on an underlying region, adhering water to the first insulating film, forming a polymer solution layer containing a silicon-containing polymer on the water-adhered first insulating film, and forming a second insulating film containing silicon oxide as a main ingredient from the polymer solution layer, wherein forming the second insulating film includes forming silicon oxide by a reaction between the polymer and water adhered to the first insulating film.
摘要翻译：一种制造半导体器件的方法，包括在下面的区域上形成含有氧化硅作为主要成分的第一绝缘膜，将水粘附到第一绝缘膜上，在水溶性聚合物层上形成含有含硅聚合物的聚合物溶液层，粘合的第一绝缘膜，并且从聚合物溶液层形成含有氧化硅作为主要成分的第二绝缘膜，其中形成所述第二绝缘膜包括通过所述聚合物和附着到所述第一绝缘膜的水之间的反应形成氧化硅。

89. 发明申请

US20090001442A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20090001442A1
公开(公告)日：2009-01-01
申请号：US12145109
申请日：2008-06-24
申请人： Yoshio OZAWA , Ichiro Mizushima , Takashi Nakao , Akihito Yamamoto , Takashi Suzuki , Masahiro Kiyotoshi
发明人： Yoshio OZAWA , Ichiro Mizushima , Takashi Nakao , Akihito Yamamoto , Takashi Suzuki , Masahiro Kiyotoshi
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L27/115 , H01L21/84 , H01L27/11521 , H01L27/11524 , H01L27/1203
摘要： A nonvolatile semiconductor memory device including a semiconductor substrate having a semiconductor layer and an insulating material provided on a surface thereof, a surface of the insulating material is covered with the semiconductor layer, and a plurality of memory cells provided on the semiconductor layer, the memory cells includes a first dielectric film provided by covering the surface of the semiconductor layer, a plurality of charge storage layers provided above the insulating material and on the first dielectric film, a plurality of second dielectric films provided on the each charge storage layer, a plurality of conductive layers provided on the each second dielectric film, and an impurity diffusion layer formed partially or overall at least above the insulating material and inside the semiconductor layer and at least a portion of a bottom end thereof being provided by an upper surface of the insulating material.
摘要翻译：一种非易失性半导体存储器件，包括具有半导体层和设置在其表面上的绝缘材料的半导体衬底，绝缘材料的表面被半导体层覆盖，并且设置在半导体层上的多个存储单元，存储器电池包括通过覆盖半导体层的表面而提供的第一电介质膜，设置在绝缘材料上方和第一电介质膜上的多个电荷存储层，设置在每个电荷存储层上的多个第二电介质膜，多个设置在每个第二电介质膜上的导电层，以及杂质扩散层，其部分或整体形成在绝缘材料的至少上方和半导体层的内部，并且其底端的至少一部分由绝缘体的上表面材料。

90. 发明授权

US07407864B2 Polysilazane perhydride solution and method of manufacturing a semiconductor device using the same 有权
标题翻译：聚硅氮杂己烷溶液及其制造方法
公开(公告)号：US07407864B2
公开(公告)日：2008-08-05
申请号：US11175305
申请日：2005-07-07
申请人： Atsuko Kawasaki , Masahiro Kiyotoshi , Keisuke Nakazawa , Osamu Arisumi , Takeshi Hoshi , Katsuhiko Tachibana
发明人： Atsuko Kawasaki , Masahiro Kiyotoshi , Keisuke Nakazawa , Osamu Arisumi , Takeshi Hoshi , Katsuhiko Tachibana
IPC分类号： H01L21/76
CPC分类号： H01L21/3125 , H01L21/02164 , H01L21/02222 , H01L21/02282 , H01L21/02337 , H01L21/31053 , H01L21/316 , H01L21/76224
摘要： Disclosed is a method of manufacturing a semiconductor device comprising forming an element isolation trench in a semiconductor substrate, coating a polysilazane perhydride solution on the semiconductor substrate having the element isolation trench formed thereon to form a polysilazane perhydride film, the polysilazane perhydride solution comprising dibutyl ether having a butanol concentration of 30 ppm or less, and polysilazane perhydride dissolved in the dibutyl ether, subjecting the polysilazane perhydride film to oxidation in an atmosphere containing water vapor to form a silicon dioxide film, and selectively removing the silicon dioxide film to leave the silicon dioxide film in the element isolation trench to form an element isolating insulation film.
摘要翻译：公开了一种制造半导体器件的方法，包括在半导体衬底中形成元件隔离沟槽，在其上形成元件隔离沟槽的半导体衬底上涂覆聚硅氮烷二次酐溶液以形成聚硅氮烷过渡膜，所述聚硅氮烷过硼酸盐溶液包含二丁基醚具有30ppm以下的丁醇浓度，溶解在二丁基醚中的聚硅氮烷二烷基化钠，在含有水蒸汽的气氛中使聚硅氮烷二次酐膜氧化，形成二氧化硅膜，选择性地除去二氧化硅膜离开硅元件隔离沟中的二氧化硅膜形成元件隔离绝缘膜。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式